ixgbe: fix pci device refcount leak

commit b93fb4405fcb5112c5739c5349afb52ec7f15c07 upstream.

As the comment of pci_get_domain_bus_and_slot() says, it
returns a PCI device with refcount incremented, when finish
using it, the caller must decrement the reference count by
calling pci_dev_put().

In ixgbe_get_first_secondary_devfn() and ixgbe_x550em_a_has_mii(),
pci_dev_put() is called to avoid leak.

Fixes: 8fa10ef012 ("ixgbe: register a mdiobus")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Yang Yingliang 2022-11-29 09:57:48 +08:00 committed by Greg Kroah-Hartman
parent e0d6f3b62b
commit 53cefa802f

View File

@ -851,9 +851,11 @@ static struct pci_dev *ixgbe_get_first_secondary_devfn(unsigned int devfn)
rp_pdev = pci_get_domain_bus_and_slot(0, 0, devfn); rp_pdev = pci_get_domain_bus_and_slot(0, 0, devfn);
if (rp_pdev && rp_pdev->subordinate) { if (rp_pdev && rp_pdev->subordinate) {
bus = rp_pdev->subordinate->number; bus = rp_pdev->subordinate->number;
pci_dev_put(rp_pdev);
return pci_get_domain_bus_and_slot(0, bus, 0); return pci_get_domain_bus_and_slot(0, bus, 0);
} }
pci_dev_put(rp_pdev);
return NULL; return NULL;
} }
@ -870,6 +872,7 @@ static bool ixgbe_x550em_a_has_mii(struct ixgbe_hw *hw)
struct ixgbe_adapter *adapter = hw->back; struct ixgbe_adapter *adapter = hw->back;
struct pci_dev *pdev = adapter->pdev; struct pci_dev *pdev = adapter->pdev;
struct pci_dev *func0_pdev; struct pci_dev *func0_pdev;
bool has_mii = false;
/* For the C3000 family of SoCs (x550em_a) the internal ixgbe devices /* For the C3000 family of SoCs (x550em_a) the internal ixgbe devices
* are always downstream of root ports @ 0000:00:16.0 & 0000:00:17.0 * are always downstream of root ports @ 0000:00:16.0 & 0000:00:17.0
@ -880,15 +883,16 @@ static bool ixgbe_x550em_a_has_mii(struct ixgbe_hw *hw)
func0_pdev = ixgbe_get_first_secondary_devfn(PCI_DEVFN(0x16, 0)); func0_pdev = ixgbe_get_first_secondary_devfn(PCI_DEVFN(0x16, 0));
if (func0_pdev) { if (func0_pdev) {
if (func0_pdev == pdev) if (func0_pdev == pdev)
return true; has_mii = true;
else goto out;
return false;
} }
func0_pdev = ixgbe_get_first_secondary_devfn(PCI_DEVFN(0x17, 0)); func0_pdev = ixgbe_get_first_secondary_devfn(PCI_DEVFN(0x17, 0));
if (func0_pdev == pdev) if (func0_pdev == pdev)
return true; has_mii = true;
return false; out:
pci_dev_put(func0_pdev);
return has_mii;
} }
/** /**