dmaengine: tegra210-adma: fix global intr clear
commit 9c7e355ccbb33d239360c876dbe49ad5ade65b47 upstream.
The current global interrupt clear programming register offset
was not correct. Fix the programming with right offset
Fixes: ded1f3db4c
("dmaengine: tegra210-adma: prepare for supporting newer Tegra chips")
Cc: stable@vger.kernel.org
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Link: https://lore.kernel.org/r/20230102064844.31306-1-mkumard@nvidia.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -224,7 +224,7 @@ static int tegra_adma_init(struct tegra_adma *tdma)
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int ret;
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/* Clear any interrupts */
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tdma_write(tdma, tdma->cdata->global_int_clear, 0x1);
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tdma_write(tdma, tdma->cdata->ch_base_offset + tdma->cdata->global_int_clear, 0x1);
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/* Assert soft reset */
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tdma_write(tdma, ADMA_GLOBAL_SOFT_RESET, 0x1);
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