ARM: dts: rockchip: disable arm_global_timer on rk3066 and rk3188
[ Upstream commit da74858a475782a3f16470907814c8cc5950ad68 ] The clock source and the sched_clock provided by the arm_global_timer on Rockchip rk3066a/rk3188 are quite unstable because their rates depend on the CPU frequency. Recent changes to the arm_global_timer driver makes it impossible to use. On the other side, the arm_global_timer has a higher rating than the ROCKCHIP_TIMER, it will be selected by default by the time framework while we want to use the stable Rockchip clock source. Keep the arm_global_timer disabled in order to have the DW_APB_TIMER (rk3066a) or ROCKCHIP_TIMER (rk3188) selected by default. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/f275ca8d-fd0a-26e5-b978-b7f3df815e0a@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -632,7 +632,6 @@
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&global_timer {
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&global_timer {
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interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
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interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
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status = "disabled";
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};
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};
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&local_timer {
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&local_timer {
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@ -108,6 +108,13 @@
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reg = <0x1013c200 0x20>;
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reg = <0x1013c200 0x20>;
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interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
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interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
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clocks = <&cru CORE_PERI>;
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clocks = <&cru CORE_PERI>;
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status = "disabled";
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/* The clock source and the sched_clock provided by the arm_global_timer
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* on Rockchip rk3066a/rk3188 are quite unstable because their rates
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* depend on the CPU frequency.
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* Keep the arm_global_timer disabled in order to have the
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* DW_APB_TIMER (rk3066a) or ROCKCHIP_TIMER (rk3188) selected by default.
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*/
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};
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};
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local_timer: local-timer@1013c600 {
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local_timer: local-timer@1013c600 {
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