power: supply: qbg: Fix compilation issues
Fix different compilation issues found in QBG driver. Change-Id: I8ac84e8bffb0c875dac34ea5aa82988b3a05e24f Signed-off-by: Shyam Kumar Thella <sthella@codeaurora.org>
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@ -215,7 +215,7 @@ static int qbg_get_fifo_count(struct qti_qbg *chip, u32 *fifo_count)
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u8 val[2];
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rc = qbg_sdam_read(chip,
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QBG_SDAM_DATA_START_OFFSET(SDAM_CTRL0) + QBG_SDAM_FIFO_COUNT_OFFSET,
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QBG_SDAM_DATA_START_OFFSET(chip, SDAM_CTRL0) + QBG_SDAM_FIFO_COUNT_OFFSET,
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val, 2);
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if (rc < 0) {
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pr_err("Failed to read QBG SDAM, rc=%d\n", rc);
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@ -341,7 +341,6 @@ static int qbg_decode_fifo_data(struct fifo_data fifo, unsigned int *vbat1,
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static int get_rtc_time(struct qti_qbg *chip, unsigned long *rtc_time)
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{
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struct rtc_time tm;
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struct rtc_device *rtc;
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int rc;
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if (!chip->rtc) {
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@ -478,7 +477,7 @@ static int qbg_clear_fifo_data(struct qti_qbg *chip)
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u8 val[2] = {0, 0};
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rc = qbg_sdam_write(chip,
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QBG_SDAM_DATA_START_OFFSET(SDAM_CTRL0) + QBG_SDAM_FIFO_COUNT_OFFSET,
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QBG_SDAM_DATA_START_OFFSET(chip, SDAM_CTRL0) + QBG_SDAM_FIFO_COUNT_OFFSET,
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val, 2);
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if (rc < 0) {
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pr_err("Failed to clear QBG FIFO Count, rc=%d\n", rc);
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@ -488,7 +487,7 @@ static int qbg_clear_fifo_data(struct qti_qbg *chip)
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for (i = 0; i < 10; i++) {
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val[0] = 0;
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rc = qbg_sdam_write(chip,
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QBG_SDAM_DATA_START_OFFSET(SDAM_CTRL0) + QBG_SDAM_INT_TEST_VAL,
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QBG_SDAM_DATA_START_OFFSET(chip, SDAM_CTRL0) + QBG_SDAM_INT_TEST_VAL,
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val, 1);
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if (rc < 0) {
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pr_err("Failed to SDAM0 test val to 0, rc=%d\n", rc);
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@ -497,7 +496,7 @@ static int qbg_clear_fifo_data(struct qti_qbg *chip)
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/* Handshake with PBS to access FIFO data */
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rc = qbg_sdam_read(chip,
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QBG_SDAM_DATA_START_OFFSET(SDAM_CTRL0) + QBG_SDAM_INT_TEST_VAL,
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QBG_SDAM_DATA_START_OFFSET(chip, SDAM_CTRL0) + QBG_SDAM_INT_TEST_VAL,
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val, 1);
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if (rc < 0) {
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pr_err("Failed to read QBG SDAM, rc=%d\n", rc);
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@ -513,7 +512,7 @@ static int qbg_clear_fifo_data(struct qti_qbg *chip)
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val[0] = QBG_SDAM_START_OFFSET;
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val[1] = 0x0;
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rc = qbg_sdam_write(chip,
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QBG_SDAM_DATA_START_OFFSET(SDAM_DATA0) + QBG_SDAM_DATA_PUSH_COUNTER_OFFSET,
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QBG_SDAM_DATA_START_OFFSET(chip, SDAM_DATA0) + QBG_SDAM_DATA_PUSH_COUNTER_OFFSET,
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val, 2);
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if (rc < 0) {
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pr_err("Failed to configure QBG data push counter, rc=%d\n", rc);
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@ -521,7 +520,7 @@ static int qbg_clear_fifo_data(struct qti_qbg *chip)
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}
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val[0] = 0x0;
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rc = qbg_sdam_write(chip,
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QBG_SDAM_DATA_START_OFFSET(SDAM_CTRL0) + QBG_SDAM_PBS_STATUS_OFFSET,
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QBG_SDAM_DATA_START_OFFSET(chip, SDAM_CTRL0) + QBG_SDAM_PBS_STATUS_OFFSET,
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val, 1);
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if (rc < 0) {
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pr_err("Failed to set QBG PBS status, rc=%d\n", rc);
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@ -538,7 +537,7 @@ static int qbg_init_sdam(struct qti_qbg *chip)
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val[0] = 0x80;
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rc = qbg_sdam_write(chip,
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QBG_SDAM_DATA_START_OFFSET(SDAM_CTRL0) + QBG_SDAM_INT_TEST1, val, 1);
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QBG_SDAM_DATA_START_OFFSET(chip, SDAM_CTRL0) + QBG_SDAM_INT_TEST1, val, 1);
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if (rc < 0) {
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pr_err("Failed to write QBG SDAM, rc=%d\n", rc);
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return rc;
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@ -546,7 +545,7 @@ static int qbg_init_sdam(struct qti_qbg *chip)
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val[0] = 0;
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rc = qbg_sdam_read(chip,
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QBG_SDAM_DATA_START_OFFSET(SDAM_CTRL0) + QBG_SDAM_INT_TEST_VAL,
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QBG_SDAM_DATA_START_OFFSET(chip, SDAM_CTRL0) + QBG_SDAM_INT_TEST_VAL,
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val, 1);
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if (rc < 0) {
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pr_err("Faiiled to read QBG SDAM, rc=%d\n", rc);
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@ -975,7 +974,7 @@ static int qbg_get_pon_reading(struct qti_qbg *chip, unsigned int *ocv,
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static int qbg_determine_pon_soc(struct qti_qbg *chip)
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{
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int rc;
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int rc, batt_temp;
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union power_supply_propval prop = {0, };
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unsigned long rtc_sec, time_diff = 0;
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unsigned int pon_ocv;
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@ -1556,7 +1555,7 @@ static int qbg_parse_sdam_dt(struct qti_qbg *chip, struct device_node *node)
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static int qbg_parse_dt(struct qti_qbg *chip)
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{
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struct device_node *node = chip->dev->of_node;
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int rc = 0, i;
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int rc = 0;
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u32 val;
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rc = qbg_parse_sdam_dt(chip, node);
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