msm: kgsl: Add back apriv bit for legacy targets

Commit ef5440e7b8 ("msm: kgsl: Remove nonsense around the a5xx and a6xx
SMMU table update") removed a lot of the cruft around a pagetable update
but unfortunately legacy targets still needed APRIV to write to the
pagetable_desc memory so add that part back in.

Change-Id: Ic0dedbad71544eaaf77efe1d523c9bf533cb4973
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
This commit is contained in:
Jordan Crouse 2020-05-18 10:46:50 -06:00
parent b2e689c2c7
commit 7b96268e45

View File

@ -6,6 +6,8 @@
#include <linux/slab.h>
#include "a3xx_reg.h"
#include "a5xx_reg.h"
#include "a6xx_reg.h"
#include "adreno.h"
#include "adreno_iommu.h"
#include "adreno_pm4types.h"
@ -185,6 +187,10 @@ static unsigned int _adreno_iommu_set_pt_v2_a5xx(struct kgsl_device *device,
*cmds++ = upper_32_bits(ttbr0);
*cmds++ = contextidr;
*cmds++ = cp_type4_packet(A5XX_CP_CNTL, 1);
*cmds++ = 1;
*cmds++ = cp_mem_packet(adreno_dev, CP_MEM_WRITE, 4, 1);
cmds += cp_gpuaddr(adreno_dev, cmds, (rb->pagetable_desc->gpuaddr +
PT_INFO_OFFSET(ttbr0)));
@ -192,6 +198,9 @@ static unsigned int _adreno_iommu_set_pt_v2_a5xx(struct kgsl_device *device,
*cmds++ = upper_32_bits(ttbr0);
*cmds++ = contextidr;
*cmds++ = cp_type4_packet(A5XX_CP_CNTL, 1);
*cmds++ = 0;
return cmds - cmds_orig;
}
@ -211,6 +220,11 @@ static unsigned int _adreno_iommu_set_pt_v2_a6xx(struct kgsl_device *device,
*cmds++ = contextidr;
*cmds++ = cb_num;
if (!ADRENO_FEATURE(adreno_dev, ADRENO_APRIV)) {
*cmds++ = cp_type4_packet(A6XX_CP_MISC_CNTL, 1);
*cmds++ = 1;
}
*cmds++ = cp_mem_packet(adreno_dev, CP_MEM_WRITE, 4, 1);
cmds += cp_gpuaddr(adreno_dev, cmds, (rb->pagetable_desc->gpuaddr +
PT_INFO_OFFSET(ttbr0)));
@ -218,6 +232,11 @@ static unsigned int _adreno_iommu_set_pt_v2_a6xx(struct kgsl_device *device,
*cmds++ = upper_32_bits(ttbr0);
*cmds++ = contextidr;
if (!ADRENO_FEATURE(adreno_dev, ADRENO_APRIV)) {
*cmds++ = cp_type4_packet(A6XX_CP_MISC_CNTL, 1);
*cmds++ = 0;
}
return cmds - cmds_orig;
}