This is the 5.4.207 stable release
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This commit is contained in:
commit
836d95bfdc
@ -876,7 +876,7 @@ cipso_cache_enable - BOOLEAN
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cipso_cache_bucket_size - INTEGER
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The CIPSO label cache consists of a fixed size hash table with each
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hash bucket containing a number of cache entries. This variable limits
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the number of entries in each hash bucket; the larger the value the
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the number of entries in each hash bucket; the larger the value is, the
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more CIPSO label mappings that can be cached. When the number of
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entries in a given hash bucket reaches this limit adding new entries
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causes the oldest entry in the bucket to be removed to make room.
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@ -966,7 +966,7 @@ ip_nonlocal_bind - BOOLEAN
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which can be quite useful - but may break some applications.
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Default: 0
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ip_dynaddr - BOOLEAN
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ip_dynaddr - INTEGER
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If set non-zero, enables support for dynamic addresses.
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If set to a non-zero value larger than 1, a kernel log
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message will be printed when dynamic address rewriting
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2
Makefile
2
Makefile
@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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VERSION = 5
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PATCHLEVEL = 4
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SUBLEVEL = 206
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SUBLEVEL = 207
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EXTRAVERSION =
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NAME = Kleptomaniac Octopus
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@ -226,7 +226,7 @@
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reg = <0x28>;
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#gpio-cells = <2>;
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gpio-controller;
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ngpio = <32>;
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ngpios = <62>;
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};
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sgtl5000: codec@a {
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@ -933,7 +933,7 @@
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clocks = <&pmc PMC_TYPE_PERIPHERAL 55>, <&pmc PMC_TYPE_GCK 55>;
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clock-names = "pclk", "gclk";
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assigned-clocks = <&pmc PMC_TYPE_CORE PMC_I2S1_MUX>;
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assigned-parrents = <&pmc PMC_TYPE_GCK 55>;
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assigned-clock-parents = <&pmc PMC_TYPE_GCK 55>;
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status = "disabled";
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};
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@ -515,7 +515,7 @@
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compatible = "st,stm32-cec";
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reg = <0x40016000 0x400>;
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interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc CEC_K>, <&clk_lse>;
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clocks = <&rcc CEC_K>, <&rcc CEC>;
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clock-names = "cec", "hdmi-cec";
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status = "disabled";
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};
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@ -169,7 +169,7 @@
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "mxicy,mx25l1606e", "winbond,w25q128";
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compatible = "mxicy,mx25l1606e", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <40000000>;
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};
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@ -27,6 +27,7 @@ enum {
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MT_HIGH_VECTORS,
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MT_MEMORY_RWX,
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MT_MEMORY_RW,
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MT_MEMORY_RO,
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MT_ROM,
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MT_MEMORY_RWX_NONCACHED,
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MT_MEMORY_RW_DTCM,
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@ -164,5 +164,31 @@ static inline unsigned long user_stack_pointer(struct pt_regs *regs)
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((current_stack_pointer | (THREAD_SIZE - 1)) - 7) - 1; \
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})
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/*
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* Update ITSTATE after normal execution of an IT block instruction.
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*
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* The 8 IT state bits are split into two parts in CPSR:
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* ITSTATE<1:0> are in CPSR<26:25>
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* ITSTATE<7:2> are in CPSR<15:10>
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*/
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static inline unsigned long it_advance(unsigned long cpsr)
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{
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if ((cpsr & 0x06000400) == 0) {
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/* ITSTATE<2:0> == 0 means end of IT block, so clear IT state */
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cpsr &= ~PSR_IT_MASK;
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} else {
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/* We need to shift left ITSTATE<4:0> */
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const unsigned long mask = 0x06001c00; /* Mask ITSTATE<4:0> */
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unsigned long it = cpsr & mask;
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it <<= 1;
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it |= it >> (27 - 10); /* Carry ITSTATE<2> to correct place */
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it &= mask;
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cpsr &= ~mask;
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cpsr |= it;
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}
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return cpsr;
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}
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#endif /* __ASSEMBLY__ */
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#endif
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@ -935,6 +935,9 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
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if (type == TYPE_LDST)
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do_alignment_finish_ldst(addr, instr, regs, offset);
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if (thumb_mode(regs))
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regs->ARM_cpsr = it_advance(regs->ARM_cpsr);
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return 0;
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bad_or_fault:
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@ -316,6 +316,13 @@ static struct mem_type mem_types[] __ro_after_init = {
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.prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
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.domain = DOMAIN_KERNEL,
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},
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[MT_MEMORY_RO] = {
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.prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
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L_PTE_XN | L_PTE_RDONLY,
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.prot_l1 = PMD_TYPE_TABLE,
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.prot_sect = PMD_TYPE_SECT,
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.domain = DOMAIN_KERNEL,
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},
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[MT_ROM] = {
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.prot_sect = PMD_TYPE_SECT,
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.domain = DOMAIN_KERNEL,
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@ -515,6 +522,7 @@ static void __init build_mem_type_table(void)
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/* Also setup NX memory mapping */
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mem_types[MT_MEMORY_RW].prot_sect |= PMD_SECT_XN;
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mem_types[MT_MEMORY_RO].prot_sect |= PMD_SECT_XN;
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}
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if (cpu_arch >= CPU_ARCH_ARMv7 && (cr & CR_TRE)) {
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/*
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@ -597,6 +605,7 @@ static void __init build_mem_type_table(void)
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mem_types[MT_ROM].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
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mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
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mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
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mem_types[MT_MEMORY_RO].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
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#endif
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/*
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@ -617,6 +626,8 @@ static void __init build_mem_type_table(void)
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mem_types[MT_MEMORY_RWX].prot_pte |= L_PTE_SHARED;
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mem_types[MT_MEMORY_RW].prot_sect |= PMD_SECT_S;
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mem_types[MT_MEMORY_RW].prot_pte |= L_PTE_SHARED;
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mem_types[MT_MEMORY_RO].prot_sect |= PMD_SECT_S;
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mem_types[MT_MEMORY_RO].prot_pte |= L_PTE_SHARED;
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mem_types[MT_MEMORY_DMA_READY].prot_pte |= L_PTE_SHARED;
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mem_types[MT_MEMORY_RWX_NONCACHED].prot_sect |= PMD_SECT_S;
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mem_types[MT_MEMORY_RWX_NONCACHED].prot_pte |= L_PTE_SHARED;
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@ -680,6 +691,8 @@ static void __init build_mem_type_table(void)
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mem_types[MT_MEMORY_RWX].prot_pte |= kern_pgprot;
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mem_types[MT_MEMORY_RW].prot_sect |= ecc_mask | cp->pmd;
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mem_types[MT_MEMORY_RW].prot_pte |= kern_pgprot;
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mem_types[MT_MEMORY_RO].prot_sect |= ecc_mask | cp->pmd;
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mem_types[MT_MEMORY_RO].prot_pte |= kern_pgprot;
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mem_types[MT_MEMORY_DMA_READY].prot_pte |= kern_pgprot;
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mem_types[MT_MEMORY_RWX_NONCACHED].prot_sect |= ecc_mask;
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mem_types[MT_ROM].prot_sect |= cp->pmd;
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@ -1361,7 +1374,7 @@ static void __init devicemaps_init(const struct machine_desc *mdesc)
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map.pfn = __phys_to_pfn(__atags_pointer & SECTION_MASK);
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map.virtual = FDT_FIXED_BASE;
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map.length = FDT_FIXED_SIZE;
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map.type = MT_ROM;
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map.type = MT_MEMORY_RO;
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create_mapping(&map);
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}
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@ -109,8 +109,7 @@ static unsigned int spectre_v2_install_workaround(unsigned int method)
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#else
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static unsigned int spectre_v2_install_workaround(unsigned int method)
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{
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pr_info("CPU%u: Spectre V2: workarounds disabled by configuration\n",
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smp_processor_id());
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pr_info_once("Spectre V2: workarounds disabled by configuration\n");
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return SPECTRE_VULNERABLE;
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}
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@ -222,10 +221,10 @@ static int spectre_bhb_install_workaround(int method)
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return SPECTRE_VULNERABLE;
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spectre_bhb_method = method;
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}
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pr_info("CPU%u: Spectre BHB: using %s workaround\n",
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smp_processor_id(), spectre_bhb_method_name(method));
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pr_info("CPU%u: Spectre BHB: enabling %s workaround for all CPUs\n",
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smp_processor_id(), spectre_bhb_method_name(method));
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}
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return SPECTRE_MITIGATED;
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}
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@ -14,6 +14,7 @@
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#include <linux/types.h>
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#include <linux/stddef.h>
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#include <asm/probes.h>
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#include <asm/ptrace.h>
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#include <asm/kprobes.h>
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void __init arm_probes_decode_init(void);
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@ -35,31 +36,6 @@ void __init find_str_pc_offset(void);
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#endif
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/*
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* Update ITSTATE after normal execution of an IT block instruction.
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*
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* The 8 IT state bits are split into two parts in CPSR:
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* ITSTATE<1:0> are in CPSR<26:25>
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* ITSTATE<7:2> are in CPSR<15:10>
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*/
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static inline unsigned long it_advance(unsigned long cpsr)
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{
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if ((cpsr & 0x06000400) == 0) {
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/* ITSTATE<2:0> == 0 means end of IT block, so clear IT state */
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cpsr &= ~PSR_IT_MASK;
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} else {
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/* We need to shift left ITSTATE<4:0> */
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const unsigned long mask = 0x06001c00; /* Mask ITSTATE<4:0> */
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unsigned long it = cpsr & mask;
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it <<= 1;
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it |= it >> (27 - 10); /* Carry ITSTATE<2> to correct place */
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it &= mask;
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cpsr &= ~mask;
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cpsr |= it;
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}
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return cpsr;
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}
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static inline void __kprobes bx_write_pc(long pcv, struct pt_regs *regs)
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{
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long cpsr = regs->ARM_cpsr;
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@ -383,6 +383,8 @@ static void __init clear_bss(void)
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{
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memset(__bss_start, 0,
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(unsigned long) __bss_stop - (unsigned long) __bss_start);
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memset(__brk_base, 0,
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(unsigned long) __brk_limit - (unsigned long) __brk_base);
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}
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static unsigned long get_cmd_line_ptr(void)
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|
@ -471,6 +471,10 @@ static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
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if (slew_done_gpio_np)
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slew_done_gpio = read_gpio(slew_done_gpio_np);
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of_node_put(volt_gpio_np);
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of_node_put(freq_gpio_np);
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of_node_put(slew_done_gpio_np);
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/* If we use the frequency GPIOs, calculate the min/max speeds based
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* on the bus frequencies
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*/
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|
@ -520,6 +520,7 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo
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ret = drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs,
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DRM_MODE_CONNECTOR_DisplayPort);
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if (ret) {
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drm_dp_mst_put_port_malloc(port);
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intel_connector_free(intel_connector);
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return NULL;
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}
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|
@ -339,6 +339,20 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt)
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mutex_lock(>->tlb_invalidate_lock);
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intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);
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spin_lock_irq(&uncore->lock); /* serialise invalidate with GT reset */
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for_each_engine(engine, gt, id) {
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struct reg_and_bit rb;
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rb = get_reg_and_bit(engine, regs == gen8_regs, regs, num);
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if (!i915_mmio_reg_offset(rb.reg))
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continue;
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intel_uncore_write_fw(uncore, rb.reg, rb.bit);
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}
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spin_unlock_irq(&uncore->lock);
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for_each_engine(engine, gt, id) {
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/*
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* HW architecture suggest typical invalidation time at 40us,
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@ -353,7 +367,6 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt)
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if (!i915_mmio_reg_offset(rb.reg))
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continue;
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intel_uncore_write_fw(uncore, rb.reg, rb.bit);
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if (__intel_wait_for_register_fw(uncore,
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rb.reg, rb.bit, 0,
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timeout_us, timeout_ms,
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|
@ -428,8 +428,8 @@ static int panfrost_ioctl_madvise(struct drm_device *dev, void *data,
|
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|
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if (args->retained) {
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if (args->madv == PANFROST_MADV_DONTNEED)
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list_add_tail(&bo->base.madv_list,
|
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&pfdev->shrinker_list);
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list_move_tail(&bo->base.madv_list,
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&pfdev->shrinker_list);
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else if (args->madv == PANFROST_MADV_WILLNEED)
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list_del_init(&bo->base.madv_list);
|
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}
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|
@ -66,7 +66,6 @@ static struct or1k_pic_dev or1k_pic_level = {
|
||||
.name = "or1k-PIC-level",
|
||||
.irq_unmask = or1k_pic_unmask,
|
||||
.irq_mask = or1k_pic_mask,
|
||||
.irq_mask_ack = or1k_pic_mask_ack,
|
||||
},
|
||||
.handle = handle_level_irq,
|
||||
.flags = IRQ_LEVEL | IRQ_NOPROBE,
|
||||
|
@ -1443,8 +1443,6 @@ static netdev_tx_t m_can_tx_handler(struct m_can_classdev *cdev)
|
||||
M_CAN_FIFO_DATA(i / 4),
|
||||
*(u32 *)(cf->data + i));
|
||||
|
||||
can_put_echo_skb(skb, dev, 0);
|
||||
|
||||
if (cdev->can.ctrlmode & CAN_CTRLMODE_FD) {
|
||||
cccr = m_can_read(cdev, M_CAN_CCCR);
|
||||
cccr &= ~(CCCR_CMR_MASK << CCCR_CMR_SHIFT);
|
||||
@ -1461,6 +1459,9 @@ static netdev_tx_t m_can_tx_handler(struct m_can_classdev *cdev)
|
||||
m_can_write(cdev, M_CAN_CCCR, cccr);
|
||||
}
|
||||
m_can_write(cdev, M_CAN_TXBTIE, 0x1);
|
||||
|
||||
can_put_echo_skb(skb, dev, 0);
|
||||
|
||||
m_can_write(cdev, M_CAN_TXBAR, 0x1);
|
||||
/* End of xmit function for version 3.0.x */
|
||||
} else {
|
||||
|
@ -1734,6 +1734,19 @@ static void ftgmac100_setup_clk(struct ftgmac100 *priv)
|
||||
FTGMAC_100MHZ);
|
||||
}
|
||||
|
||||
static bool ftgmac100_has_child_node(struct device_node *np, const char *name)
|
||||
{
|
||||
struct device_node *child_np = of_get_child_by_name(np, name);
|
||||
bool ret = false;
|
||||
|
||||
if (child_np) {
|
||||
ret = true;
|
||||
of_node_put(child_np);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ftgmac100_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct resource *res;
|
||||
@ -1850,7 +1863,7 @@ static int ftgmac100_probe(struct platform_device *pdev)
|
||||
|
||||
/* Display what we found */
|
||||
phy_attached_info(phy);
|
||||
} else if (np && !of_get_child_by_name(np, "mdio")) {
|
||||
} else if (np && !ftgmac100_has_child_node(np, "mdio")) {
|
||||
/* Support legacy ASPEED devicetree descriptions that decribe a
|
||||
* MAC with an embedded MDIO controller but have no "mdio"
|
||||
* child node. Automatically scan the MDIO bus for available
|
||||
|
@ -2056,7 +2056,10 @@ static int efx_ef10_try_update_nic_stats_vf(struct efx_nic *efx)
|
||||
|
||||
efx_update_sw_stats(efx, stats);
|
||||
out:
|
||||
/* releasing a DMA coherent buffer with BH disabled can panic */
|
||||
spin_unlock_bh(&efx->stats_lock);
|
||||
efx_nic_free_buffer(efx, &stats_buf);
|
||||
spin_lock_bh(&efx->stats_lock);
|
||||
return rc;
|
||||
}
|
||||
|
||||
|
@ -412,8 +412,9 @@ fail1:
|
||||
static int efx_ef10_pci_sriov_disable(struct efx_nic *efx, bool force)
|
||||
{
|
||||
struct pci_dev *dev = efx->pci_dev;
|
||||
struct efx_ef10_nic_data *nic_data = efx->nic_data;
|
||||
unsigned int vfs_assigned = pci_vfs_assigned(dev);
|
||||
int rc = 0;
|
||||
int i, rc = 0;
|
||||
|
||||
if (vfs_assigned && !force) {
|
||||
netif_info(efx, drv, efx->net_dev, "VFs are assigned to guests; "
|
||||
@ -421,10 +422,13 @@ static int efx_ef10_pci_sriov_disable(struct efx_nic *efx, bool force)
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
if (!vfs_assigned)
|
||||
if (!vfs_assigned) {
|
||||
for (i = 0; i < efx->vf_count; i++)
|
||||
nic_data->vf[i].pci_dev = NULL;
|
||||
pci_disable_sriov(dev);
|
||||
else
|
||||
} else {
|
||||
rc = -EBUSY;
|
||||
}
|
||||
|
||||
efx_ef10_sriov_free_vf_vswitching(efx);
|
||||
efx->vf_count = 0;
|
||||
|
@ -357,6 +357,7 @@ static void *tegra_eqos_probe(struct platform_device *pdev,
|
||||
data->fix_mac_speed = tegra_eqos_fix_speed;
|
||||
data->init = tegra_eqos_init;
|
||||
data->bsp_priv = eqos;
|
||||
data->sph_disable = 1;
|
||||
|
||||
err = tegra_eqos_init(pdev, eqos);
|
||||
if (err < 0)
|
||||
|
@ -1878,7 +1878,7 @@ static int sfp_probe(struct platform_device *pdev)
|
||||
|
||||
platform_set_drvdata(pdev, sfp);
|
||||
|
||||
err = devm_add_action(sfp->dev, sfp_cleanup, sfp);
|
||||
err = devm_add_action_or_reset(sfp->dev, sfp_cleanup, sfp);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
|
@ -482,6 +482,7 @@ void xenvif_rx_action(struct xenvif_queue *queue)
|
||||
queue->rx_copy.completed = &completed_skbs;
|
||||
|
||||
while (xenvif_rx_ring_slots_available(queue) &&
|
||||
!skb_queue_empty(&queue->rx_queue) &&
|
||||
work_done < RX_BATCH_SIZE) {
|
||||
xenvif_rx_skb(queue);
|
||||
work_done++;
|
||||
|
@ -122,7 +122,9 @@ static int nxp_nci_i2c_fw_read(struct nxp_nci_i2c_phy *phy,
|
||||
skb_put_data(*skb, &header, NXP_NCI_FW_HDR_LEN);
|
||||
|
||||
r = i2c_master_recv(client, skb_put(*skb, frame_len), frame_len);
|
||||
if (r != frame_len) {
|
||||
if (r < 0) {
|
||||
goto fw_read_exit_free_skb;
|
||||
} else if (r != frame_len) {
|
||||
nfc_err(&client->dev,
|
||||
"Invalid frame length: %u (expected %zu)\n",
|
||||
r, frame_len);
|
||||
@ -166,7 +168,9 @@ static int nxp_nci_i2c_nci_read(struct nxp_nci_i2c_phy *phy,
|
||||
return 0;
|
||||
|
||||
r = i2c_master_recv(client, skb_put(*skb, header.plen), header.plen);
|
||||
if (r != header.plen) {
|
||||
if (r < 0) {
|
||||
goto nci_read_exit_free_skb;
|
||||
} else if (r != header.plen) {
|
||||
nfc_err(&client->dev,
|
||||
"Invalid frame payload length: %u (expected %u)\n",
|
||||
r, header.plen);
|
||||
|
@ -4034,6 +4034,8 @@ void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
|
||||
nvme_stop_keep_alive(ctrl);
|
||||
flush_work(&ctrl->async_event_work);
|
||||
cancel_work_sync(&ctrl->fw_act_work);
|
||||
if (ctrl->ops->stop_ctrl)
|
||||
ctrl->ops->stop_ctrl(ctrl);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
|
||||
|
||||
|
@ -402,6 +402,7 @@ struct nvme_ctrl_ops {
|
||||
void (*free_ctrl)(struct nvme_ctrl *ctrl);
|
||||
void (*submit_async_event)(struct nvme_ctrl *ctrl);
|
||||
void (*delete_ctrl)(struct nvme_ctrl *ctrl);
|
||||
void (*stop_ctrl)(struct nvme_ctrl *ctrl);
|
||||
int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
|
||||
};
|
||||
|
||||
|
@ -973,6 +973,14 @@ static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl,
|
||||
}
|
||||
}
|
||||
|
||||
static void nvme_rdma_stop_ctrl(struct nvme_ctrl *nctrl)
|
||||
{
|
||||
struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
|
||||
|
||||
cancel_work_sync(&ctrl->err_work);
|
||||
cancel_delayed_work_sync(&ctrl->reconnect_work);
|
||||
}
|
||||
|
||||
static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl)
|
||||
{
|
||||
struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
|
||||
@ -1947,9 +1955,6 @@ static const struct blk_mq_ops nvme_rdma_admin_mq_ops = {
|
||||
|
||||
static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown)
|
||||
{
|
||||
cancel_work_sync(&ctrl->err_work);
|
||||
cancel_delayed_work_sync(&ctrl->reconnect_work);
|
||||
|
||||
nvme_rdma_teardown_io_queues(ctrl, shutdown);
|
||||
blk_mq_quiesce_queue(ctrl->ctrl.admin_q);
|
||||
if (shutdown)
|
||||
@ -1999,6 +2004,7 @@ static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = {
|
||||
.submit_async_event = nvme_rdma_submit_async_event,
|
||||
.delete_ctrl = nvme_rdma_delete_ctrl,
|
||||
.get_address = nvmf_get_address,
|
||||
.stop_ctrl = nvme_rdma_stop_ctrl,
|
||||
};
|
||||
|
||||
/*
|
||||
|
@ -1973,9 +1973,6 @@ static void nvme_tcp_error_recovery_work(struct work_struct *work)
|
||||
|
||||
static void nvme_tcp_teardown_ctrl(struct nvme_ctrl *ctrl, bool shutdown)
|
||||
{
|
||||
cancel_work_sync(&to_tcp_ctrl(ctrl)->err_work);
|
||||
cancel_delayed_work_sync(&to_tcp_ctrl(ctrl)->connect_work);
|
||||
|
||||
nvme_tcp_teardown_io_queues(ctrl, shutdown);
|
||||
blk_mq_quiesce_queue(ctrl->admin_q);
|
||||
if (shutdown)
|
||||
@ -2014,6 +2011,12 @@ out_fail:
|
||||
nvme_tcp_reconnect_or_remove(ctrl);
|
||||
}
|
||||
|
||||
static void nvme_tcp_stop_ctrl(struct nvme_ctrl *ctrl)
|
||||
{
|
||||
cancel_work_sync(&to_tcp_ctrl(ctrl)->err_work);
|
||||
cancel_delayed_work_sync(&to_tcp_ctrl(ctrl)->connect_work);
|
||||
}
|
||||
|
||||
static void nvme_tcp_free_ctrl(struct nvme_ctrl *nctrl)
|
||||
{
|
||||
struct nvme_tcp_ctrl *ctrl = to_tcp_ctrl(nctrl);
|
||||
@ -2322,6 +2325,7 @@ static const struct nvme_ctrl_ops nvme_tcp_ctrl_ops = {
|
||||
.submit_async_event = nvme_tcp_submit_async_event,
|
||||
.delete_ctrl = nvme_tcp_delete_ctrl,
|
||||
.get_address = nvmf_get_address,
|
||||
.stop_ctrl = nvme_tcp_stop_ctrl,
|
||||
};
|
||||
|
||||
static bool
|
||||
|
@ -62,6 +62,7 @@ enum hp_wmi_event_ids {
|
||||
HPWMI_BACKLIT_KB_BRIGHTNESS = 0x0D,
|
||||
HPWMI_PEAKSHIFT_PERIOD = 0x0F,
|
||||
HPWMI_BATTERY_CHARGE_PERIOD = 0x10,
|
||||
HPWMI_SANITIZATION_MODE = 0x17,
|
||||
};
|
||||
|
||||
struct bios_args {
|
||||
@ -629,6 +630,8 @@ static void hp_wmi_notify(u32 value, void *context)
|
||||
break;
|
||||
case HPWMI_BATTERY_CHARGE_PERIOD:
|
||||
break;
|
||||
case HPWMI_SANITIZATION_MODE:
|
||||
break;
|
||||
default:
|
||||
pr_info("Unknown event_id - %d - 0x%x\n", event_id, event_data);
|
||||
break;
|
||||
|
@ -735,7 +735,7 @@ static const struct of_device_id ixp4xx_npe_of_match[] = {
|
||||
static struct platform_driver ixp4xx_npe_driver = {
|
||||
.driver = {
|
||||
.name = "ixp4xx-npe",
|
||||
.of_match_table = of_match_ptr(ixp4xx_npe_of_match),
|
||||
.of_match_table = ixp4xx_npe_of_match,
|
||||
},
|
||||
.probe = ixp4xx_npe_probe,
|
||||
.remove = ixp4xx_npe_remove,
|
||||
|
@ -2828,8 +2828,10 @@ static int serial8250_request_std_resource(struct uart_8250_port *up)
|
||||
case UPIO_MEM32BE:
|
||||
case UPIO_MEM16:
|
||||
case UPIO_MEM:
|
||||
if (!port->mapbase)
|
||||
if (!port->mapbase) {
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
}
|
||||
|
||||
if (!request_mem_region(port->mapbase, size, "serial")) {
|
||||
ret = -EBUSY;
|
||||
|
@ -1335,6 +1335,15 @@ static void pl011_stop_rx(struct uart_port *port)
|
||||
pl011_dma_rx_stop(uap);
|
||||
}
|
||||
|
||||
static void pl011_throttle_rx(struct uart_port *port)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&port->lock, flags);
|
||||
pl011_stop_rx(port);
|
||||
spin_unlock_irqrestore(&port->lock, flags);
|
||||
}
|
||||
|
||||
static void pl011_enable_ms(struct uart_port *port)
|
||||
{
|
||||
struct uart_amba_port *uap =
|
||||
@ -1728,9 +1737,10 @@ static int pl011_allocate_irq(struct uart_amba_port *uap)
|
||||
*/
|
||||
static void pl011_enable_interrupts(struct uart_amba_port *uap)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned int i;
|
||||
|
||||
spin_lock_irq(&uap->port.lock);
|
||||
spin_lock_irqsave(&uap->port.lock, flags);
|
||||
|
||||
/* Clear out any spuriously appearing RX interrupts */
|
||||
pl011_write(UART011_RTIS | UART011_RXIS, uap, REG_ICR);
|
||||
@ -1752,7 +1762,14 @@ static void pl011_enable_interrupts(struct uart_amba_port *uap)
|
||||
if (!pl011_dma_rx_running(uap))
|
||||
uap->im |= UART011_RXIM;
|
||||
pl011_write(uap->im, uap, REG_IMSC);
|
||||
spin_unlock_irq(&uap->port.lock);
|
||||
spin_unlock_irqrestore(&uap->port.lock, flags);
|
||||
}
|
||||
|
||||
static void pl011_unthrottle_rx(struct uart_port *port)
|
||||
{
|
||||
struct uart_amba_port *uap = container_of(port, struct uart_amba_port, port);
|
||||
|
||||
pl011_enable_interrupts(uap);
|
||||
}
|
||||
|
||||
static int pl011_startup(struct uart_port *port)
|
||||
@ -2127,6 +2144,8 @@ static const struct uart_ops amba_pl011_pops = {
|
||||
.stop_tx = pl011_stop_tx,
|
||||
.start_tx = pl011_start_tx,
|
||||
.stop_rx = pl011_stop_rx,
|
||||
.throttle = pl011_throttle_rx,
|
||||
.unthrottle = pl011_unthrottle_rx,
|
||||
.enable_ms = pl011_enable_ms,
|
||||
.break_ctl = pl011_break_ctl,
|
||||
.startup = pl011_startup,
|
||||
|
@ -366,8 +366,7 @@ static void enable_tx_dma(struct s3c24xx_uart_port *ourport)
|
||||
/* Enable tx dma mode */
|
||||
ucon = rd_regl(port, S3C2410_UCON);
|
||||
ucon &= ~(S3C64XX_UCON_TXBURST_MASK | S3C64XX_UCON_TXMODE_MASK);
|
||||
ucon |= (dma_get_cache_alignment() >= 16) ?
|
||||
S3C64XX_UCON_TXBURST_16 : S3C64XX_UCON_TXBURST_1;
|
||||
ucon |= S3C64XX_UCON_TXBURST_1;
|
||||
ucon |= S3C64XX_UCON_TXMODE_DMA;
|
||||
wr_regl(port, S3C2410_UCON, ucon);
|
||||
|
||||
@ -640,7 +639,7 @@ static void enable_rx_dma(struct s3c24xx_uart_port *ourport)
|
||||
S3C64XX_UCON_DMASUS_EN |
|
||||
S3C64XX_UCON_TIMEOUT_EN |
|
||||
S3C64XX_UCON_RXMODE_MASK);
|
||||
ucon |= S3C64XX_UCON_RXBURST_16 |
|
||||
ucon |= S3C64XX_UCON_RXBURST_1 |
|
||||
0xf << S3C64XX_UCON_TIMEOUT_SHIFT |
|
||||
S3C64XX_UCON_EMPTYINT_EN |
|
||||
S3C64XX_UCON_TIMEOUT_EN |
|
||||
|
@ -73,6 +73,8 @@ static void stm32_config_reg_rs485(u32 *cr1, u32 *cr3, u32 delay_ADE,
|
||||
*cr3 |= USART_CR3_DEM;
|
||||
over8 = *cr1 & USART_CR1_OVER8;
|
||||
|
||||
*cr1 &= ~(USART_CR1_DEDT_MASK | USART_CR1_DEAT_MASK);
|
||||
|
||||
if (over8)
|
||||
rs485_deat_dedt = delay_ADE * baud * 8;
|
||||
else
|
||||
|
@ -3535,7 +3535,6 @@ static irqreturn_t dwc3_process_event_buf(struct dwc3_event_buffer *evt)
|
||||
}
|
||||
|
||||
evt->count = 0;
|
||||
evt->flags &= ~DWC3_EVENT_PENDING;
|
||||
ret = IRQ_HANDLED;
|
||||
|
||||
/* Unmask interrupt */
|
||||
@ -3548,6 +3547,9 @@ static irqreturn_t dwc3_process_event_buf(struct dwc3_event_buffer *evt)
|
||||
dwc3_writel(dwc->regs, DWC3_DEV_IMOD(0), dwc->imod_interval);
|
||||
}
|
||||
|
||||
/* Keep the clearing of DWC3_EVENT_PENDING at the end */
|
||||
evt->flags &= ~DWC3_EVENT_PENDING;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -1023,6 +1023,9 @@ static const struct usb_device_id id_table_combined[] = {
|
||||
{ USB_DEVICE(FTDI_VID, CHETCO_SEASMART_DISPLAY_PID) },
|
||||
{ USB_DEVICE(FTDI_VID, CHETCO_SEASMART_LITE_PID) },
|
||||
{ USB_DEVICE(FTDI_VID, CHETCO_SEASMART_ANALOG_PID) },
|
||||
/* Belimo Automation devices */
|
||||
{ USB_DEVICE(FTDI_VID, BELIMO_ZTH_PID) },
|
||||
{ USB_DEVICE(FTDI_VID, BELIMO_ZIP_PID) },
|
||||
/* ICP DAS I-756xU devices */
|
||||
{ USB_DEVICE(ICPDAS_VID, ICPDAS_I7560U_PID) },
|
||||
{ USB_DEVICE(ICPDAS_VID, ICPDAS_I7561U_PID) },
|
||||
|
@ -1568,6 +1568,12 @@
|
||||
#define CHETCO_SEASMART_LITE_PID 0xA5AE /* SeaSmart Lite USB Adapter */
|
||||
#define CHETCO_SEASMART_ANALOG_PID 0xA5AF /* SeaSmart Analog Adapter */
|
||||
|
||||
/*
|
||||
* Belimo Automation
|
||||
*/
|
||||
#define BELIMO_ZTH_PID 0x8050
|
||||
#define BELIMO_ZIP_PID 0xC811
|
||||
|
||||
/*
|
||||
* Unjo AB
|
||||
*/
|
||||
|
@ -1386,6 +1386,7 @@ void typec_set_pwr_opmode(struct typec_port *port,
|
||||
partner->usb_pd = 1;
|
||||
sysfs_notify(&partner_dev->kobj, NULL,
|
||||
"supports_usb_power_delivery");
|
||||
kobject_uevent(&partner_dev->kobj, KOBJ_CHANGE);
|
||||
}
|
||||
put_device(partner_dev);
|
||||
}
|
||||
|
@ -62,6 +62,7 @@
|
||||
#include <linux/list.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pm.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/virtio.h>
|
||||
@ -514,6 +515,28 @@ static const struct virtio_config_ops virtio_mmio_config_ops = {
|
||||
.bus_name = vm_bus_name,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
static int virtio_mmio_freeze(struct device *dev)
|
||||
{
|
||||
struct virtio_mmio_device *vm_dev = dev_get_drvdata(dev);
|
||||
|
||||
return virtio_device_freeze(&vm_dev->vdev);
|
||||
}
|
||||
|
||||
static int virtio_mmio_restore(struct device *dev)
|
||||
{
|
||||
struct virtio_mmio_device *vm_dev = dev_get_drvdata(dev);
|
||||
|
||||
if (vm_dev->version == 1)
|
||||
writel(PAGE_SIZE, vm_dev->base + VIRTIO_MMIO_GUEST_PAGE_SIZE);
|
||||
|
||||
return virtio_device_restore(&vm_dev->vdev);
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops virtio_mmio_pm_ops = {
|
||||
SET_SYSTEM_SLEEP_PM_OPS(virtio_mmio_freeze, virtio_mmio_restore)
|
||||
};
|
||||
#endif
|
||||
|
||||
static void virtio_mmio_release_dev(struct device *_d)
|
||||
{
|
||||
@ -767,6 +790,9 @@ static struct platform_driver virtio_mmio_driver = {
|
||||
.name = "virtio-mmio",
|
||||
.of_match_table = virtio_mmio_match,
|
||||
.acpi_match_table = ACPI_PTR(virtio_mmio_acpi_match),
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
.pm = &virtio_mmio_pm_ops,
|
||||
#endif
|
||||
},
|
||||
};
|
||||
|
||||
|
@ -4932,13 +4932,15 @@ long ext4_fallocate(struct file *file, int mode, loff_t offset, loff_t len)
|
||||
FALLOC_FL_INSERT_RANGE))
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
if (mode & FALLOC_FL_PUNCH_HOLE)
|
||||
return ext4_punch_hole(inode, offset, len);
|
||||
|
||||
inode_lock(inode);
|
||||
ret = ext4_convert_inline_data(inode);
|
||||
inode_unlock(inode);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (mode & FALLOC_FL_PUNCH_HOLE)
|
||||
return ext4_punch_hole(inode, offset, len);
|
||||
|
||||
if (mode & FALLOC_FL_COLLAPSE_RANGE)
|
||||
return ext4_collapse_range(inode, offset, len);
|
||||
|
||||
|
@ -4376,15 +4376,6 @@ int ext4_punch_hole(struct inode *inode, loff_t offset, loff_t length)
|
||||
|
||||
trace_ext4_punch_hole(inode, offset, length, 0);
|
||||
|
||||
ext4_clear_inode_state(inode, EXT4_STATE_MAY_INLINE_DATA);
|
||||
if (ext4_has_inline_data(inode)) {
|
||||
down_write(&EXT4_I(inode)->i_mmap_sem);
|
||||
ret = ext4_convert_inline_data(inode);
|
||||
up_write(&EXT4_I(inode)->i_mmap_sem);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* Write out all dirty pages to avoid race conditions
|
||||
* Then release them.
|
||||
|
@ -198,6 +198,9 @@ static inline int nilfs_acl_chmod(struct inode *inode)
|
||||
|
||||
static inline int nilfs_init_acl(struct inode *inode, struct inode *dir)
|
||||
{
|
||||
if (S_ISLNK(inode->i_mode))
|
||||
return 0;
|
||||
|
||||
inode->i_mode &= ~current_umask();
|
||||
return 0;
|
||||
}
|
||||
|
@ -255,7 +255,8 @@ struct css_set {
|
||||
* List of csets participating in the on-going migration either as
|
||||
* source or destination. Protected by cgroup_mutex.
|
||||
*/
|
||||
struct list_head mg_preload_node;
|
||||
struct list_head mg_src_preload_node;
|
||||
struct list_head mg_dst_preload_node;
|
||||
struct list_head mg_node;
|
||||
|
||||
/*
|
||||
|
@ -75,7 +75,7 @@ static inline bool raw_sk_bound_dev_eq(struct net *net, int bound_dev_if,
|
||||
int dif, int sdif)
|
||||
{
|
||||
#if IS_ENABLED(CONFIG_NET_L3_MASTER_DEV)
|
||||
return inet_bound_dev_eq(!!net->ipv4.sysctl_raw_l3mdev_accept,
|
||||
return inet_bound_dev_eq(READ_ONCE(net->ipv4.sysctl_raw_l3mdev_accept),
|
||||
bound_dev_if, dif, sdif);
|
||||
#else
|
||||
return inet_bound_dev_eq(true, bound_dev_if, dif, sdif);
|
||||
|
@ -1421,7 +1421,7 @@ void __sk_mem_reclaim(struct sock *sk, int amount);
|
||||
/* sysctl_mem values are in pages, we convert them in SK_MEM_QUANTUM units */
|
||||
static inline long sk_prot_mem_limits(const struct sock *sk, int index)
|
||||
{
|
||||
long val = sk->sk_prot->sysctl_mem[index];
|
||||
long val = READ_ONCE(sk->sk_prot->sysctl_mem[index]);
|
||||
|
||||
#if PAGE_SIZE > SK_MEM_QUANTUM
|
||||
val <<= PAGE_SHIFT - SK_MEM_QUANTUM_SHIFT;
|
||||
|
@ -97,7 +97,7 @@ TRACE_EVENT(sock_exceed_buf_limit,
|
||||
|
||||
TP_STRUCT__entry(
|
||||
__array(char, name, 32)
|
||||
__field(long *, sysctl_mem)
|
||||
__array(long, sysctl_mem, 3)
|
||||
__field(long, allocated)
|
||||
__field(int, sysctl_rmem)
|
||||
__field(int, rmem_alloc)
|
||||
@ -109,7 +109,9 @@ TRACE_EVENT(sock_exceed_buf_limit,
|
||||
|
||||
TP_fast_assign(
|
||||
strncpy(__entry->name, prot->name, 32);
|
||||
__entry->sysctl_mem = prot->sysctl_mem;
|
||||
__entry->sysctl_mem[0] = READ_ONCE(prot->sysctl_mem[0]);
|
||||
__entry->sysctl_mem[1] = READ_ONCE(prot->sysctl_mem[1]);
|
||||
__entry->sysctl_mem[2] = READ_ONCE(prot->sysctl_mem[2]);
|
||||
__entry->allocated = allocated;
|
||||
__entry->sysctl_rmem = sk_get_rmem0(sk, prot);
|
||||
__entry->rmem_alloc = atomic_read(&sk->sk_rmem_alloc);
|
||||
|
@ -743,7 +743,8 @@ struct css_set init_css_set = {
|
||||
.task_iters = LIST_HEAD_INIT(init_css_set.task_iters),
|
||||
.threaded_csets = LIST_HEAD_INIT(init_css_set.threaded_csets),
|
||||
.cgrp_links = LIST_HEAD_INIT(init_css_set.cgrp_links),
|
||||
.mg_preload_node = LIST_HEAD_INIT(init_css_set.mg_preload_node),
|
||||
.mg_src_preload_node = LIST_HEAD_INIT(init_css_set.mg_src_preload_node),
|
||||
.mg_dst_preload_node = LIST_HEAD_INIT(init_css_set.mg_dst_preload_node),
|
||||
.mg_node = LIST_HEAD_INIT(init_css_set.mg_node),
|
||||
|
||||
/*
|
||||
@ -1219,7 +1220,8 @@ static struct css_set *find_css_set(struct css_set *old_cset,
|
||||
INIT_LIST_HEAD(&cset->threaded_csets);
|
||||
INIT_HLIST_NODE(&cset->hlist);
|
||||
INIT_LIST_HEAD(&cset->cgrp_links);
|
||||
INIT_LIST_HEAD(&cset->mg_preload_node);
|
||||
INIT_LIST_HEAD(&cset->mg_src_preload_node);
|
||||
INIT_LIST_HEAD(&cset->mg_dst_preload_node);
|
||||
INIT_LIST_HEAD(&cset->mg_node);
|
||||
|
||||
/* Copy the set of subsystem state objects generated in
|
||||
@ -2629,21 +2631,27 @@ int cgroup_migrate_vet_dst(struct cgroup *dst_cgrp)
|
||||
*/
|
||||
void cgroup_migrate_finish(struct cgroup_mgctx *mgctx)
|
||||
{
|
||||
LIST_HEAD(preloaded);
|
||||
struct css_set *cset, *tmp_cset;
|
||||
|
||||
lockdep_assert_held(&cgroup_mutex);
|
||||
|
||||
spin_lock_irq(&css_set_lock);
|
||||
|
||||
list_splice_tail_init(&mgctx->preloaded_src_csets, &preloaded);
|
||||
list_splice_tail_init(&mgctx->preloaded_dst_csets, &preloaded);
|
||||
|
||||
list_for_each_entry_safe(cset, tmp_cset, &preloaded, mg_preload_node) {
|
||||
list_for_each_entry_safe(cset, tmp_cset, &mgctx->preloaded_src_csets,
|
||||
mg_src_preload_node) {
|
||||
cset->mg_src_cgrp = NULL;
|
||||
cset->mg_dst_cgrp = NULL;
|
||||
cset->mg_dst_cset = NULL;
|
||||
list_del_init(&cset->mg_preload_node);
|
||||
list_del_init(&cset->mg_src_preload_node);
|
||||
put_css_set_locked(cset);
|
||||
}
|
||||
|
||||
list_for_each_entry_safe(cset, tmp_cset, &mgctx->preloaded_dst_csets,
|
||||
mg_dst_preload_node) {
|
||||
cset->mg_src_cgrp = NULL;
|
||||
cset->mg_dst_cgrp = NULL;
|
||||
cset->mg_dst_cset = NULL;
|
||||
list_del_init(&cset->mg_dst_preload_node);
|
||||
put_css_set_locked(cset);
|
||||
}
|
||||
|
||||
@ -2685,7 +2693,7 @@ void cgroup_migrate_add_src(struct css_set *src_cset,
|
||||
|
||||
src_cgrp = cset_cgroup_from_root(src_cset, dst_cgrp->root);
|
||||
|
||||
if (!list_empty(&src_cset->mg_preload_node))
|
||||
if (!list_empty(&src_cset->mg_src_preload_node))
|
||||
return;
|
||||
|
||||
WARN_ON(src_cset->mg_src_cgrp);
|
||||
@ -2696,7 +2704,7 @@ void cgroup_migrate_add_src(struct css_set *src_cset,
|
||||
src_cset->mg_src_cgrp = src_cgrp;
|
||||
src_cset->mg_dst_cgrp = dst_cgrp;
|
||||
get_css_set(src_cset);
|
||||
list_add_tail(&src_cset->mg_preload_node, &mgctx->preloaded_src_csets);
|
||||
list_add_tail(&src_cset->mg_src_preload_node, &mgctx->preloaded_src_csets);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -2721,7 +2729,7 @@ int cgroup_migrate_prepare_dst(struct cgroup_mgctx *mgctx)
|
||||
|
||||
/* look up the dst cset for each src cset and link it to src */
|
||||
list_for_each_entry_safe(src_cset, tmp_cset, &mgctx->preloaded_src_csets,
|
||||
mg_preload_node) {
|
||||
mg_src_preload_node) {
|
||||
struct css_set *dst_cset;
|
||||
struct cgroup_subsys *ss;
|
||||
int ssid;
|
||||
@ -2740,7 +2748,7 @@ int cgroup_migrate_prepare_dst(struct cgroup_mgctx *mgctx)
|
||||
if (src_cset == dst_cset) {
|
||||
src_cset->mg_src_cgrp = NULL;
|
||||
src_cset->mg_dst_cgrp = NULL;
|
||||
list_del_init(&src_cset->mg_preload_node);
|
||||
list_del_init(&src_cset->mg_src_preload_node);
|
||||
put_css_set(src_cset);
|
||||
put_css_set(dst_cset);
|
||||
continue;
|
||||
@ -2748,8 +2756,8 @@ int cgroup_migrate_prepare_dst(struct cgroup_mgctx *mgctx)
|
||||
|
||||
src_cset->mg_dst_cset = dst_cset;
|
||||
|
||||
if (list_empty(&dst_cset->mg_preload_node))
|
||||
list_add_tail(&dst_cset->mg_preload_node,
|
||||
if (list_empty(&dst_cset->mg_dst_preload_node))
|
||||
list_add_tail(&dst_cset->mg_dst_preload_node,
|
||||
&mgctx->preloaded_dst_csets);
|
||||
else
|
||||
put_css_set(dst_cset);
|
||||
@ -2980,7 +2988,8 @@ static int cgroup_update_dfl_csses(struct cgroup *cgrp)
|
||||
goto out_finish;
|
||||
|
||||
spin_lock_irq(&css_set_lock);
|
||||
list_for_each_entry(src_cset, &mgctx.preloaded_src_csets, mg_preload_node) {
|
||||
list_for_each_entry(src_cset, &mgctx.preloaded_src_csets,
|
||||
mg_src_preload_node) {
|
||||
struct task_struct *task, *ntask;
|
||||
|
||||
/* all tasks in src_csets need to be migrated */
|
||||
|
@ -77,7 +77,7 @@ SCHED_FEAT(WARN_DOUBLE_CLOCK, false)
|
||||
SCHED_FEAT(RT_PUSH_IPI, true)
|
||||
#endif
|
||||
|
||||
SCHED_FEAT(RT_RUNTIME_SHARE, true)
|
||||
SCHED_FEAT(RT_RUNTIME_SHARE, false)
|
||||
SCHED_FEAT(LB_MIN, false)
|
||||
SCHED_FEAT(ATTACH_AGE_LOAD, true)
|
||||
|
||||
|
@ -1917,12 +1917,12 @@ bool do_notify_parent(struct task_struct *tsk, int sig)
|
||||
bool autoreap = false;
|
||||
u64 utime, stime;
|
||||
|
||||
BUG_ON(sig == -1);
|
||||
WARN_ON_ONCE(sig == -1);
|
||||
|
||||
/* do_notify_parent_cldstop should have been called instead. */
|
||||
BUG_ON(task_is_stopped_or_traced(tsk));
|
||||
/* do_notify_parent_cldstop should have been called instead. */
|
||||
WARN_ON_ONCE(task_is_stopped_or_traced(tsk));
|
||||
|
||||
BUG_ON(!tsk->ptrace &&
|
||||
WARN_ON_ONCE(!tsk->ptrace &&
|
||||
(tsk->group_leader != tsk || !thread_group_empty(tsk)));
|
||||
|
||||
/* Wake up all pidfd waiters */
|
||||
|
@ -1444,6 +1444,17 @@ static struct ctl_table vm_table[] = {
|
||||
.extra1 = SYSCTL_ZERO,
|
||||
.extra2 = &one_hundred,
|
||||
},
|
||||
#ifdef CONFIG_NUMA
|
||||
{
|
||||
.procname = "numa_stat",
|
||||
.data = &sysctl_vm_numa_stat,
|
||||
.maxlen = sizeof(int),
|
||||
.mode = 0644,
|
||||
.proc_handler = sysctl_vm_numa_stat_handler,
|
||||
.extra1 = SYSCTL_ZERO,
|
||||
.extra2 = SYSCTL_ONE,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_HUGETLB_PAGE
|
||||
{
|
||||
.procname = "nr_hugepages",
|
||||
@ -1460,15 +1471,6 @@ static struct ctl_table vm_table[] = {
|
||||
.mode = 0644,
|
||||
.proc_handler = &hugetlb_mempolicy_sysctl_handler,
|
||||
},
|
||||
{
|
||||
.procname = "numa_stat",
|
||||
.data = &sysctl_vm_numa_stat,
|
||||
.maxlen = sizeof(int),
|
||||
.mode = 0644,
|
||||
.proc_handler = sysctl_vm_numa_stat_handler,
|
||||
.extra1 = SYSCTL_ZERO,
|
||||
.extra2 = SYSCTL_ONE,
|
||||
},
|
||||
#endif
|
||||
{
|
||||
.procname = "hugetlb_shm_group",
|
||||
|
@ -4832,6 +4832,8 @@ static int parse_var_defs(struct hist_trigger_data *hist_data)
|
||||
|
||||
s = kstrdup(field_str, GFP_KERNEL);
|
||||
if (!s) {
|
||||
kfree(hist_data->attrs->var_defs.name[n_vars]);
|
||||
hist_data->attrs->var_defs.name[n_vars] = NULL;
|
||||
ret = -ENOMEM;
|
||||
goto free;
|
||||
}
|
||||
|
@ -1012,9 +1012,24 @@ int br_nf_hook_thresh(unsigned int hook, struct net *net,
|
||||
return okfn(net, sk, skb);
|
||||
|
||||
ops = nf_hook_entries_get_hook_ops(e);
|
||||
for (i = 0; i < e->num_hook_entries &&
|
||||
ops[i]->priority <= NF_BR_PRI_BRNF; i++)
|
||||
;
|
||||
for (i = 0; i < e->num_hook_entries; i++) {
|
||||
/* These hooks have already been called */
|
||||
if (ops[i]->priority < NF_BR_PRI_BRNF)
|
||||
continue;
|
||||
|
||||
/* These hooks have not been called yet, run them. */
|
||||
if (ops[i]->priority > NF_BR_PRI_BRNF)
|
||||
break;
|
||||
|
||||
/* take a closer look at NF_BR_PRI_BRNF. */
|
||||
if (ops[i]->hook == br_nf_pre_routing) {
|
||||
/* This hook diverted the skb to this function,
|
||||
* hooks after this have not been run yet.
|
||||
*/
|
||||
i++;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
nf_hook_state_init(&state, hook, NFPROTO_BRIDGE, indev, outdev,
|
||||
sk, net, okfn);
|
||||
|
@ -4955,7 +4955,6 @@ static int bpf_push_seg6_encap(struct sk_buff *skb, u32 type, void *hdr, u32 len
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
ipv6_hdr(skb)->payload_len = htons(skb->len - sizeof(struct ipv6hdr));
|
||||
skb_set_transport_header(skb, sizeof(struct ipv6hdr));
|
||||
|
||||
return seg6_lookup_nexthop(skb, NULL, 0);
|
||||
|
@ -1219,7 +1219,7 @@ static int inet_sk_reselect_saddr(struct sock *sk)
|
||||
if (new_saddr == old_saddr)
|
||||
return 0;
|
||||
|
||||
if (sock_net(sk)->ipv4.sysctl_ip_dynaddr > 1) {
|
||||
if (READ_ONCE(sock_net(sk)->ipv4.sysctl_ip_dynaddr) > 1) {
|
||||
pr_info("%s(): shifting inet->saddr from %pI4 to %pI4\n",
|
||||
__func__, &old_saddr, &new_saddr);
|
||||
}
|
||||
@ -1274,7 +1274,7 @@ int inet_sk_rebuild_header(struct sock *sk)
|
||||
* Other protocols have to map its equivalent state to TCP_SYN_SENT.
|
||||
* DCCP maps its DCCP_REQUESTING state to TCP_SYN_SENT. -acme
|
||||
*/
|
||||
if (!sock_net(sk)->ipv4.sysctl_ip_dynaddr ||
|
||||
if (!READ_ONCE(sock_net(sk)->ipv4.sysctl_ip_dynaddr) ||
|
||||
sk->sk_state != TCP_SYN_SENT ||
|
||||
(sk->sk_userlocks & SOCK_BINDADDR_LOCK) ||
|
||||
(err = inet_sk_reselect_saddr(sk)) != 0)
|
||||
|
@ -240,7 +240,7 @@ static int cipso_v4_cache_check(const unsigned char *key,
|
||||
struct cipso_v4_map_cache_entry *prev_entry = NULL;
|
||||
u32 hash;
|
||||
|
||||
if (!cipso_v4_cache_enabled)
|
||||
if (!READ_ONCE(cipso_v4_cache_enabled))
|
||||
return -ENOENT;
|
||||
|
||||
hash = cipso_v4_map_cache_hash(key, key_len);
|
||||
@ -297,13 +297,14 @@ static int cipso_v4_cache_check(const unsigned char *key,
|
||||
int cipso_v4_cache_add(const unsigned char *cipso_ptr,
|
||||
const struct netlbl_lsm_secattr *secattr)
|
||||
{
|
||||
int bkt_size = READ_ONCE(cipso_v4_cache_bucketsize);
|
||||
int ret_val = -EPERM;
|
||||
u32 bkt;
|
||||
struct cipso_v4_map_cache_entry *entry = NULL;
|
||||
struct cipso_v4_map_cache_entry *old_entry = NULL;
|
||||
u32 cipso_ptr_len;
|
||||
|
||||
if (!cipso_v4_cache_enabled || cipso_v4_cache_bucketsize <= 0)
|
||||
if (!READ_ONCE(cipso_v4_cache_enabled) || bkt_size <= 0)
|
||||
return 0;
|
||||
|
||||
cipso_ptr_len = cipso_ptr[1];
|
||||
@ -323,7 +324,7 @@ int cipso_v4_cache_add(const unsigned char *cipso_ptr,
|
||||
|
||||
bkt = entry->hash & (CIPSO_V4_CACHE_BUCKETS - 1);
|
||||
spin_lock_bh(&cipso_v4_cache[bkt].lock);
|
||||
if (cipso_v4_cache[bkt].size < cipso_v4_cache_bucketsize) {
|
||||
if (cipso_v4_cache[bkt].size < bkt_size) {
|
||||
list_add(&entry->list, &cipso_v4_cache[bkt].list);
|
||||
cipso_v4_cache[bkt].size += 1;
|
||||
} else {
|
||||
@ -1200,7 +1201,8 @@ static int cipso_v4_gentag_rbm(const struct cipso_v4_doi *doi_def,
|
||||
/* This will send packets using the "optimized" format when
|
||||
* possible as specified in section 3.4.2.6 of the
|
||||
* CIPSO draft. */
|
||||
if (cipso_v4_rbm_optfmt && ret_val > 0 && ret_val <= 10)
|
||||
if (READ_ONCE(cipso_v4_rbm_optfmt) && ret_val > 0 &&
|
||||
ret_val <= 10)
|
||||
tag_len = 14;
|
||||
else
|
||||
tag_len = 4 + ret_val;
|
||||
@ -1603,7 +1605,7 @@ int cipso_v4_validate(const struct sk_buff *skb, unsigned char **option)
|
||||
* all the CIPSO validations here but it doesn't
|
||||
* really specify _exactly_ what we need to validate
|
||||
* ... so, just make it a sysctl tunable. */
|
||||
if (cipso_v4_rbm_strictvalid) {
|
||||
if (READ_ONCE(cipso_v4_rbm_strictvalid)) {
|
||||
if (cipso_v4_map_lvl_valid(doi_def,
|
||||
tag[3]) < 0) {
|
||||
err_offset = opt_iter + 3;
|
||||
|
@ -1217,7 +1217,7 @@ static int fib_check_nh_nongw(struct net *net, struct fib_nh *nh,
|
||||
|
||||
nh->fib_nh_dev = in_dev->dev;
|
||||
dev_hold(nh->fib_nh_dev);
|
||||
nh->fib_nh_scope = RT_SCOPE_HOST;
|
||||
nh->fib_nh_scope = RT_SCOPE_LINK;
|
||||
if (!netif_carrier_ok(nh->fib_nh_dev))
|
||||
nh->fib_nh_flags |= RTNH_F_LINKDOWN;
|
||||
err = 0;
|
||||
|
@ -500,7 +500,7 @@ static void tnode_free(struct key_vector *tn)
|
||||
tn = container_of(head, struct tnode, rcu)->kv;
|
||||
}
|
||||
|
||||
if (tnode_free_size >= sysctl_fib_sync_mem) {
|
||||
if (tnode_free_size >= READ_ONCE(sysctl_fib_sync_mem)) {
|
||||
tnode_free_size = 0;
|
||||
synchronize_rcu();
|
||||
}
|
||||
|
@ -261,11 +261,12 @@ bool icmp_global_allow(void)
|
||||
spin_lock(&icmp_global.lock);
|
||||
delta = min_t(u32, now - icmp_global.stamp, HZ);
|
||||
if (delta >= HZ / 50) {
|
||||
incr = sysctl_icmp_msgs_per_sec * delta / HZ ;
|
||||
incr = READ_ONCE(sysctl_icmp_msgs_per_sec) * delta / HZ;
|
||||
if (incr)
|
||||
WRITE_ONCE(icmp_global.stamp, now);
|
||||
}
|
||||
credit = min_t(u32, icmp_global.credit + incr, sysctl_icmp_msgs_burst);
|
||||
credit = min_t(u32, icmp_global.credit + incr,
|
||||
READ_ONCE(sysctl_icmp_msgs_burst));
|
||||
if (credit) {
|
||||
/* We want to use a credit of one in average, but need to randomize
|
||||
* it for security reasons.
|
||||
@ -289,7 +290,7 @@ static bool icmpv4_mask_allow(struct net *net, int type, int code)
|
||||
return true;
|
||||
|
||||
/* Limit if icmp type is enabled in ratemask. */
|
||||
if (!((1 << type) & net->ipv4.sysctl_icmp_ratemask))
|
||||
if (!((1 << type) & READ_ONCE(net->ipv4.sysctl_icmp_ratemask)))
|
||||
return true;
|
||||
|
||||
return false;
|
||||
@ -327,7 +328,8 @@ static bool icmpv4_xrlim_allow(struct net *net, struct rtable *rt,
|
||||
|
||||
vif = l3mdev_master_ifindex(dst->dev);
|
||||
peer = inet_getpeer_v4(net->ipv4.peers, fl4->daddr, vif, 1);
|
||||
rc = inet_peer_xrlim_allow(peer, net->ipv4.sysctl_icmp_ratelimit);
|
||||
rc = inet_peer_xrlim_allow(peer,
|
||||
READ_ONCE(net->ipv4.sysctl_icmp_ratelimit));
|
||||
if (peer)
|
||||
inet_putpeer(peer);
|
||||
out:
|
||||
|
@ -148,16 +148,20 @@ static void inet_peer_gc(struct inet_peer_base *base,
|
||||
struct inet_peer *gc_stack[],
|
||||
unsigned int gc_cnt)
|
||||
{
|
||||
int peer_threshold, peer_maxttl, peer_minttl;
|
||||
struct inet_peer *p;
|
||||
__u32 delta, ttl;
|
||||
int i;
|
||||
|
||||
if (base->total >= inet_peer_threshold)
|
||||
peer_threshold = READ_ONCE(inet_peer_threshold);
|
||||
peer_maxttl = READ_ONCE(inet_peer_maxttl);
|
||||
peer_minttl = READ_ONCE(inet_peer_minttl);
|
||||
|
||||
if (base->total >= peer_threshold)
|
||||
ttl = 0; /* be aggressive */
|
||||
else
|
||||
ttl = inet_peer_maxttl
|
||||
- (inet_peer_maxttl - inet_peer_minttl) / HZ *
|
||||
base->total / inet_peer_threshold * HZ;
|
||||
ttl = peer_maxttl - (peer_maxttl - peer_minttl) / HZ *
|
||||
base->total / peer_threshold * HZ;
|
||||
for (i = 0; i < gc_cnt; i++) {
|
||||
p = gc_stack[i];
|
||||
|
||||
|
@ -171,6 +171,8 @@ int seg6_do_srh_encap(struct sk_buff *skb, struct ipv6_sr_hdr *osrh, int proto)
|
||||
}
|
||||
#endif
|
||||
|
||||
hdr->payload_len = htons(skb->len - sizeof(struct ipv6hdr));
|
||||
|
||||
skb_postpush_rcsum(skb, hdr, tot_len);
|
||||
|
||||
return 0;
|
||||
@ -223,6 +225,8 @@ int seg6_do_srh_inline(struct sk_buff *skb, struct ipv6_sr_hdr *osrh)
|
||||
}
|
||||
#endif
|
||||
|
||||
hdr->payload_len = htons(skb->len - sizeof(struct ipv6hdr));
|
||||
|
||||
skb_postpush_rcsum(skb, hdr, sizeof(struct ipv6hdr) + hdrlen);
|
||||
|
||||
return 0;
|
||||
@ -284,7 +288,6 @@ static int seg6_do_srh(struct sk_buff *skb)
|
||||
break;
|
||||
}
|
||||
|
||||
ipv6_hdr(skb)->payload_len = htons(skb->len - sizeof(struct ipv6hdr));
|
||||
skb_set_transport_header(skb, sizeof(struct ipv6hdr));
|
||||
|
||||
return 0;
|
||||
|
@ -421,7 +421,6 @@ static int input_action_end_b6(struct sk_buff *skb, struct seg6_local_lwt *slwt)
|
||||
if (err)
|
||||
goto drop;
|
||||
|
||||
ipv6_hdr(skb)->payload_len = htons(skb->len - sizeof(struct ipv6hdr));
|
||||
skb_set_transport_header(skb, sizeof(struct ipv6hdr));
|
||||
|
||||
seg6_lookup_nexthop(skb, NULL, 0);
|
||||
@ -453,7 +452,6 @@ static int input_action_end_b6_encap(struct sk_buff *skb,
|
||||
if (err)
|
||||
goto drop;
|
||||
|
||||
ipv6_hdr(skb)->payload_len = htons(skb->len - sizeof(struct ipv6hdr));
|
||||
skb_set_transport_header(skb, sizeof(struct ipv6hdr));
|
||||
|
||||
seg6_lookup_nexthop(skb, NULL, 0);
|
||||
|
@ -145,8 +145,8 @@ u16 __ieee80211_select_queue(struct ieee80211_sub_if_data *sdata,
|
||||
bool qos;
|
||||
|
||||
/* all mesh/ocb stations are required to support WME */
|
||||
if (sdata->vif.type == NL80211_IFTYPE_MESH_POINT ||
|
||||
sdata->vif.type == NL80211_IFTYPE_OCB)
|
||||
if (sta && (sdata->vif.type == NL80211_IFTYPE_MESH_POINT ||
|
||||
sdata->vif.type == NL80211_IFTYPE_OCB))
|
||||
qos = true;
|
||||
else if (sta)
|
||||
qos = sta->sta.wme;
|
||||
|
@ -455,6 +455,7 @@ static int tipc_sk_create(struct net *net, struct socket *sock,
|
||||
sock_init_data(sock, sk);
|
||||
tipc_set_sk_state(sk, TIPC_OPEN);
|
||||
if (tipc_sk_insert(tsk)) {
|
||||
sk_free(sk);
|
||||
pr_warn("Socket create failed; port number exhausted\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -75,7 +75,7 @@ static struct shash_desc *init_desc(char type, uint8_t hash_algo)
|
||||
{
|
||||
long rc;
|
||||
const char *algo;
|
||||
struct crypto_shash **tfm, *tmp_tfm = NULL;
|
||||
struct crypto_shash **tfm, *tmp_tfm;
|
||||
struct shash_desc *desc;
|
||||
|
||||
if (type == EVM_XATTR_HMAC) {
|
||||
@ -120,16 +120,13 @@ unlock:
|
||||
alloc:
|
||||
desc = kmalloc(sizeof(*desc) + crypto_shash_descsize(*tfm),
|
||||
GFP_KERNEL);
|
||||
if (!desc) {
|
||||
crypto_free_shash(tmp_tfm);
|
||||
if (!desc)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
}
|
||||
|
||||
desc->tfm = *tfm;
|
||||
|
||||
rc = crypto_shash_init(desc);
|
||||
if (rc) {
|
||||
crypto_free_shash(tmp_tfm);
|
||||
kfree(desc);
|
||||
return ERR_PTR(rc);
|
||||
}
|
||||
|
@ -352,7 +352,8 @@ int ima_appraise_measurement(enum ima_hooks func,
|
||||
goto out;
|
||||
}
|
||||
|
||||
status = evm_verifyxattr(dentry, XATTR_NAME_IMA, xattr_value, rc, iint);
|
||||
status = evm_verifyxattr(dentry, XATTR_NAME_IMA, xattr_value,
|
||||
rc < 0 ? 0 : rc, iint);
|
||||
switch (status) {
|
||||
case INTEGRITY_PASS:
|
||||
case INTEGRITY_PASS_IMMUTABLE:
|
||||
|
@ -905,6 +905,7 @@ static const struct snd_pci_quirk cxt5066_fixups[] = {
|
||||
SND_PCI_QUIRK(0x103c, 0x828c, "HP EliteBook 840 G4", CXT_FIXUP_HP_DOCK),
|
||||
SND_PCI_QUIRK(0x103c, 0x8299, "HP 800 G3 SFF", CXT_FIXUP_HP_MIC_NO_PRESENCE),
|
||||
SND_PCI_QUIRK(0x103c, 0x829a, "HP 800 G3 DM", CXT_FIXUP_HP_MIC_NO_PRESENCE),
|
||||
SND_PCI_QUIRK(0x103c, 0x82b4, "HP ProDesk 600 G3", CXT_FIXUP_HP_MIC_NO_PRESENCE),
|
||||
SND_PCI_QUIRK(0x103c, 0x836e, "HP ProBook 455 G5", CXT_FIXUP_MUTE_LED_GPIO),
|
||||
SND_PCI_QUIRK(0x103c, 0x837f, "HP ProBook 470 G5", CXT_FIXUP_MUTE_LED_GPIO),
|
||||
SND_PCI_QUIRK(0x103c, 0x83b2, "HP EliteBook 840 G5", CXT_FIXUP_HP_DOCK),
|
||||
|
@ -6427,6 +6427,7 @@ enum {
|
||||
ALC298_FIXUP_LENOVO_SPK_VOLUME,
|
||||
ALC256_FIXUP_DELL_INSPIRON_7559_SUBWOOFER,
|
||||
ALC269_FIXUP_ATIV_BOOK_8,
|
||||
ALC221_FIXUP_HP_288PRO_MIC_NO_PRESENCE,
|
||||
ALC221_FIXUP_HP_MIC_NO_PRESENCE,
|
||||
ALC256_FIXUP_ASUS_HEADSET_MODE,
|
||||
ALC256_FIXUP_ASUS_MIC,
|
||||
@ -7305,6 +7306,16 @@ static const struct hda_fixup alc269_fixups[] = {
|
||||
.chained = true,
|
||||
.chain_id = ALC269_FIXUP_NO_SHUTUP
|
||||
},
|
||||
[ALC221_FIXUP_HP_288PRO_MIC_NO_PRESENCE] = {
|
||||
.type = HDA_FIXUP_PINS,
|
||||
.v.pins = (const struct hda_pintbl[]) {
|
||||
{ 0x19, 0x01a1913c }, /* use as headset mic, without its own jack detect */
|
||||
{ 0x1a, 0x01813030 }, /* use as headphone mic, without its own jack detect */
|
||||
{ }
|
||||
},
|
||||
.chained = true,
|
||||
.chain_id = ALC269_FIXUP_HEADSET_MODE
|
||||
},
|
||||
[ALC221_FIXUP_HP_MIC_NO_PRESENCE] = {
|
||||
.type = HDA_FIXUP_PINS,
|
||||
.v.pins = (const struct hda_pintbl[]) {
|
||||
@ -8056,6 +8067,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
|
||||
SND_PCI_QUIRK(0x1025, 0x142b, "Acer Swift SF314-42", ALC255_FIXUP_ACER_MIC_NO_PRESENCE),
|
||||
SND_PCI_QUIRK(0x1025, 0x1430, "Acer TravelMate B311R-31", ALC256_FIXUP_ACER_MIC_NO_PRESENCE),
|
||||
SND_PCI_QUIRK(0x1028, 0x0470, "Dell M101z", ALC269_FIXUP_DELL_M101Z),
|
||||
SND_PCI_QUIRK(0x1028, 0x053c, "Dell Latitude E5430", ALC292_FIXUP_DELL_E7X),
|
||||
SND_PCI_QUIRK(0x1028, 0x054b, "Dell XPS one 2710", ALC275_FIXUP_DELL_XPS),
|
||||
SND_PCI_QUIRK(0x1028, 0x05bd, "Dell Latitude E6440", ALC292_FIXUP_DELL_E7X),
|
||||
SND_PCI_QUIRK(0x1028, 0x05be, "Dell Latitude E6540", ALC292_FIXUP_DELL_E7X),
|
||||
@ -8162,6 +8174,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
|
||||
SND_PCI_QUIRK(0x103c, 0x2335, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
|
||||
SND_PCI_QUIRK(0x103c, 0x2336, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
|
||||
SND_PCI_QUIRK(0x103c, 0x2337, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
|
||||
SND_PCI_QUIRK(0x103c, 0x2b5e, "HP 288 Pro G2 MT", ALC221_FIXUP_HP_288PRO_MIC_NO_PRESENCE),
|
||||
SND_PCI_QUIRK(0x103c, 0x802e, "HP Z240 SFF", ALC221_FIXUP_HP_MIC_NO_PRESENCE),
|
||||
SND_PCI_QUIRK(0x103c, 0x802f, "HP Z240", ALC221_FIXUP_HP_MIC_NO_PRESENCE),
|
||||
SND_PCI_QUIRK(0x103c, 0x820d, "HP Pavilion 15", ALC269_FIXUP_HP_MUTE_LED_MIC3),
|
||||
@ -8410,6 +8423,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
|
||||
SND_PCI_QUIRK(0x1d72, 0x1602, "RedmiBook", ALC255_FIXUP_XIAOMI_HEADSET_MIC),
|
||||
SND_PCI_QUIRK(0x1d72, 0x1701, "XiaomiNotebook Pro", ALC298_FIXUP_DELL1_MIC_NO_PRESENCE),
|
||||
SND_PCI_QUIRK(0x1d72, 0x1901, "RedmiBook 14", ALC256_FIXUP_ASUS_HEADSET_MIC),
|
||||
SND_PCI_QUIRK(0x1d72, 0x1945, "Redmi G", ALC256_FIXUP_ASUS_HEADSET_MIC),
|
||||
SND_PCI_QUIRK(0x1d72, 0x1947, "RedmiBook Air", ALC255_FIXUP_XIAOMI_HEADSET_MIC),
|
||||
SND_PCI_QUIRK(0x8086, 0x2074, "Intel NUC 8", ALC233_FIXUP_INTEL_NUC8_DMIC),
|
||||
SND_PCI_QUIRK(0x8086, 0x2080, "Intel NUC 8 Rugged", ALC256_FIXUP_INTEL_NUC8_RUGGED),
|
||||
@ -10260,6 +10274,7 @@ static const struct snd_pci_quirk alc662_fixup_tbl[] = {
|
||||
SND_PCI_QUIRK(0x103c, 0x1632, "HP RP5800", ALC662_FIXUP_HP_RP5800),
|
||||
SND_PCI_QUIRK(0x103c, 0x8719, "HP", ALC897_FIXUP_HP_HSMIC_VERB),
|
||||
SND_PCI_QUIRK(0x103c, 0x873e, "HP", ALC671_FIXUP_HP_HEADSET_MIC2),
|
||||
SND_PCI_QUIRK(0x103c, 0x877e, "HP 288 Pro G6", ALC671_FIXUP_HP_HEADSET_MIC2),
|
||||
SND_PCI_QUIRK(0x103c, 0x885f, "HP 288 Pro G8", ALC671_FIXUP_HP_HEADSET_MIC2),
|
||||
SND_PCI_QUIRK(0x1043, 0x1080, "Asus UX501VW", ALC668_FIXUP_HEADSET_MODE),
|
||||
SND_PCI_QUIRK(0x1043, 0x11cd, "Asus N550", ALC662_FIXUP_ASUS_Nx50),
|
||||
|
@ -122,6 +122,9 @@ static int cs47l15_in1_adc_put(struct snd_kcontrol *kcontrol,
|
||||
snd_soc_kcontrol_component(kcontrol);
|
||||
struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
|
||||
|
||||
if (!!ucontrol->value.integer.value[0] == cs47l15->in1_lp_mode)
|
||||
return 0;
|
||||
|
||||
switch (ucontrol->value.integer.value[0]) {
|
||||
case 0:
|
||||
/* Set IN1 to normal mode */
|
||||
@ -150,7 +153,7 @@ static int cs47l15_in1_adc_put(struct snd_kcontrol *kcontrol,
|
||||
break;
|
||||
}
|
||||
|
||||
return 0;
|
||||
return 1;
|
||||
}
|
||||
|
||||
static const struct snd_kcontrol_new cs47l15_snd_controls[] = {
|
||||
|
@ -568,7 +568,13 @@ int madera_out1_demux_put(struct snd_kcontrol *kcontrol,
|
||||
end:
|
||||
snd_soc_dapm_mutex_unlock(dapm);
|
||||
|
||||
return snd_soc_dapm_mux_update_power(dapm, kcontrol, mux, e, NULL);
|
||||
ret = snd_soc_dapm_mux_update_power(dapm, kcontrol, mux, e, NULL);
|
||||
if (ret < 0) {
|
||||
dev_err(madera->dev, "Failed to update demux power state: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return change;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(madera_out1_demux_put);
|
||||
|
||||
@ -847,7 +853,7 @@ static int madera_adsp_rate_put(struct snd_kcontrol *kcontrol,
|
||||
struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
|
||||
const int adsp_num = e->shift_l;
|
||||
const unsigned int item = ucontrol->value.enumerated.item[0];
|
||||
int ret;
|
||||
int ret = 0;
|
||||
|
||||
if (item >= e->items)
|
||||
return -EINVAL;
|
||||
@ -864,10 +870,10 @@ static int madera_adsp_rate_put(struct snd_kcontrol *kcontrol,
|
||||
"Cannot change '%s' while in use by active audio paths\n",
|
||||
kcontrol->id.name);
|
||||
ret = -EBUSY;
|
||||
} else {
|
||||
} else if (priv->adsp_rate_cache[adsp_num] != e->values[item]) {
|
||||
/* Volatile register so defer until the codec is powered up */
|
||||
priv->adsp_rate_cache[adsp_num] = e->values[item];
|
||||
ret = 0;
|
||||
ret = 1;
|
||||
}
|
||||
|
||||
mutex_unlock(&priv->rate_lock);
|
||||
|
@ -1788,6 +1788,9 @@ static int sgtl5000_i2c_remove(struct i2c_client *client)
|
||||
{
|
||||
struct sgtl5000_priv *sgtl5000 = i2c_get_clientdata(client);
|
||||
|
||||
regmap_write(sgtl5000->regmap, SGTL5000_CHIP_DIG_POWER, SGTL5000_DIG_POWER_DEFAULT);
|
||||
regmap_write(sgtl5000->regmap, SGTL5000_CHIP_ANA_POWER, SGTL5000_ANA_POWER_DEFAULT);
|
||||
|
||||
clk_disable_unprepare(sgtl5000->mclk);
|
||||
regulator_bulk_disable(sgtl5000->num_supplies, sgtl5000->supplies);
|
||||
regulator_bulk_free(sgtl5000->num_supplies, sgtl5000->supplies);
|
||||
@ -1795,6 +1798,11 @@ static int sgtl5000_i2c_remove(struct i2c_client *client)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void sgtl5000_i2c_shutdown(struct i2c_client *client)
|
||||
{
|
||||
sgtl5000_i2c_remove(client);
|
||||
}
|
||||
|
||||
static const struct i2c_device_id sgtl5000_id[] = {
|
||||
{"sgtl5000", 0},
|
||||
{},
|
||||
@ -1815,6 +1823,7 @@ static struct i2c_driver sgtl5000_i2c_driver = {
|
||||
},
|
||||
.probe = sgtl5000_i2c_probe,
|
||||
.remove = sgtl5000_i2c_remove,
|
||||
.shutdown = sgtl5000_i2c_shutdown,
|
||||
.id_table = sgtl5000_id,
|
||||
};
|
||||
|
||||
|
@ -80,6 +80,7 @@
|
||||
/*
|
||||
* SGTL5000_CHIP_DIG_POWER
|
||||
*/
|
||||
#define SGTL5000_DIG_POWER_DEFAULT 0x0000
|
||||
#define SGTL5000_ADC_EN 0x0040
|
||||
#define SGTL5000_DAC_EN 0x0020
|
||||
#define SGTL5000_DAP_POWERUP 0x0010
|
||||
|
@ -413,6 +413,7 @@ static int wm5110_put_dre(struct snd_kcontrol *kcontrol,
|
||||
unsigned int rnew = (!!ucontrol->value.integer.value[1]) << mc->rshift;
|
||||
unsigned int lold, rold;
|
||||
unsigned int lena, rena;
|
||||
bool change = false;
|
||||
int ret;
|
||||
|
||||
snd_soc_dapm_mutex_lock(dapm);
|
||||
@ -440,8 +441,8 @@ static int wm5110_put_dre(struct snd_kcontrol *kcontrol,
|
||||
goto err;
|
||||
}
|
||||
|
||||
ret = regmap_update_bits(arizona->regmap, ARIZONA_DRE_ENABLE,
|
||||
mask, lnew | rnew);
|
||||
ret = regmap_update_bits_check(arizona->regmap, ARIZONA_DRE_ENABLE,
|
||||
mask, lnew | rnew, &change);
|
||||
if (ret) {
|
||||
dev_err(arizona->dev, "Failed to set DRE: %d\n", ret);
|
||||
goto err;
|
||||
@ -454,6 +455,9 @@ static int wm5110_put_dre(struct snd_kcontrol *kcontrol,
|
||||
if (!rnew && rold)
|
||||
wm5110_clear_pga_volume(arizona, mc->rshift);
|
||||
|
||||
if (change)
|
||||
ret = 1;
|
||||
|
||||
err:
|
||||
snd_soc_dapm_mutex_unlock(dapm);
|
||||
|
||||
|
@ -530,7 +530,7 @@ int snd_soc_put_volsw_range(struct snd_kcontrol *kcontrol,
|
||||
return -EINVAL;
|
||||
if (mc->platform_max && tmp > mc->platform_max)
|
||||
return -EINVAL;
|
||||
if (tmp > mc->max - mc->min + 1)
|
||||
if (tmp > mc->max - mc->min)
|
||||
return -EINVAL;
|
||||
|
||||
if (invert)
|
||||
@ -551,7 +551,7 @@ int snd_soc_put_volsw_range(struct snd_kcontrol *kcontrol,
|
||||
return -EINVAL;
|
||||
if (mc->platform_max && tmp > mc->platform_max)
|
||||
return -EINVAL;
|
||||
if (tmp > mc->max - mc->min + 1)
|
||||
if (tmp > mc->max - mc->min)
|
||||
return -EINVAL;
|
||||
|
||||
if (invert)
|
||||
|
Loading…
Reference in New Issue
Block a user