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msm: kgsl: Dump cx regulator consumer list in case disable timeouts

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We would see the GPU recovery failure (or) GPU wake up problems
incase cx regulator disable wait timeouts. It’s important to dump
the cx regulator consumer list to understand the failures in case
of cx regulator disable wait timeouts.

Change-Id: I7bfca3d64dafae44645ae0651bf07580d7530829
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
This commit is contained in:
Hareesh Gundu 2021-05-26 14:32:20 +05:30
parent 30e5a66dad
commit 890c1cf450
4 changed files with 20 additions and 28 deletions
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17
drivers/gpu/msm/adreno_a6xx.c
View File

@ -347,24 +347,25 @@ static bool __disable_cx_regulator_wait(struct regulator *reg,
}
}
bool a6xx_cx_regulator_disable_wait(struct regulator *reg,
void a6xx_cx_regulator_disable_wait(struct regulator *reg,
struct kgsl_device *device, u32 timeout)
{
bool ret;
struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
if (IS_ERR_OR_NULL(reg))
return true;
return;
if (ADRENO_QUIRK(adreno_dev, ADRENO_QUIRK_CX_GDSC))
regulator_set_mode(reg, REGULATOR_MODE_IDLE);
ret = __disable_cx_regulator_wait(reg, device, timeout);
if (!__disable_cx_regulator_wait(reg, device, timeout)) {
dev_err(device->dev, "GPU CX wait timeout. Dumping CX votes:\n");
/* Dump the cx regulator consumer list */
qcom_clk_dump(NULL, reg, false);
}
if (ADRENO_QUIRK(adreno_dev, ADRENO_QUIRK_CX_GDSC))
regulator_set_mode(reg, REGULATOR_MODE_NORMAL);
return ret;
}
static void set_holi_sptprac_clock(struct adreno_device *adreno_dev, bool enable)
@ -2594,8 +2595,8 @@ static void a619_holi_regulator_disable_poll(struct kgsl_device *device)
/* Remove the vote for the vdd parent supply */
kgsl_regulator_set_voltage(device->dev, pwr->gx_gdsc_parent, 0);
if (!a6xx_cx_regulator_disable_wait(pwr->cx_gdsc, device, 200))
dev_err(device->dev, "Regulator vddcx is stuck on\n");
a6xx_cx_regulator_disable_wait(pwr->cx_gdsc, device, 200);
}
const struct adreno_gpudev adreno_a6xx_gpudev = {

4
drivers/gpu/msm/adreno_a6xx.h
View File

@ -283,10 +283,8 @@ static inline bool a6xx_is_smmu_stalled(struct kgsl_device *device)
*
* Disable the regulator and wait @timeout milliseconds for it to enter the
* disabled state.
*
* Return: True if the regulator was disabled or false if it timed out
*/
bool a6xx_cx_regulator_disable_wait(struct regulator *reg,
void a6xx_cx_regulator_disable_wait(struct regulator *reg,
struct kgsl_device *device, u32 timeout);
/* Preemption functions */

18
drivers/gpu/msm/adreno_a6xx_gmu.c
View File

@ -1761,8 +1761,7 @@ void a6xx_gmu_suspend(struct adreno_device *adreno_dev)
clk_bulk_disable_unprepare(gmu->num_clks, gmu->clks);
if (!a6xx_cx_regulator_disable_wait(gmu->cx_gdsc, device, 5000))
dev_err(&gmu->pdev->dev, "GMU CX gdsc off timeout\n");
a6xx_cx_regulator_disable_wait(gmu->cx_gdsc, device, 5000);
a6xx_rdpm_cx_freq_update(gmu, 0);
@ -2243,9 +2242,8 @@ clks_gdsc_off:
clk_bulk_disable_unprepare(gmu->num_clks, gmu->clks);
gdsc_off:
/* Pool to make sure that the CX is off */
if (!a6xx_cx_regulator_disable_wait(gmu->cx_gdsc, device, 5000))
dev_err(&gmu->pdev->dev, "GMU CX gdsc off timeout\n");
/* Poll to make sure that the CX is off */
a6xx_cx_regulator_disable_wait(gmu->cx_gdsc, device, 5000);
a6xx_rdpm_cx_freq_update(gmu, 0);
@ -2324,9 +2322,8 @@ clks_gdsc_off:
clk_bulk_disable_unprepare(gmu->num_clks, gmu->clks);
gdsc_off:
/* Pool to make sure that the CX is off */
if (!a6xx_cx_regulator_disable_wait(gmu->cx_gdsc, device, 5000))
dev_err(&gmu->pdev->dev, "GMU CX gdsc off timeout\n");
/* Poll to make sure that the CX is off */
a6xx_cx_regulator_disable_wait(gmu->cx_gdsc, device, 5000);
a6xx_rdpm_cx_freq_update(gmu, 0);
@ -2809,9 +2806,8 @@ static int a6xx_gmu_power_off(struct adreno_device *adreno_dev)
clk_bulk_disable_unprepare(gmu->num_clks, gmu->clks);
/* Pool to make sure that the CX is off */
if (!a6xx_cx_regulator_disable_wait(gmu->cx_gdsc, device, 5000))
dev_err(&gmu->pdev->dev, "GMU CX gdsc off timeout\n");
/* Poll to make sure that the CX is off */
a6xx_cx_regulator_disable_wait(gmu->cx_gdsc, device, 5000);
a6xx_rdpm_cx_freq_update(gmu, 0);

9
drivers/gpu/msm/adreno_a6xx_hwsched.c
View File

@ -217,8 +217,7 @@ clks_gdsc_off:
gdsc_off:
/* Poll to make sure that the CX is off */
if (!a6xx_cx_regulator_disable_wait(gmu->cx_gdsc, device, 5000))
dev_err(&gmu->pdev->dev, "GMU CX gdsc off timeout\n");
a6xx_cx_regulator_disable_wait(gmu->cx_gdsc, device, 5000);
a6xx_rdpm_cx_freq_update(gmu, 0);
@ -280,8 +279,7 @@ clks_gdsc_off:
gdsc_off:
/* Poll to make sure that the CX is off */
if (!a6xx_cx_regulator_disable_wait(gmu->cx_gdsc, device, 5000))
dev_err(&gmu->pdev->dev, "GMU CX gdsc off timeout\n");
a6xx_cx_regulator_disable_wait(gmu->cx_gdsc, device, 5000);
a6xx_rdpm_cx_freq_update(gmu, 0);
@ -383,8 +381,7 @@ static int a6xx_hwsched_gmu_power_off(struct adreno_device *adreno_dev)
clk_bulk_disable_unprepare(gmu->num_clks, gmu->clks);
/* Poll to make sure that the CX is off */
if (!a6xx_cx_regulator_disable_wait(gmu->cx_gdsc, device, 5000))
dev_err(&gmu->pdev->dev, "GMU CX gdsc off timeout\n");
a6xx_cx_regulator_disable_wait(gmu->cx_gdsc, device, 5000);
a6xx_rdpm_cx_freq_update(gmu, 0);