amd-xgbe: Delay AN timeout during KR training
[ Upstream commit 926446ae24c03311a480fb96eb78f0ce7ea6d091 ]
AN restart triggered during KR training not only aborts the KR training
process but also move the HW to unstable state. Driver has to wait upto
500ms or until the KR training is completed before restarting AN cycle.
Fixes: 7c12aa0877
("amd-xgbe: Move the PHY support into amd-xgbe")
Co-developed-by: Sudheesh Mavila <sudheesh.mavila@amd.com>
Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com>
Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com>
Acked-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -496,6 +496,7 @@ static enum xgbe_an xgbe_an73_tx_training(struct xgbe_prv_data *pdata,
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reg |= XGBE_KR_TRAINING_ENABLE;
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reg |= XGBE_KR_TRAINING_START;
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XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, reg);
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pdata->kr_start_time = jiffies;
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netif_dbg(pdata, link, pdata->netdev,
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"KR training initiated\n");
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@ -632,6 +633,8 @@ static enum xgbe_an xgbe_an73_incompat_link(struct xgbe_prv_data *pdata)
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xgbe_switch_mode(pdata);
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pdata->an_result = XGBE_AN_READY;
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xgbe_an_restart(pdata);
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return XGBE_AN_INCOMPAT_LINK;
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@ -1275,9 +1278,30 @@ static bool xgbe_phy_aneg_done(struct xgbe_prv_data *pdata)
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static void xgbe_check_link_timeout(struct xgbe_prv_data *pdata)
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{
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unsigned long link_timeout;
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unsigned long kr_time;
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int wait;
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link_timeout = pdata->link_check + (XGBE_LINK_TIMEOUT * HZ);
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if (time_after(jiffies, link_timeout)) {
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if ((xgbe_cur_mode(pdata) == XGBE_MODE_KR) &&
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pdata->phy.autoneg == AUTONEG_ENABLE) {
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/* AN restart should not happen while KR training is in progress.
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* The while loop ensures no AN restart during KR training,
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* waits up to 500ms and AN restart is triggered only if KR
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* training is failed.
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*/
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wait = XGBE_KR_TRAINING_WAIT_ITER;
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while (wait--) {
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kr_time = pdata->kr_start_time +
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msecs_to_jiffies(XGBE_AN_MS_TIMEOUT);
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if (time_after(jiffies, kr_time))
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break;
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/* AN restart is not required, if AN result is COMPLETE */
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if (pdata->an_result == XGBE_AN_COMPLETE)
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return;
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usleep_range(10000, 11000);
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}
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}
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netif_dbg(pdata, link, pdata->netdev, "AN link timeout\n");
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xgbe_phy_config_aneg(pdata);
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}
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@ -290,6 +290,7 @@
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/* Auto-negotiation */
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#define XGBE_AN_MS_TIMEOUT 500
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#define XGBE_LINK_TIMEOUT 5
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#define XGBE_KR_TRAINING_WAIT_ITER 50
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#define XGBE_SGMII_AN_LINK_STATUS BIT(1)
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#define XGBE_SGMII_AN_LINK_SPEED (BIT(2) | BIT(3))
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@ -1266,6 +1267,7 @@ struct xgbe_prv_data {
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unsigned int parallel_detect;
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unsigned int fec_ability;
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unsigned long an_start;
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unsigned long kr_start_time;
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enum xgbe_an_mode an_mode;
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/* I2C support */
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