coresight-tmc: increase qdss pcie sw path throughput
Increase throughput for qdss pcie sw path. Change-Id: I4bb52e81d2617d8e83d0dcfe525cad2f6f5ca93a Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
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29910cbf29
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931dbd1b07
@ -1129,9 +1129,11 @@ tmc_etr_setup_sysfs_buf(struct tmc_drvdata *drvdata)
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&& drvdata->byte_cntr->sw_usb)
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&& drvdata->byte_cntr->sw_usb)
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new_buf = tmc_alloc_etr_buf(drvdata, TMC_ETR_SW_USB_BUF_SIZE,
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new_buf = tmc_alloc_etr_buf(drvdata, TMC_ETR_SW_USB_BUF_SIZE,
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0, cpu_to_node(0), NULL);
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0, cpu_to_node(0), NULL);
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else if (drvdata->out_mode == TMC_ETR_OUT_MODE_PCIE)
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else if (drvdata->out_mode == TMC_ETR_OUT_MODE_PCIE) {
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new_buf = tmc_alloc_etr_buf(drvdata, TMC_ETR_PCIE_MEM_SIZE,
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new_buf = tmc_alloc_etr_buf(drvdata, TMC_ETR_PCIE_MEM_SIZE,
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0, cpu_to_node(0), NULL);
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0, cpu_to_node(0), NULL);
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drvdata->size = TMC_ETR_PCIE_MEM_SIZE;
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}
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else
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else
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new_buf = tmc_alloc_etr_buf(drvdata, drvdata->size,
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new_buf = tmc_alloc_etr_buf(drvdata, drvdata->size,
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0, cpu_to_node(0), NULL);
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0, cpu_to_node(0), NULL);
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@ -104,7 +104,7 @@
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#define TMC_ETR_BAM_PIPE_INDEX 0
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#define TMC_ETR_BAM_PIPE_INDEX 0
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#define TMC_ETR_BAM_NR_PIPES 2
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#define TMC_ETR_BAM_NR_PIPES 2
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#define TMC_ETR_PCIE_MEM_SIZE 0x400000
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#define TMC_ETR_PCIE_MEM_SIZE 0x2000000
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#define TMC_AUTH_NSID_MASK GENMASK(1, 0)
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#define TMC_AUTH_NSID_MASK GENMASK(1, 0)
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