Merge "msm: vidc: update calculation for BSE LB write for decoder"
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9cdb05ab74
@ -32,6 +32,7 @@ static unsigned long __calculate_decoder(struct vidc_bus_vote_data *d)
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/* Derived parameters */
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int lcu_per_frame, collocated_bytes_per_lcu, tnbr_per_lcu;
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unsigned long bitrate;
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unsigned int num_vpp_pipes;
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fp_t bins_to_bit_factor, vsp_read_factor, vsp_write_factor,
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dpb_factor, dpb_write_factor, y_bw_no_ubwc_8bpp;
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@ -83,6 +84,8 @@ static unsigned long __calculate_decoder(struct vidc_bus_vote_data *d)
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opb_write_compression_factor = opb_compression_enabled ?
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dpb_write_compression_factor : FP_ONE;
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num_vpp_pipes = d->num_vpp_pipes;
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if (d->codec == HAL_VIDEO_CODEC_HEVC ||
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d->codec == HAL_VIDEO_CODEC_VP9) {
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/* H264, VP8, MPEG2 use the same settings */
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@ -163,7 +166,14 @@ static unsigned long __calculate_decoder(struct vidc_bus_vote_data *d)
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ddr.line_buffer_read =
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fp_div(FP_INT(tnbr_per_lcu * lcu_per_frame * fps),
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FP_INT(bps(1)));
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ddr.line_buffer_write = ddr.line_buffer_read;
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/* This change is applicable for all IRIS2 targets,
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* but currently being done for IRIS2 with 2 pipes
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* only due to timeline constraints.
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*/
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if((num_vpp_pipes == 2) && (is_h264_category))
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ddr.line_buffer_write = fp_div(ddr.line_buffer_read,FP_INT(2));
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else
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ddr.line_buffer_write = ddr.line_buffer_read;
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if (llc_top_line_buf_enabled) {
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llc.line_buffer_read = ddr.line_buffer_read;
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llc.line_buffer_write = ddr.line_buffer_write;
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@ -456,6 +456,9 @@ int msm_comm_vote_bus(struct msm_vidc_inst *inst)
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if (core->resources.sys_cache_res_set)
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vote_data->use_sys_cache = true;
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vote_data->num_vpp_pipes =
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inst->core->platform_data->num_vpp_pipes;
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call_core_op(core, calc_bw, vote_data);
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}
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@ -427,6 +427,7 @@ struct vidc_bus_vote_data {
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bool b_frames_enabled;
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unsigned long calc_bw_ddr;
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unsigned long calc_bw_llcc;
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u32 num_vpp_pipes;
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};
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struct profile_data {
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