soc: Add ratelimit to supress the pr_err/dev_err.

Add ratelimit to supress the logs flooding at the
time of SSR.In all places defined ratelimit as,
in 1sec one debug msg prints.

Change-Id: I6dfe140848e5cecb1b311c432f8311cdf0615a58
Signed-off-by: Prasad Kumpatla <nkumpat@codeaurora.org>
This commit is contained in:
Prasad Kumpatla 2020-09-02 19:59:00 +05:30
parent c7638af482
commit a07613afcd
6 changed files with 47 additions and 17 deletions

View File

@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.
*/
#include <linux/kernel.h>
@ -14,6 +14,7 @@
#include <linux/pinctrl/consumer.h>
#include <linux/platform_device.h>
#include <dt-bindings/clock/qcom,audio-ext-clk.h>
#include <linux/ratelimit.h>
#include <dsp/q6afe-v2.h>
#include "audio-ext-clk-up.h"
@ -67,6 +68,7 @@ static int audio_ext_clk_prepare(struct clk_hw *hw)
struct audio_ext_clk_priv *clk_priv = to_audio_clk(hw);
struct pinctrl_info *pnctrl_info = &clk_priv->audio_clk.pnctrl_info;
int ret;
static DEFINE_RATELIMIT_STATE(rtl, 1 * HZ, 1);
if ((clk_priv->clk_src >= AUDIO_EXT_CLK_LPASS) &&
(clk_priv->clk_src < AUDIO_EXT_CLK_LPASS_MAX)) {
@ -75,7 +77,8 @@ static int audio_ext_clk_prepare(struct clk_hw *hw)
__func__, clk_priv->clk_src);
ret = afe_set_lpass_clk_cfg(IDX_RSVD_3, &clk_priv->clk_cfg);
if (ret < 0) {
pr_err_ratelimited("%s afe_set_digital_codec_core_clock failed\n",
if (__ratelimit(&rtl))
pr_err_ratelimited("%s afe_set_digital_codec_core_clock failed\n",
__func__);
return ret;
}
@ -101,6 +104,7 @@ static void audio_ext_clk_unprepare(struct clk_hw *hw)
struct audio_ext_clk_priv *clk_priv = to_audio_clk(hw);
struct pinctrl_info *pnctrl_info = &clk_priv->audio_clk.pnctrl_info;
int ret;
static DEFINE_RATELIMIT_STATE(rtl, 1 * HZ, 1);
if (pnctrl_info->pinctrl) {
ret = pinctrl_select_state(pnctrl_info->pinctrl,
@ -118,9 +122,11 @@ static void audio_ext_clk_unprepare(struct clk_hw *hw)
trace_printk("%s: unvote for %d clock\n",
__func__, clk_priv->clk_src);
ret = afe_set_lpass_clk_cfg(IDX_RSVD_3, &clk_priv->clk_cfg);
if (ret < 0)
pr_err_ratelimited("%s: afe_set_lpass_clk_cfg failed, ret = %d\n",
if (ret < 0) {
if (__ratelimit(&rtl))
pr_err_ratelimited("%s: afe_set_lpass_clk_cfg failed, ret = %d\n",
__func__, ret);
}
}
if (pnctrl_info->base)
@ -149,6 +155,7 @@ static int lpass_hw_vote_prepare(struct clk_hw *hw)
{
struct audio_ext_clk_priv *clk_priv = to_audio_clk(hw);
int ret;
static DEFINE_RATELIMIT_STATE(rtl, 1 * HZ, 1);
if (clk_priv->clk_src == AUDIO_EXT_CLK_LPASS_CORE_HW_VOTE) {
trace_printk("%s: vote for %d clock\n",
@ -170,7 +177,8 @@ static int lpass_hw_vote_prepare(struct clk_hw *hw)
"LPASS_HW_DCODEC",
&clk_priv->lpass_audio_hwvote_client_handle);
if (ret < 0) {
pr_err("%s lpass audio hw vote failed %d\n",
if (__ratelimit(&rtl))
pr_err("%s lpass audio hw vote failed %d\n",
__func__, ret);
return ret;
}

View File

@ -15,6 +15,7 @@
#include <linux/pm_runtime.h>
#include <soc/swr-common.h>
#include <dsp/digital-cdc-rsc-mgr.h>
#include <linux/ratelimit.h>
#include "bolero-cdc.h"
#include "internal.h"
#include "bolero-clk-rsc.h"
@ -1444,6 +1445,7 @@ int bolero_runtime_resume(struct device *dev)
{
struct bolero_priv *priv = dev_get_drvdata(dev->parent);
int ret = 0;
static DEFINE_RATELIMIT_STATE(rtl, 1 * HZ, 1);
mutex_lock(&priv->vote_lock);
if (priv->lpass_core_hw_vote == NULL) {
@ -1472,8 +1474,9 @@ audio_vote:
if (priv->core_audio_vote_count == 0) {
ret = digital_cdc_rsc_mgr_hw_vote_enable(priv->lpass_audio_hw_vote);
if (ret < 0) {
dev_err(dev, "%s:lpass audio hw enable failed\n",
__func__);
if (__ratelimit(&rtl))
dev_err(dev, "%s:lpass audio hw enable failed\n",
__func__);
goto done;
}
}

View File

@ -11,6 +11,7 @@
#include <linux/kernel.h>
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/ratelimit.h>
#include "bolero-cdc.h"
#include "bolero-clk-rsc.h"
@ -193,13 +194,15 @@ static int bolero_clk_rsc_mux0_clk_request(struct bolero_clk_rsc *priv,
bool enable)
{
int ret = 0;
static DEFINE_RATELIMIT_STATE(rtl, 1 * HZ, 1);
if (enable) {
/* Enable Requested Core clk */
if (priv->clk_cnt[clk_id] == 0) {
ret = clk_prepare_enable(priv->clk[clk_id]);
if (ret < 0) {
dev_err_ratelimited(priv->dev, "%s:clk_id %d enable failed\n",
if (__ratelimit(&rtl))
dev_err_ratelimited(priv->dev, "%s:clk_id %d enable failed\n",
__func__, clk_id);
goto done;
}
@ -207,7 +210,8 @@ static int bolero_clk_rsc_mux0_clk_request(struct bolero_clk_rsc *priv,
ret = clk_prepare_enable(
priv->clk[clk_id + NPL_CLK_OFFSET]);
if (ret < 0) {
dev_err_ratelimited(priv->dev, "%s:clk_id %d enable failed\n",
if (__ratelimit(&rtl))
dev_err_ratelimited(priv->dev, "%s:clk_id %d enable failed\n",
__func__,
clk_id + NPL_CLK_OFFSET);
goto err;
@ -246,6 +250,7 @@ static int bolero_clk_rsc_mux1_clk_request(struct bolero_clk_rsc *priv,
int ret = 0;
int default_clk_id = priv->default_clk_id[clk_id];
u32 muxsel = 0;
static DEFINE_RATELIMIT_STATE(rtl, 1 * HZ, 1);
clk_muxsel = bolero_clk_rsc_get_clk_muxsel(priv, clk_id);
if (!clk_muxsel) {
@ -265,15 +270,17 @@ static int bolero_clk_rsc_mux1_clk_request(struct bolero_clk_rsc *priv,
ret = clk_prepare_enable(priv->clk[clk_id]);
if (ret < 0) {
dev_err_ratelimited(priv->dev, "%s:clk_id %d enable failed\n",
__func__, clk_id);
if (__ratelimit(&rtl))
dev_err_ratelimited(priv->dev, "%s:clk_id %d enable failed\n",
__func__, clk_id);
goto err_clk;
}
if (priv->clk[clk_id + NPL_CLK_OFFSET]) {
ret = clk_prepare_enable(
priv->clk[clk_id + NPL_CLK_OFFSET]);
if (ret < 0) {
dev_err_ratelimited(priv->dev, "%s:clk_id %d enable failed\n",
if (__ratelimit(&rtl))
dev_err_ratelimited(priv->dev, "%s:clk_id %d enable failed\n",
__func__,
clk_id + NPL_CLK_OFFSET);
goto err_npl_clk;

View File

@ -17,6 +17,7 @@
#include <dsp/q6audio-v2.h>
#include <dsp/q6common.h>
#include <dsp/q6core.h>
#include <linux/ratelimit.h>
#include <dsp/msm-audio-event-notify.h>
#include <ipc/apr_tal.h>
#include "adsp_err.h"
@ -9216,6 +9217,7 @@ int afe_set_lpass_clk_cfg(int index, struct afe_clk_set *cfg)
{
struct param_hdr_v3 param_hdr;
int ret = 0;
static DEFINE_RATELIMIT_STATE(rtl, 1 * HZ, 1);
if (!cfg) {
pr_err("%s: clock cfg is NULL\n", __func__);
@ -9254,7 +9256,8 @@ int afe_set_lpass_clk_cfg(int index, struct afe_clk_set *cfg)
ret = q6afe_svc_pack_and_set_param_in_band(index, param_hdr,
(u8 *) cfg);
if (ret < 0) {
pr_err_ratelimited("%s: AFE clk cfg failed with ret %d\n",
if (__ratelimit(&rtl))
pr_err_ratelimited("%s: AFE clk cfg failed with ret %d\n",
__func__, ret);
trace_printk("%s: AFE clk cfg failed with ret %d\n",
__func__, ret);

View File

@ -22,6 +22,7 @@
#include <linux/slab.h>
#include <linux/ipc_logging.h>
#include <linux/of_platform.h>
#include <linux/ratelimit.h>
#include <soc/qcom/subsystem_restart.h>
#include <linux/qcom_scm.h>
#include <soc/snd_event.h>
@ -370,6 +371,7 @@ int apr_send_pkt(void *handle, uint32_t *buf)
uint16_t w_len;
int rc;
unsigned long flags;
static DEFINE_RATELIMIT_STATE(rtl, 1 * HZ, 1);
if (!handle || !buf) {
pr_err("APR: Wrong parameters for %s\n",
@ -383,7 +385,8 @@ int apr_send_pkt(void *handle, uint32_t *buf)
if ((svc->dest_id == APR_DEST_QDSP6) &&
(apr_get_q6_state() != APR_SUBSYS_LOADED)) {
pr_err_ratelimited("%s: Still dsp is not Up\n", __func__);
if (__ratelimit(&rtl))
pr_err_ratelimited("%s: Still dsp is not Up\n", __func__);
return -ENETRESET;
} else if ((svc->dest_id == APR_DEST_MODEM) &&
(apr_get_modem_state() == APR_SUBSYS_DOWN)) {

View File

@ -13,6 +13,7 @@
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/types.h>
#include <linux/ratelimit.h>
#include <linux/clk.h>
#include <linux/bitops.h>
#include <linux/delay.h>
@ -148,16 +149,19 @@ static int lpi_gpio_read(struct lpi_gpio_pad *pad, unsigned int addr)
{
int ret = 0;
struct lpi_gpio_state *state = dev_get_drvdata(lpi_dev);
static DEFINE_RATELIMIT_STATE(rtl, 1 * HZ, 1);
if (!lpi_dev_up) {
pr_err_ratelimited("%s: ADSP is down due to SSR, return\n",
if (__ratelimit(&rtl))
pr_err("%s: ADSP is down due to SSR, return\n",
__func__);
return 0;
}
pm_runtime_get_sync(lpi_dev);
mutex_lock(&state->core_hw_vote_lock);
if (!state->core_hw_vote_status) {
pr_err_ratelimited("%s: core hw vote clk is not enabled\n",
if (__ratelimit(&rtl))
pr_err("%s: core hw vote clk is not enabled\n",
__func__);
ret = -EINVAL;
goto err;
@ -179,6 +183,7 @@ static int lpi_gpio_write(struct lpi_gpio_pad *pad, unsigned int addr,
{
struct lpi_gpio_state *state = dev_get_drvdata(lpi_dev);
int ret = 0;
static DEFINE_RATELIMIT_STATE(rtl, 1 * HZ, 1);
if (!lpi_dev_up) {
return 0;
@ -186,7 +191,8 @@ static int lpi_gpio_write(struct lpi_gpio_pad *pad, unsigned int addr,
pm_runtime_get_sync(lpi_dev);
mutex_lock(&state->core_hw_vote_lock);
if (!state->core_hw_vote_status) {
pr_err_ratelimited("%s: core hw vote clk is not enabled\n",
if (__ratelimit(&rtl))
pr_err("%s: core hw vote clk is not enabled\n",
__func__);
ret = -EINVAL;
goto err;