counter: add FlexTimer Module Quadrature decoder counter driver
This driver exposes the counter for the quadrature decoder of the FlexTimer Module, present in the LS1021A soc. Signed-off-by: Patrick Havelange <patrick.havelange@essensium.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Patrick Havelange
Greg Kroah-Hartman
parent
7f2e3ea306
commit
a3b9a99980
@ -48,4 +48,13 @@ config STM32_LPTIMER_CNT
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To compile this driver as a module, choose M here: the
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module will be called stm32-lptimer-cnt.
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config FTM_QUADDEC
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tristate "Flex Timer Module Quadrature decoder driver"
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help
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Select this option to enable the Flex Timer Quadrature decoder
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driver.
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To compile this driver as a module, choose M here: the
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module will be called ftm-quaddec.
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endif # COUNTER
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@ -7,3 +7,4 @@ obj-$(CONFIG_COUNTER) += counter.o
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obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o
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obj-$(CONFIG_STM32_TIMER_CNT) += stm32-timer-cnt.o
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obj-$(CONFIG_STM32_LPTIMER_CNT) += stm32-lptimer-cnt.o
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obj-$(CONFIG_FTM_QUADDEC) += ftm-quaddec.o
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356
drivers/counter/ftm-quaddec.c
Normal file
356
drivers/counter/ftm-quaddec.c
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@ -0,0 +1,356 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Flex Timer Module Quadrature decoder
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*
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* This module implements a driver for decoding the FTM quadrature
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* of ex. a LS1021A
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*/
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#include <linux/fsl/ftm.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/io.h>
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#include <linux/mutex.h>
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#include <linux/counter.h>
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#include <linux/bitfield.h>
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#define FTM_FIELD_UPDATE(ftm, offset, mask, val) \
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({ \
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uint32_t flags; \
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ftm_read(ftm, offset, &flags); \
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flags &= ~mask; \
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flags |= FIELD_PREP(mask, val); \
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ftm_write(ftm, offset, flags); \
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})
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struct ftm_quaddec {
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struct counter_device counter;
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struct platform_device *pdev;
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void __iomem *ftm_base;
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bool big_endian;
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struct mutex ftm_quaddec_mutex;
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};
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static void ftm_read(struct ftm_quaddec *ftm, uint32_t offset, uint32_t *data)
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{
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if (ftm->big_endian)
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*data = ioread32be(ftm->ftm_base + offset);
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else
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*data = ioread32(ftm->ftm_base + offset);
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}
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static void ftm_write(struct ftm_quaddec *ftm, uint32_t offset, uint32_t data)
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{
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if (ftm->big_endian)
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iowrite32be(data, ftm->ftm_base + offset);
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else
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iowrite32(data, ftm->ftm_base + offset);
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}
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/* Hold mutex before modifying write protection state */
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static void ftm_clear_write_protection(struct ftm_quaddec *ftm)
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{
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uint32_t flag;
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/* First see if it is enabled */
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ftm_read(ftm, FTM_FMS, &flag);
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if (flag & FTM_FMS_WPEN)
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FTM_FIELD_UPDATE(ftm, FTM_MODE, FTM_MODE_WPDIS, 1);
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}
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static void ftm_set_write_protection(struct ftm_quaddec *ftm)
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{
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FTM_FIELD_UPDATE(ftm, FTM_FMS, FTM_FMS_WPEN, 1);
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}
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static void ftm_reset_counter(struct ftm_quaddec *ftm)
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{
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/* Reset hardware counter to CNTIN */
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ftm_write(ftm, FTM_CNT, 0x0);
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}
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static void ftm_quaddec_init(struct ftm_quaddec *ftm)
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{
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ftm_clear_write_protection(ftm);
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/*
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* Do not write in the region from the CNTIN register through the
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* PWMLOAD register when FTMEN = 0.
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* Also reset other fields to zero
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*/
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ftm_write(ftm, FTM_MODE, FTM_MODE_FTMEN);
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ftm_write(ftm, FTM_CNTIN, 0x0000);
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ftm_write(ftm, FTM_MOD, 0xffff);
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ftm_write(ftm, FTM_CNT, 0x0);
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/* Set prescaler, reset other fields to zero */
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ftm_write(ftm, FTM_SC, FTM_SC_PS_1);
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/* Select quad mode, reset other fields to zero */
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ftm_write(ftm, FTM_QDCTRL, FTM_QDCTRL_QUADEN);
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/* Unused features and reset to default section */
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ftm_write(ftm, FTM_POL, 0x0);
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ftm_write(ftm, FTM_FLTCTRL, 0x0);
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ftm_write(ftm, FTM_SYNCONF, 0x0);
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ftm_write(ftm, FTM_SYNC, 0xffff);
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/* Lock the FTM */
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ftm_set_write_protection(ftm);
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}
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static void ftm_quaddec_disable(struct ftm_quaddec *ftm)
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{
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ftm_clear_write_protection(ftm);
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ftm_write(ftm, FTM_MODE, 0);
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ftm_write(ftm, FTM_QDCTRL, 0);
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/*
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* This is enough to disable the counter. No clock has been
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* selected by writing to FTM_SC in init()
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*/
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ftm_set_write_protection(ftm);
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}
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static int ftm_quaddec_get_prescaler(struct counter_device *counter,
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struct counter_count *count,
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size_t *cnt_mode)
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{
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struct ftm_quaddec *ftm = counter->priv;
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uint32_t scflags;
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ftm_read(ftm, FTM_SC, &scflags);
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*cnt_mode = FIELD_GET(FTM_SC_PS_MASK, scflags);
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return 0;
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}
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static int ftm_quaddec_set_prescaler(struct counter_device *counter,
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struct counter_count *count,
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size_t cnt_mode)
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{
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struct ftm_quaddec *ftm = counter->priv;
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mutex_lock(&ftm->ftm_quaddec_mutex);
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ftm_clear_write_protection(ftm);
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FTM_FIELD_UPDATE(ftm, FTM_SC, FTM_SC_PS_MASK, cnt_mode);
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ftm_set_write_protection(ftm);
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/* Also resets the counter as it is undefined anyway now */
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ftm_reset_counter(ftm);
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mutex_unlock(&ftm->ftm_quaddec_mutex);
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return 0;
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}
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static const char * const ftm_quaddec_prescaler[] = {
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"1", "2", "4", "8", "16", "32", "64", "128"
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};
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static struct counter_count_enum_ext ftm_quaddec_prescaler_enum = {
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.items = ftm_quaddec_prescaler,
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.num_items = ARRAY_SIZE(ftm_quaddec_prescaler),
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.get = ftm_quaddec_get_prescaler,
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.set = ftm_quaddec_set_prescaler
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};
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enum ftm_quaddec_synapse_action {
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FTM_QUADDEC_SYNAPSE_ACTION_BOTH_EDGES,
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};
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static enum counter_synapse_action ftm_quaddec_synapse_actions[] = {
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[FTM_QUADDEC_SYNAPSE_ACTION_BOTH_EDGES] =
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COUNTER_SYNAPSE_ACTION_BOTH_EDGES
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};
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enum ftm_quaddec_count_function {
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FTM_QUADDEC_COUNT_ENCODER_MODE_1,
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};
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static const enum counter_count_function ftm_quaddec_count_functions[] = {
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[FTM_QUADDEC_COUNT_ENCODER_MODE_1] =
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COUNTER_COUNT_FUNCTION_QUADRATURE_X4
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};
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static int ftm_quaddec_count_read(struct counter_device *counter,
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struct counter_count *count,
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struct counter_count_read_value *val)
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{
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struct ftm_quaddec *const ftm = counter->priv;
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uint32_t cntval;
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ftm_read(ftm, FTM_CNT, &cntval);
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counter_count_read_value_set(val, COUNTER_COUNT_POSITION, &cntval);
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return 0;
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}
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static int ftm_quaddec_count_write(struct counter_device *counter,
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struct counter_count *count,
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struct counter_count_write_value *val)
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{
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struct ftm_quaddec *const ftm = counter->priv;
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u32 cnt;
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int err;
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err = counter_count_write_value_get(&cnt, COUNTER_COUNT_POSITION, val);
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if (err)
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return err;
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if (cnt != 0) {
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dev_warn(&ftm->pdev->dev, "Can only accept '0' as new counter value\n");
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return -EINVAL;
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}
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ftm_reset_counter(ftm);
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return 0;
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}
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static int ftm_quaddec_count_function_get(struct counter_device *counter,
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struct counter_count *count,
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size_t *function)
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{
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*function = FTM_QUADDEC_COUNT_ENCODER_MODE_1;
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return 0;
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}
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static int ftm_quaddec_action_get(struct counter_device *counter,
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struct counter_count *count,
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struct counter_synapse *synapse,
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size_t *action)
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{
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*action = FTM_QUADDEC_SYNAPSE_ACTION_BOTH_EDGES;
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return 0;
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}
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static const struct counter_ops ftm_quaddec_cnt_ops = {
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.count_read = ftm_quaddec_count_read,
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.count_write = ftm_quaddec_count_write,
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.function_get = ftm_quaddec_count_function_get,
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.action_get = ftm_quaddec_action_get,
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};
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static struct counter_signal ftm_quaddec_signals[] = {
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{
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.id = 0,
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.name = "Channel 1 Phase A"
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},
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{
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.id = 1,
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.name = "Channel 1 Phase B"
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}
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};
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static struct counter_synapse ftm_quaddec_count_synapses[] = {
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{
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.actions_list = ftm_quaddec_synapse_actions,
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.num_actions = ARRAY_SIZE(ftm_quaddec_synapse_actions),
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.signal = &ftm_quaddec_signals[0]
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},
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{
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.actions_list = ftm_quaddec_synapse_actions,
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.num_actions = ARRAY_SIZE(ftm_quaddec_synapse_actions),
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.signal = &ftm_quaddec_signals[1]
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}
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};
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static const struct counter_count_ext ftm_quaddec_count_ext[] = {
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COUNTER_COUNT_ENUM("prescaler", &ftm_quaddec_prescaler_enum),
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COUNTER_COUNT_ENUM_AVAILABLE("prescaler", &ftm_quaddec_prescaler_enum),
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};
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static struct counter_count ftm_quaddec_counts = {
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.id = 0,
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.name = "Channel 1 Count",
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.functions_list = ftm_quaddec_count_functions,
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.num_functions = ARRAY_SIZE(ftm_quaddec_count_functions),
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.synapses = ftm_quaddec_count_synapses,
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.num_synapses = ARRAY_SIZE(ftm_quaddec_count_synapses),
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.ext = ftm_quaddec_count_ext,
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.num_ext = ARRAY_SIZE(ftm_quaddec_count_ext)
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};
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static int ftm_quaddec_probe(struct platform_device *pdev)
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{
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struct ftm_quaddec *ftm;
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struct device_node *node = pdev->dev.of_node;
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struct resource *io;
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int ret;
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ftm = devm_kzalloc(&pdev->dev, sizeof(*ftm), GFP_KERNEL);
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if (!ftm)
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return -ENOMEM;
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platform_set_drvdata(pdev, ftm);
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io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!io) {
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dev_err(&pdev->dev, "Failed to get memory region\n");
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return -ENODEV;
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}
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ftm->pdev = pdev;
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ftm->big_endian = of_property_read_bool(node, "big-endian");
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ftm->ftm_base = devm_ioremap(&pdev->dev, io->start, resource_size(io));
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if (!ftm->ftm_base) {
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dev_err(&pdev->dev, "Failed to map memory region\n");
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return -EINVAL;
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}
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ftm->counter.name = dev_name(&pdev->dev);
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ftm->counter.parent = &pdev->dev;
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ftm->counter.ops = &ftm_quaddec_cnt_ops;
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ftm->counter.counts = &ftm_quaddec_counts;
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ftm->counter.num_counts = 1;
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ftm->counter.signals = ftm_quaddec_signals;
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ftm->counter.num_signals = ARRAY_SIZE(ftm_quaddec_signals);
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ftm->counter.priv = ftm;
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mutex_init(&ftm->ftm_quaddec_mutex);
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ftm_quaddec_init(ftm);
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ret = counter_register(&ftm->counter);
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if (ret)
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ftm_quaddec_disable(ftm);
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return ret;
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}
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static int ftm_quaddec_remove(struct platform_device *pdev)
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{
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struct ftm_quaddec *ftm = platform_get_drvdata(pdev);
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counter_unregister(&ftm->counter);
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ftm_quaddec_disable(ftm);
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return 0;
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}
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static const struct of_device_id ftm_quaddec_match[] = {
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{ .compatible = "fsl,ftm-quaddec" },
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{},
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};
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static struct platform_driver ftm_quaddec_driver = {
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.driver = {
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.name = "ftm-quaddec",
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.of_match_table = ftm_quaddec_match,
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},
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.probe = ftm_quaddec_probe,
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.remove = ftm_quaddec_remove,
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};
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module_platform_driver(ftm_quaddec_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Kjeld Flarup <kfa@deif.com");
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MODULE_AUTHOR("Patrick Havelange <patrick.havelange@essensium.com");
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