Merge tag 'LA.UM.9.14.r1-19500-LAHAINA.QSSI12.0' of https://git.codelinaro.org/clo/la/platform/vendor/opensource/video-driver into android12-5.4-lahaina
"LA.UM.9.14.r1-19500-LAHAINA.QSSI12.0" * tag 'LA.UM.9.14.r1-19500-LAHAINA.QSSI12.0' of https://git.codelinaro.org/clo/la/platform/vendor/opensource/video-driver: msm: vidc: Fix coverity static code analysis violations msm: vidc: update VP9 level ranges msm: vidc: Cancel batch work in case of pm_suspend msm: vidc: Add max supported instances for scuba target msm: vidc: Enable v4l2 for bengal Change-Id: Iaec5df7d1bbcc2d9b0cf9e736b0507c8210452cd
This commit is contained in:
commit
a60925a1d7
@ -677,6 +677,7 @@ static int msm_vidc_pm_suspend(struct device *dev)
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int rc = 0;
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struct msm_vidc_core *core;
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d_vpr_h("%s\n", __func__);
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/*
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* Bail out if
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* - driver possibly not probed yet
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@ -698,14 +699,33 @@ static int msm_vidc_pm_suspend(struct device *dev)
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rc = 0;
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else if (rc)
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d_vpr_e("Failed to suspend: %d\n", rc);
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else
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core->pm_suspended = true;
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return rc;
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}
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static int msm_vidc_pm_resume(struct device *dev)
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{
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struct msm_vidc_core *core;
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d_vpr_h("%s\n", __func__);
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/*
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* Bail out if
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* - driver possibly not probed yet
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* - not the main device. We don't support power management on
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* subdevices (e.g. context banks)
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*/
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if (!dev || !dev->driver ||
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!of_device_is_compatible(dev->of_node, "qcom,msm-vidc"))
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return 0;
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core = dev_get_drvdata(dev);
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if (!core) {
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d_vpr_e("%s: invalid core\n", __func__);
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return -EINVAL;
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}
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core->pm_suspended = false;
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return 0;
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}
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@ -1407,6 +1407,9 @@ static void msm_vidc_comm_update_ctrl_limits(struct msm_vidc_inst *inst)
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msm_vidc_comm_update_ctrl(inst,
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V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
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&inst->capability.cap[CAP_HEVC_LEVEL]);
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msm_vidc_comm_update_ctrl(inst,
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V4L2_CID_MPEG_VIDC_VIDEO_VP9_LEVEL,
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&inst->capability.cap[CAP_VP9_LEVEL]);
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/*
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* Default value of level is unknown, but since we are not
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* using unknown value while updating level controls, we need
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@ -3051,6 +3054,7 @@ static int msm_comm_init_core(struct msm_vidc_inst *inst)
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core->state = VIDC_CORE_INIT;
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core->smmu_fault_handled = false;
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core->trigger_ssr = false;
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core->pm_suspended = false;
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core->resources.max_secure_inst_count =
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core->resources.max_secure_inst_count ?
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core->resources.max_secure_inst_count :
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@ -4537,10 +4541,11 @@ void msm_vidc_batch_handler(struct work_struct *work)
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{
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int rc = 0;
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struct msm_vidc_inst *inst;
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struct msm_vidc_core *core;
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inst = container_of(work, struct msm_vidc_inst, batch_work.work);
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inst = get_inst(get_vidc_core(MSM_VIDC_CORE_VENUS), inst);
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if (!inst) {
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if (!inst || !inst->core) {
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d_vpr_e("%s: invalid params\n", __func__);
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return;
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}
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@ -4550,9 +4555,14 @@ void msm_vidc_batch_handler(struct work_struct *work)
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goto exit;
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}
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core = inst->core;
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if (core->pm_suspended) {
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s_vpr_h(inst->sid, "%s: device in pm suspend state\n", __func__);
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goto exit;
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}
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s_vpr_h(inst->sid, "%s: queue pending batch buffers\n",
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__func__);
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rc = msm_comm_qbufs_batch(inst, NULL);
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if (rc) {
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s_vpr_e(inst->sid, "%s: batch qbufs failed\n", __func__);
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@ -7812,7 +7822,7 @@ u32 msm_comm_calc_framerate(struct msm_vidc_inst *inst,
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capability = &inst->capability;
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if (timestamp_us <= prev_ts) {
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s_vpr_e(inst->sid, "%s: invalid ts %lld, prev ts %lld\n",
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s_vpr_e(inst->sid, "%s: invalid ts %llu, prev ts %llu\n",
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__func__, timestamp_us, prev_ts);
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return framerate;
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}
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@ -7843,7 +7853,7 @@ u32 msm_comm_get_max_framerate(struct msm_vidc_inst *inst)
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}
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avg_framerate = count ? (div_u64(avg_framerate, count)) : (1 << 16);
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s_vpr_l(inst->sid, "%s: fps %u, list size %d\n", __func__, avg_framerate, count);
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s_vpr_l(inst->sid, "%s: fps %u, list size %u\n", __func__, avg_framerate, count);
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mutex_unlock(&inst->timestamps.lock);
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return (u32)avg_framerate;
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}
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@ -508,6 +508,7 @@ struct msm_vidc_core {
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unsigned long min_freq;
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unsigned long curr_freq;
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struct msm_vidc_core_ops *core_ops;
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bool pm_suspended;
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};
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struct msm_vidc_inst;
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@ -181,6 +181,9 @@ static struct msm_vidc_codec_capability bengal_capabilities_v0[] = {
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{CAP_SECURE_MBS_PER_FRAME, DOMAINS_ALL, CODECS_ALL, 64, 8160, 1, 8160},
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{CAP_SECURE_BITRATE, DOMAINS_ALL, CODECS_ALL, 1, 35000000, 1, 20000000},
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/* All intra encoding usecase specific */
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{CAP_ALLINTRA_MAX_FPS, ENC, H264|HEVC, 1, 60, 1, 30},
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/* Image specific */
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{CAP_HEVC_IMAGE_FRAME_WIDTH, ENC, HEVC, 128, 512, 2, 512},
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{CAP_HEVC_IMAGE_FRAME_HEIGHT, ENC, HEVC, 128, 512, 2, 512},
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@ -200,13 +203,16 @@ static struct msm_vidc_codec_capability bengal_capabilities_v0[] = {
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V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1},
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/* Level for AVC and HEVC decoder specific */
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/* Level for AVC, HEVC and VP9 decoder specific */
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{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
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V4L2_MPEG_VIDEO_H264_LEVEL_5_0, 1,
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V4L2_MPEG_VIDEO_H264_LEVEL_4_1},
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{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1},
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{CAP_VP9_LEVEL, DEC, VP9, V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_UNUSED,
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V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_5, 1,
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V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_5},
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};
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static struct msm_vidc_codec_capability bengal_capabilities_v1[] = {
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@ -245,6 +251,9 @@ static struct msm_vidc_codec_capability bengal_capabilities_v1[] = {
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{CAP_SECURE_MBS_PER_FRAME, DOMAINS_ALL, CODECS_ALL, 64, 8160, 1, 8160},
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{CAP_SECURE_BITRATE, DOMAINS_ALL, CODECS_ALL, 1, 35000000, 1, 20000000},
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/* All intra encoding usecase specific */
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{CAP_ALLINTRA_MAX_FPS, ENC, H264|HEVC, 1, 60, 1, 30},
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/* Image specific */
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{CAP_HEVC_IMAGE_FRAME_WIDTH, ENC, HEVC, 128, 512, 2, 512},
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{CAP_HEVC_IMAGE_FRAME_HEIGHT, ENC, HEVC, 128, 512, 2, 512},
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@ -264,13 +273,16 @@ static struct msm_vidc_codec_capability bengal_capabilities_v1[] = {
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V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1},
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/* Level for AVC and HEVC decoder specific */
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/* Level for AVC, HEVC and VP9 decoder specific */
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{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
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V4L2_MPEG_VIDEO_H264_LEVEL_5_0, 1,
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V4L2_MPEG_VIDEO_H264_LEVEL_4_1},
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{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1},
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{CAP_VP9_LEVEL, DEC, VP9, V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_UNUSED,
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V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_5, 1,
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V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_5},
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};
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static struct msm_vidc_codec_capability holi_capabilities[] = {
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@ -333,13 +345,16 @@ static struct msm_vidc_codec_capability holi_capabilities[] = {
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V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1},
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/* Level for AVC and HEVC decoder specific */
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/* Level for AVC, HEVC and VP9 decoder specific */
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{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
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V4L2_MPEG_VIDEO_H264_LEVEL_5_0, 1,
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V4L2_MPEG_VIDEO_H264_LEVEL_4_1},
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{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1},
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{CAP_VP9_LEVEL, DEC, VP9, V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_UNUSED,
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V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_5, 1,
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V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_5},
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};
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static struct msm_vidc_codec_capability scuba_capabilities[] = {
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@ -402,13 +417,16 @@ static struct msm_vidc_codec_capability scuba_capabilities[] = {
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V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1},
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/* Level for AVC and HEVC decoder specific */
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/* Level for AVC, HEVC and VP9 decoder specific */
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{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
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V4L2_MPEG_VIDEO_H264_LEVEL_5_0, 1,
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V4L2_MPEG_VIDEO_H264_LEVEL_4_1},
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{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1},
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{CAP_VP9_LEVEL, DEC, VP9, V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_UNUSED,
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V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_5, 1,
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V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_5},
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};
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static struct msm_vidc_codec_capability lahaina_capabilities[] = {
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@ -512,13 +530,16 @@ static struct msm_vidc_codec_capability lahaina_capabilities[] = {
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V4L2_MPEG_VIDEO_HEVC_LEVEL_6, 1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_6},
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/* Level for AVC and HEVC decoder specific */
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/* Level for AVC, HEVC and VP9 decoder specific */
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{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
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V4L2_MPEG_VIDEO_H264_LEVEL_6_1, 1,
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V4L2_MPEG_VIDEO_H264_LEVEL_5_0},
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{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, 1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_5},
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{CAP_VP9_LEVEL, DEC, VP9, V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_UNUSED,
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V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_51, 1,
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V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_51},
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};
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static struct msm_vidc_codec_capability yupik_capabilities_v0[] = {
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@ -627,13 +648,16 @@ static struct msm_vidc_codec_capability yupik_capabilities_v0[] = {
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V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_4},
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/* Level for AVC and HEVC decoder specific */
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/* Level for AVC, HEVC and VP9 decoder specific */
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{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
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V4L2_MPEG_VIDEO_H264_LEVEL_5_2, 1,
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V4L2_MPEG_VIDEO_H264_LEVEL_4_0},
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{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, 1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_4},
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{CAP_VP9_LEVEL, DEC, VP9, V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_UNUSED,
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V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_51, 1,
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V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_51},
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};
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static struct msm_vidc_codec_capability yupik_capabilities_v1[] = {
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@ -735,13 +759,16 @@ static struct msm_vidc_codec_capability yupik_capabilities_v1[] = {
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V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_4},
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/* Level for AVC and HEVC decoder specific */
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/* Level for AVC, HEVC and VP9 decoder specific */
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{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
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V4L2_MPEG_VIDEO_H264_LEVEL_5_2, 1,
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V4L2_MPEG_VIDEO_H264_LEVEL_4_0},
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{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_4},
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{CAP_VP9_LEVEL, DEC, VP9, V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_UNUSED,
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V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_5, 1,
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V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_5},
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};
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static struct msm_vidc_codec_capability shima_capabilities_v0[] = {
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@ -848,13 +875,16 @@ static struct msm_vidc_codec_capability shima_capabilities_v0[] = {
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V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, 1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_4},
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|
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/* Level for AVC and HEVC decoder specific */
|
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/* Level for AVC, HEVC and VP9 decoder specific */
|
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{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
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V4L2_MPEG_VIDEO_H264_LEVEL_6_0, 1,
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V4L2_MPEG_VIDEO_H264_LEVEL_4_0},
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{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_6, 1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_4},
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{CAP_VP9_LEVEL, DEC, VP9, V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_UNUSED,
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V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_51, 1,
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V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_51},
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};
|
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|
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static struct msm_vidc_codec_capability shima_capabilities_v1[] = {
|
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@ -955,13 +985,16 @@ static struct msm_vidc_codec_capability shima_capabilities_v1[] = {
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V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, 1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_4},
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|
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/* Level for AVC and HEVC decoder specific */
|
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/* Level for AVC, HEVC and VP9 decoder specific */
|
||||
{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
|
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V4L2_MPEG_VIDEO_H264_LEVEL_5_2, 1,
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V4L2_MPEG_VIDEO_H264_LEVEL_4_0},
|
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{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, 1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_4},
|
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{CAP_VP9_LEVEL, DEC, VP9, V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_UNUSED,
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V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_51, 1,
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V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_51},
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};
|
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|
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static struct msm_vidc_codec_capability shima_capabilities_v2[] = {
|
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@ -1061,13 +1094,16 @@ static struct msm_vidc_codec_capability shima_capabilities_v2[] = {
|
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V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
|
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V4L2_MPEG_VIDEO_HEVC_LEVEL_4},
|
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|
||||
/* Level for AVC and HEVC decoder specific */
|
||||
/* Level for AVC, HEVC and VP9 decoder specific */
|
||||
{CAP_H264_LEVEL, DEC, H264, V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
|
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V4L2_MPEG_VIDEO_H264_LEVEL_5_1, 1,
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V4L2_MPEG_VIDEO_H264_LEVEL_4_0},
|
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{CAP_HEVC_LEVEL, DEC, HEVC, V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
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V4L2_MPEG_VIDEO_HEVC_LEVEL_5, 1,
|
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V4L2_MPEG_VIDEO_HEVC_LEVEL_4},
|
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{CAP_VP9_LEVEL, DEC, VP9, V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_UNUSED,
|
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V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_51, 1,
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V4L2_MPEG_VIDC_VIDEO_VP9_LEVEL_51},
|
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};
|
||||
|
||||
/* Generally Iris2 VPSS only support 8 multiple encoding if
|
||||
@ -1538,6 +1574,10 @@ static struct msm_vidc_common_data bengal_common_data_v0[] = {
|
||||
.key = "qcom,max-image-load",
|
||||
.value = 262144, /* ((8192x8192)/256)@1fps */
|
||||
},
|
||||
{
|
||||
.key = "qcom,max-mbpf",
|
||||
.value = 65280,/* ((3840x2176)/256) x 2 */
|
||||
},
|
||||
{
|
||||
.key = "qcom,max-hq-mbs-per-frame",
|
||||
.value = 8160,
|
||||
@ -1574,6 +1614,10 @@ static struct msm_vidc_common_data bengal_common_data_v0[] = {
|
||||
.key = "qcom,vpp_delay_supported",
|
||||
.value = 0,
|
||||
},
|
||||
{
|
||||
.key = "qcom,no-cvp",
|
||||
.value = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct msm_vidc_common_data bengal_common_data_v1[] = {
|
||||
@ -1605,6 +1649,10 @@ static struct msm_vidc_common_data bengal_common_data_v1[] = {
|
||||
.key = "qcom,max-image-load",
|
||||
.value = 262144, /* ((8192x8192)/256)@1fps */
|
||||
},
|
||||
{
|
||||
.key = "qcom,max-mbpf",
|
||||
.value = 65280,/* ((3840x2176)/256) x 2 */
|
||||
},
|
||||
{
|
||||
.key = "qcom,max-hq-mbs-per-frame",
|
||||
.value = 8160,
|
||||
@ -1641,6 +1689,10 @@ static struct msm_vidc_common_data bengal_common_data_v1[] = {
|
||||
.key = "qcom,vpp_delay_supported",
|
||||
.value = 0,
|
||||
},
|
||||
{
|
||||
.key = "qcom,no-cvp",
|
||||
.value = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct msm_vidc_common_data shima_common_data_v0[] = {
|
||||
@ -2304,6 +2356,7 @@ static struct msm_vidc_platform_data scuba_data = {
|
||||
.codec_caps_count = ARRAY_SIZE(scuba_capabilities),
|
||||
.vpss_caps = NULL,
|
||||
.vpss_caps_count = 0,
|
||||
.max_inst_count = MAX_SUPPORTED_INSTANCES,
|
||||
};
|
||||
|
||||
static const struct of_device_id msm_vidc_dt_device[] = {
|
||||
|
@ -257,6 +257,7 @@ enum hal_capability {
|
||||
CAP_HEIC_IMAGE_FRAME_HEIGHT,
|
||||
CAP_H264_LEVEL,
|
||||
CAP_HEVC_LEVEL,
|
||||
CAP_VP9_LEVEL,
|
||||
CAP_MAX,
|
||||
};
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user