Revert "r8152: adjust the settings about MAC clock speed down for RTL8153"
[ Upstream commit 4b5dc1a94d4f92b5845e98bd9ae344b26d933aad ]
This reverts commit 134f98bcf1
.
The r8153_mac_clk_spd() is used for RTL8153A only, because the register
table of RTL8153B is different from RTL8153A. However, this function would
be called when RTL8153B calls r8153_first_init() and r8153_enter_oob().
That causes RTL8153B becomes unstable when suspending and resuming. The
worst case may let the device stop working.
Besides, revert this commit to disable MAC clock speed down for RTL8153A.
It would avoid the known issue when enabling U1. The data of the first
control transfer may be wrong when exiting U1.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
parent
7a12167636
commit
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@ -2836,29 +2836,6 @@ static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
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device_set_wakeup_enable(&tp->udev->dev, false);
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}
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static void r8153_mac_clk_spd(struct r8152 *tp, bool enable)
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{
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/* MAC clock speed down */
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if (enable) {
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ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL,
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ALDPS_SPDWN_RATIO);
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ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2,
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EEE_SPDWN_RATIO);
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ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
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PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
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U1U2_SPDWN_EN | L1_SPDWN_EN);
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ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
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PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
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TP100_SPDWN_EN | TP500_SPDWN_EN | EEE_SPDWN_EN |
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TP1000_SPDWN_EN);
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} else {
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ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, 0);
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ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, 0);
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ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 0);
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ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 0);
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}
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}
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static void r8153_u1u2en(struct r8152 *tp, bool enable)
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{
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u8 u1u2[8];
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@ -3158,11 +3135,9 @@ static void rtl8153_runtime_enable(struct r8152 *tp, bool enable)
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if (enable) {
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r8153_u1u2en(tp, false);
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r8153_u2p3en(tp, false);
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r8153_mac_clk_spd(tp, true);
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rtl_runtime_suspend_enable(tp, true);
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} else {
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rtl_runtime_suspend_enable(tp, false);
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r8153_mac_clk_spd(tp, false);
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switch (tp->version) {
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case RTL_VER_03:
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@ -3727,7 +3702,6 @@ static void r8153_first_init(struct r8152 *tp)
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u32 ocp_data;
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int i;
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r8153_mac_clk_spd(tp, false);
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rxdy_gated_en(tp, true);
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r8153_teredo_off(tp);
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@ -3789,8 +3763,6 @@ static void r8153_enter_oob(struct r8152 *tp)
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u32 ocp_data;
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int i;
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r8153_mac_clk_spd(tp, true);
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ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
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ocp_data &= ~NOW_IS_OOB;
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ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
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@ -4498,9 +4470,14 @@ static void r8153_init(struct r8152 *tp)
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ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
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/* MAC clock speed down */
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ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, 0);
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ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, 0);
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ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 0);
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ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 0);
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r8153_power_cut_en(tp, false);
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r8153_u1u2en(tp, true);
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r8153_mac_clk_spd(tp, false);
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usb_enable_lpm(tp->udev);
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ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG6);
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