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Merge "msm: ipa3: Following HPG sequence for HOLB enabling"

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This commit is contained in:
qctecmdr 2020-09-02 00:18:36 -07:00 committed by Gerrit - the friendly Code Review server
commit c19fb2d8ce
6 changed files with 25 additions and 17 deletions
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2
drivers/platform/msm/ipa/ipa_clients/ipa_usb.c
View File

@ -17,8 +17,6 @@
#define IPA_USB_DEV_READY_TIMEOUT_MSEC 10000
#define IPA_HOLB_TMR_EN 0x1
/* GSI channels weights */
#define IPA_USB_DL_CHAN_LOW_WEIGHT 0x5
#define IPA_USB_UL_CHAN_LOW_WEIGHT 0x4

2
drivers/platform/msm/ipa/ipa_v3/ipa_client.c
View File

@ -14,8 +14,6 @@
* These values were determined empirically and shows good E2E bi-
* directional throughputs
*/
#define IPA_HOLB_TMR_EN 0x1
#define IPA_HOLB_TMR_DIS 0x0
#define IPA_POLL_AGGR_STATE_RETRIES_NUM 3
#define IPA_POLL_AGGR_STATE_SLEEP_MSEC 1

2
drivers/platform/msm/ipa/ipa_v3/ipa_i.h
View File

@ -63,6 +63,8 @@
#define IPA_UC_WAIT_MIN_SLEEP 1000
#define IPA_UC_WAII_MAX_SLEEP 1200
#define IPA_HOLB_TMR_VAL_4_5 31
#define IPA_HOLB_TMR_DIS 0x0
#define IPA_HOLB_TMR_EN 0x1
/*
* The transport descriptor size was changed to GSI_CHAN_RE_SIZE_16B, but
* IPA users still use sps_iovec size as FIFO element size.

2
drivers/platform/msm/ipa/ipa_v3/ipa_mpm.c
View File

@ -65,8 +65,6 @@
#define TETH_AGGR_BYTE_LIMIT 24
#define TETH_AGGR_DL_BYTE_LIMIT 16
#define TRE_BUFF_SIZE 32768
#define IPA_HOLB_TMR_EN 0x1
#define IPA_HOLB_TMR_DIS 0x0
#define RNDIS_IPA_DFLT_RT_HDL 0
#define IPA_POLL_FOR_EMPTINESS_NUM 50
#define IPA_POLL_FOR_EMPTINESS_SLEEP_USEC 20

4
drivers/platform/msm/ipa/ipa_v3/ipa_uc_wdi.c
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.
* Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
*/
#include "ipa_i.h"
@ -9,8 +9,6 @@
#include <linux/mm.h>
#include "ipa_qmi_service.h"
#define IPA_HOLB_TMR_DIS 0x0
#define IPA_HW_INTERFACE_WDI_VERSION 0x0001
#define IPA_HW_WDI_RX_MBOX_START_INDEX 48
#define IPA_HW_WDI_TX_MBOX_START_INDEX 50

30
drivers/platform/msm/ipa/ipa_v3/ipa_utils.c
View File

@ -6095,19 +6095,23 @@ int ipa3_cfg_ep_holb(u32 clnt_hdl, const struct ipa_ep_cfg_holb *ep_holb)
IPA_ACTIVE_CLIENTS_INC_EP(ipa3_get_client_mapping(clnt_hdl));
ipahal_write_reg_n_fields(IPA_ENDP_INIT_HOL_BLOCK_EN_n, clnt_hdl,
ep_holb);
/* IPA4.5 issue requires HOLB_EN to be written twice */
if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_5)
if (ep_holb->en == IPA_HOLB_TMR_DIS) {
ipahal_write_reg_n_fields(IPA_ENDP_INIT_HOL_BLOCK_EN_n,
clnt_hdl, ep_holb);
goto success;
}
/* Follow HPG sequence to DIS_HOLB, Configure Timer, and HOLB_EN */
if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_5) {
ipa3_ctx->ep[clnt_hdl].holb.en = IPA_HOLB_TMR_DIS;
ipahal_write_reg_n_fields(IPA_ENDP_INIT_HOL_BLOCK_EN_n,
clnt_hdl, ep_holb);
}
/* Configure timer */
if (ipa3_ctx->ipa_hw_type == IPA_HW_v4_2) {
ipa3_cal_ep_holb_scale_base_val(ep_holb->tmr_val,
&ipa3_ctx->ep[clnt_hdl].holb);
goto success;
&ipa3_ctx->ep[clnt_hdl].holb);
}
if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_5) {
int res;
@ -6123,9 +6127,19 @@ int ipa3_cfg_ep_holb(u32 clnt_hdl, const struct ipa_ep_cfg_holb *ep_holb)
}
}
success:
ipahal_write_reg_n_fields(IPA_ENDP_INIT_HOL_BLOCK_TIMER_n,
clnt_hdl, &ipa3_ctx->ep[clnt_hdl].holb);
/* Enable HOLB */
ipa3_ctx->ep[clnt_hdl].holb.en = IPA_HOLB_TMR_EN;
ipahal_write_reg_n_fields(IPA_ENDP_INIT_HOL_BLOCK_EN_n,
clnt_hdl, ep_holb);
/* IPA4.5 issue requires HOLB_EN to be written twice */
if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_5)
ipahal_write_reg_n_fields(IPA_ENDP_INIT_HOL_BLOCK_EN_n,
clnt_hdl, ep_holb);
success:
IPA_ACTIVE_CLIENTS_DEC_EP(ipa3_get_client_mapping(clnt_hdl));
IPADBG("cfg holb %u ep=%d tmr=%d\n", ep_holb->en, clnt_hdl,
ep_holb->tmr_val);