diff --git a/include/drm/drm_dsc.h b/include/drm/drm_dsc.h index 887954cbfc60..7e2bae5ebc17 100644 --- a/include/drm/drm_dsc.h +++ b/include/drm/drm_dsc.h @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: MIT * Copyright (C) 2018 Intel Corp. + * Copyright (C) 2021 XiaoMi, Inc. * * Authors: * Manasi Navare @@ -246,6 +247,10 @@ struct drm_dsc_config { * @dsc_version_major: DSC major version */ u8 dsc_version_major; + /** + * @dsc_panel_id: panel vendor + */ + u64 dsc_panel_id; /** * @native_422: True if Native 4:2:2 supported, else false */ diff --git a/techpack/display/msm/dsi/dsi_panel.c b/techpack/display/msm/dsi/dsi_panel.c index add93b538c43..d132b7cd041d 100644 --- a/techpack/display/msm/dsi/dsi_panel.c +++ b/techpack/display/msm/dsi/dsi_panel.c @@ -2771,6 +2771,14 @@ static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode, return 0; } + rc = utils->read_u64(utils->data, "mi,mdss-dsc-panel-id", &priv_info->dsc.config.dsc_panel_id); + if (rc) { + priv_info->dsc.config.dsc_panel_id = 0; + DSI_DEBUG("mi,mdss-dsc-panel-id not specified\n"); + } else { + DSI_DEBUG("mi,mdss-dsc-panel-id is 0x%llx\n", priv_info->dsc.config.dsc_panel_id); + } + rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data); if (rc) { priv_info->dsc.config.dsc_version_major = 0x1;