riscv: support trap-based WARN()
The WARN() related function will trigger a debug exception. This can help developers to analyze the cause of WARN() because if the debugger is connected, the control flow will be transferred to debugging environment. Signed-off-by: Vincent Chen <vincentc@andestech.com> Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
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@ -38,38 +38,46 @@ typedef u32 bug_insn_t;
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#define __BUG_ENTRY \
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#define __BUG_ENTRY \
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__BUG_ENTRY_ADDR "\n\t" \
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__BUG_ENTRY_ADDR "\n\t" \
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__BUG_ENTRY_FILE "\n\t" \
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__BUG_ENTRY_FILE "\n\t" \
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RISCV_SHORT " %1"
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RISCV_SHORT " %1\n\t" \
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RISCV_SHORT " %2"
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#else
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#else
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#define __BUG_ENTRY \
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#define __BUG_ENTRY \
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__BUG_ENTRY_ADDR
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__BUG_ENTRY_ADDR "\n\t" \
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RISCV_SHORT " %2"
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#endif
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#endif
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#define BUG() \
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#define __BUG_FLAGS(flags) \
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do { \
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do { \
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__asm__ __volatile__ ( \
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__asm__ __volatile__ ( \
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"1:\n\t" \
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"1:\n\t" \
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"ebreak\n" \
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"ebreak\n" \
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".pushsection __bug_table,\"a\"\n\t" \
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".pushsection __bug_table,\"aw\"\n\t" \
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"2:\n\t" \
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"2:\n\t" \
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__BUG_ENTRY "\n\t" \
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__BUG_ENTRY "\n\t" \
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".org 2b + %2\n\t" \
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".org 2b + %3\n\t" \
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".popsection" \
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".popsection" \
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: \
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: \
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: "i" (__FILE__), "i" (__LINE__), \
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: "i" (__FILE__), "i" (__LINE__), \
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"i" (flags), \
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"i" (sizeof(struct bug_entry))); \
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"i" (sizeof(struct bug_entry))); \
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unreachable(); \
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} while (0)
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} while (0)
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#endif /* !__ASSEMBLY__ */
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#endif /* !__ASSEMBLY__ */
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#else /* CONFIG_GENERIC_BUG */
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#else /* CONFIG_GENERIC_BUG */
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#ifndef __ASSEMBLY__
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#ifndef __ASSEMBLY__
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#define BUG() \
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#define __BUG_FLAGS(flags) do { \
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do { \
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__asm__ __volatile__ ("ebreak\n"); \
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__asm__ __volatile__ ("ebreak\n"); \
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unreachable(); \
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} while (0)
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} while (0)
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#endif /* !__ASSEMBLY__ */
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#endif /* !__ASSEMBLY__ */
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#endif /* CONFIG_GENERIC_BUG */
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#endif /* CONFIG_GENERIC_BUG */
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#define BUG() do { \
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__BUG_FLAGS(0); \
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unreachable(); \
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} while (0)
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#define __WARN_FLAGS(flags) __BUG_FLAGS(BUGFLAG_WARNING|(flags))
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#define HAVE_ARCH_BUG
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#define HAVE_ARCH_BUG
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#include <asm-generic/bug.h>
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#include <asm-generic/bug.h>
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