drivers: soc: Add support for SDMSHRIKE llcc driver
Add support for SDMSHRIKE llcc driver. Change-Id: I3bbe6f87ced09a19c90c17c3c495a873c71ee005 Signed-off-by: Saurabh Ambulkar <sambulka@codeaurora.org> Signed-off-by: Vivek Kumar <vivekuma@codeaurora.org>
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Vivek Kumar
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@ -212,6 +212,15 @@ config QCOM_SM8150_LLCC
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can start using the LLCC slices.
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If unsure, say n.
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config QCOM_SDMSHRIKE_LLCC
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tristate "Qualcomm Technologies, Inc. SDMSHRIKE LLCC driver"
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depends on QCOM_LLCC
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help
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Say y or m here to enable the LLCC driver for SDMSHRIKE platform.
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This provides data required to configure LLCC so that clients
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can start using the LLCC slices.
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If unsure, say n.
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config QCOM_SDM845_LLCC
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tristate "Qualcomm Technologies, Inc. SDM845 LLCC driver"
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depends on QCOM_LLCC
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@ -45,6 +45,7 @@ obj-$(CONFIG_QCOM_SDXLEMUR_LLCC) += llcc-sdxlemur.o
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obj-$(CONFIG_QCOM_SHIMA_LLCC) += llcc-shima.o
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obj-$(CONFIG_QCOM_YUPIK_LLCC) += llcc-yupik.o
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obj-$(CONFIG_QCOM_SM8150_LLCC) += llcc-sm8150.o
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obj-$(CONFIG_QCOM_SDMSHRIKE_LLCC) += llcc-sdmshrike.o
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obj-$(CONFIG_QCOM_MINIDUMP) += msm_minidump.o minidump_log.o
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obj-$(CONFIG_QCOM_MEM_OFFLINE) += mem-offline.o
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obj-$(CONFIG_QCOM_MEM_BUF) += mem-buf.o mem_buf_dma_buf.o
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109
drivers/soc/qcom/llcc-sdmshrike.c
Normal file
109
drivers/soc/qcom/llcc-sdmshrike.c
Normal file
@ -0,0 +1,109 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2017-2018,2020 The Linux Foundation. All rights reserved.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/soc/qcom/llcc-qcom.h>
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/*
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* SCT entry contains of the following parameters
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* uid: Unique id for the client's use case
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* slice_id: llcc slice id for each client
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* max_cap: The maximum capacity of the cache slice provided in KB
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* priority: Priority of the client used to select victim line for replacement
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* fixed_size: Determine of the slice has a fixed capacity
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* bonus_ways: Bonus ways to be used by any slice, bonus way is used only if
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* it't not a reserved way.
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* res_ways: Reserved ways for the cache slice, the reserved ways cannot be used
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* by any other client than the one its assigned to.
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* cache_mode: Each slice operates as a cache, this controls the mode of the
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* slice normal or TCM
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* probe_target_ways: Determines what ways to probe for access hit. When
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* configured to 1 only bonus and reserved ways are probed.
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* when configured to 0 all ways in llcc are probed.
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* write_scid_en: Bit enables write cache support for a given scid.
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* dis_cap_alloc: Disable capacity based allocation for a client
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* retain_on_pc: If this bit is set and client has maitained active vote
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* then the ways assigned to this client are not flushed on power
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* collapse.
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* activate_on_init: Activate the slice immidiately after the SCT is programmed
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*/
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#define SCT_ENTRY(uid, sid, mc, p, fs, bway, rway, cmod, ptw, dca, wse, rp, a) \
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{ .usecase_id = uid, \
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.slice_id = sid, \
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.max_cap = mc, \
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.priority = p, \
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.fixed_size = fs, \
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.bonus_ways = bway, \
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.res_ways = rway, \
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.cache_mode = cmod, \
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.probe_target_ways = ptw, \
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.dis_cap_alloc = dca, \
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.write_scid_en = wse, \
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.retain_on_pc = rp, \
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.activate_on_init = a, \
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}
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static struct llcc_slice_config sdmshrike_data[] = {
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SCT_ENTRY(LLCC_CPUSS, 1, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 1),
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SCT_ENTRY(LLCC_VIDSC0, 2, 512, 2, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
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SCT_ENTRY(LLCC_VIDSC1, 3, 512, 2, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
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SCT_ENTRY(LLCC_ROTATOR, 4, 1024, 2, 1, 0xFFF, 0x0, 2, 0, 0, 0, 1, 0),
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SCT_ENTRY(LLCC_VOICE, 5, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
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SCT_ENTRY(LLCC_AUDIO, 6, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
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SCT_ENTRY(LLCC_MDMHPGRW, 7, 1024, 2, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
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SCT_ENTRY(LLCC_MDM, 8, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
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SCT_ENTRY(LLCC_CMPT, 10, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
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SCT_ENTRY(LLCC_GPUHTW, 11, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
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SCT_ENTRY(LLCC_GPU, 12, 5120, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
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SCT_ENTRY(LLCC_MMUHWT, 13, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 1),
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SCT_ENTRY(LLCC_CMPTDMA, 15, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
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SCT_ENTRY(LLCC_DISP, 16, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
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SCT_ENTRY(LLCC_VIDFW, 17, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
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SCT_ENTRY(LLCC_MDMHPFX, 20, 1024, 2, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
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SCT_ENTRY(LLCC_MDMPNG, 21, 1024, 0, 1, 0xF, 0x0, 0, 0, 0, 0, 1, 0),
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SCT_ENTRY(LLCC_AUDHW, 22, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
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SCT_ENTRY(LLCC_NPU, 23, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
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SCT_ENTRY(LLCC_WLNHW, 24, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
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SCT_ENTRY(LLCC_PIMEM, 25, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
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};
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static int sdmshrike_qcom_llcc_probe(struct platform_device *pdev)
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{
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return qcom_llcc_probe(pdev, sdmshrike_data,
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ARRAY_SIZE(sdmshrike_data));
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}
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static const struct of_device_id sdmshrike_qcom_llcc_of_match[] = {
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{ .compatible = "qcom,sdmshrike-llcc", },
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{ },
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};
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static struct platform_driver sdmshrike_qcom_llcc_driver = {
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.driver = {
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.name = "sdmshrike-llcc",
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.of_match_table = sdmshrike_qcom_llcc_of_match,
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},
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.probe = sdmshrike_qcom_llcc_probe,
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.remove = qcom_llcc_remove,
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};
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static int __init sdmshrike_init_qcom_llcc_init(void)
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{
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return platform_driver_register(&sdmshrike_qcom_llcc_driver);
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}
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module_init(sdmshrike_init_qcom_llcc_init);
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static void __exit sdmshrike_exit_qcom_llcc_exit(void)
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{
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platform_driver_unregister(&sdmshrike_qcom_llcc_driver);
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}
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module_exit(sdmshrike_exit_qcom_llcc_exit);
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MODULE_DESCRIPTION("Qualcomm Technologies Inc SA8195 LLCC driver");
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MODULE_LICENSE("GPL v2");
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@ -29,6 +29,7 @@
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#define LLCC_AUDHW 22
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#define LLCC_NPU 23
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#define LLCC_WLNHW 24
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#define LLCC_PIMEM 25
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#define LLCC_CVP 28
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#define LLCC_MDMVPE 29
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#define LLCC_APTCM 30
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