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disp: msm: sde: fix imbalance power vote during cwb and dms concurrency

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Imbalance power vote caused with below scenario:

1. Primary display running with CWB enabled.
2. Idle-PC has kicked in causing primary and cwb encoder to rc_idle state.
3. Post idle-PC with DMS switch enabled along with CWB.

Changes made are to avoid pre_modeset and post_modeset callbacks
for CWB encoder as it not required and it puts a unnecessary power
vote causing power issues in suspend usecase.

Change-Id: I95b7ba093484f50be5f575cafa63a02e8fbca441
Signed-off-by: Jayaprakash Madisetty <jmadiset@codeaurora.org>
This commit is contained in:
Jayaprakash Madisetty 2021-06-03 15:26:51 +05:30
parent 73b5bf579d
commit dbe2279227
1 changed files with 6 additions and 6 deletions
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12
msm/sde/sde_encoder.c
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@ -2272,9 +2272,9 @@ static int sde_encoder_virt_modeset_rc(struct drm_encoder *drm_enc,
if (pre_modeset) {
intf_mode = sde_encoder_get_intf_mode(drm_enc);
if (msm_is_mode_seamless_dms(adj_mode) ||
(msm_is_mode_seamless_dyn_clk(adj_mode) &&
is_cmd_mode)) {
if ((msm_is_mode_seamless_dms(adj_mode) ||
msm_is_mode_seamless_dyn_clk(adj_mode)) &&
is_cmd_mode) {
/* restore resource state before releasing them */
ret = sde_encoder_resource_control(drm_enc,
SDE_ENC_RC_EVENT_PRE_MODESET);
@ -2298,9 +2298,9 @@ static int sde_encoder_virt_modeset_rc(struct drm_encoder *drm_enc,
adj_mode);
}
} else {
if (msm_is_mode_seamless_dms(adj_mode) ||
(msm_is_mode_seamless_dyn_clk(adj_mode) &&
is_cmd_mode))
if ((msm_is_mode_seamless_dms(adj_mode) ||
msm_is_mode_seamless_dyn_clk(adj_mode)) &&
is_cmd_mode)
sde_encoder_resource_control(&sde_enc->base,
SDE_ENC_RC_EVENT_POST_MODESET);
else if (msm_is_mode_seamless_poms(adj_mode))