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Merge "clk: qcom: rpmcc: Add rpm smd clock changes in monaco"

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qctecmdr 2021-04-12 17:20:21 -07:00 committed by Gerrit - the friendly Code Review server
commit e67e77ee58
2 changed files with 66 additions and 5 deletions
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67
drivers/clk/qcom/clk-smd-rpm.c
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@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2016, Linaro Limited
* Copyright (c) 2014, 2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2014, 2020-2021, The Linux Foundation. All rights reserved.
*/
#include <linux/clk-provider.h>
@ -941,6 +941,61 @@ static const struct rpm_smd_clk_desc rpm_clk_sdxnightjar = {
.num_clks = ARRAY_SIZE(sdxnightjar_clks),
};
/* Monaco */
DEFINE_CLK_SMD_RPM(monaco, cpuss_gnoc_clk, cpuss_gnoc_a_clk,
QCOM_SMD_RPM_MEM_CLK, 1);
DEFINE_CLK_SMD_RPM(monaco, bimc_gpu_clk, bimc_gpu_a_clk,
QCOM_SMD_RPM_MEM_CLK, 2);
DEFINE_CLK_SMD_RPM_XO_BUFFER(monaco, ln_bb_clk2, ln_bb_clk2_a,
QCOM_SMD_RPM_CLK_BUF_A, 0x2);
DEFINE_CLK_SMD_RPM_XO_BUFFER(monaco, rf_clk3, rf_clk3_a,
QCOM_SMD_RPM_CLK_BUF_A, 6);
static struct clk_hw *monaco_clks[] = {
[RPM_SMD_XO_CLK_SRC] = &holi_bi_tcxo.hw,
[RPM_SMD_XO_A_CLK_SRC] = &holi_bi_tcxo_ao.hw,
[RPM_SMD_SNOC_CLK] = &holi_snoc_clk.hw,
[RPM_SMD_SNOC_A_CLK] = &holi_snoc_a_clk.hw,
[RPM_SMD_BIMC_CLK] = &holi_bimc_clk.hw,
[RPM_SMD_BIMC_A_CLK] = &holi_bimc_a_clk.hw,
[RPM_SMD_QDSS_CLK] = &holi_qdss_clk.hw,
[RPM_SMD_QDSS_A_CLK] = &holi_qdss_a_clk.hw,
[RPM_SMD_LN_BB_CLK2] = &monaco_ln_bb_clk2.hw,
[RPM_SMD_LN_BB_CLK2_A] = &monaco_ln_bb_clk2_a.hw,
[RPM_SMD_RF_CLK3] = &monaco_rf_clk3.hw,
[RPM_SMD_RF_CLK3_A] = &monaco_rf_clk3_a.hw,
[RPM_SMD_CNOC_CLK] = &holi_cnoc_clk.hw,
[RPM_SMD_CNOC_A_CLK] = &holi_cnoc_a_clk.hw,
[RPM_SMD_IPA_CLK] = &holi_ipa_clk.hw,
[RPM_SMD_IPA_A_CLK] = &holi_ipa_a_clk.hw,
[RPM_SMD_QUP_CLK] = &holi_qup_clk.hw,
[RPM_SMD_QUP_A_CLK] = &holi_qup_a_clk.hw,
[RPM_SMD_MMRT_CLK] = &holi_mmrt_clk.hw,
[RPM_SMD_MMRT_A_CLK] = &holi_mmrt_a_clk.hw,
[RPM_SMD_MMNRT_CLK] = &holi_mmnrt_clk.hw,
[RPM_SMD_MMNRT_A_CLK] = &holi_mmnrt_a_clk.hw,
[RPM_SMD_SNOC_PERIPH_CLK] = &holi_snoc_periph_clk.hw,
[RPM_SMD_SNOC_PERIPH_A_CLK] = &holi_snoc_periph_a_clk.hw,
[RPM_SMD_SNOC_LPASS_CLK] = &holi_snoc_lpass_clk.hw,
[RPM_SMD_SNOC_LPASS_A_CLK] = &holi_snoc_lpass_a_clk.hw,
[RPM_SMD_CE1_CLK] = &holi_ce1_clk.hw,
[RPM_SMD_CE1_A_CLK] = &holi_ce1_a_clk.hw,
[RPM_SMD_HWKM_CLK] = &holi_hwkm_clk.hw,
[RPM_SMD_HWKM_A_CLK] = &holi_hwkm_a_clk.hw,
[RPM_SMD_PKA_CLK] = &holi_pka_clk.hw,
[RPM_SMD_PKA_A_CLK] = &holi_pka_a_clk.hw,
[RPM_SMD_BIMC_GPU_CLK] = &monaco_bimc_gpu_clk.hw,
[RPM_SMD_BIMC_GPU_A_CLK] = &monaco_bimc_gpu_a_clk.hw,
[RPM_SMD_CPUSS_GNOC_CLK] = &monaco_cpuss_gnoc_clk.hw,
[RPM_SMD_CPUSS_GNOC_A_CLK] = &monaco_cpuss_gnoc_a_clk.hw,
};
static const struct rpm_smd_clk_desc rpm_clk_monaco = {
.clks = monaco_clks,
.num_clks = ARRAY_SIZE(monaco_clks),
};
static const struct of_device_id rpm_smd_clk_match_table[] = {
{ .compatible = "qcom,rpmcc-msm8916", .data = &rpm_clk_msm8916 },
{ .compatible = "qcom,rpmcc-msm8974", .data = &rpm_clk_msm8974 },
@ -949,6 +1004,7 @@ static const struct of_device_id rpm_smd_clk_match_table[] = {
{ .compatible = "qcom,rpmcc-qcs404", .data = &rpm_clk_qcs404 },
{ .compatible = "qcom,rpmcc-holi", .data = &rpm_clk_holi},
{ .compatible = "qcom,rpmcc-sdxnightjar", .data = &rpm_clk_sdxnightjar},
{ .compatible = "qcom,rpmcc-monaco", .data = &rpm_clk_monaco },
{ }
};
MODULE_DEVICE_TABLE(of, rpm_smd_clk_match_table);
@ -1007,7 +1063,7 @@ static int rpm_smd_clk_probe(struct platform_device *pdev)
{
struct clk_hw **hw_clks;
const struct rpm_smd_clk_desc *desc;
int ret, i, is_holi, hw_clk_handoff = false, is_sdxnightjar;
int ret, i, is_holi, hw_clk_handoff = false, is_sdxnightjar, is_monaco;
desc = of_device_get_match_data(&pdev->dev);
if (!desc)
@ -1017,7 +1073,10 @@ static int rpm_smd_clk_probe(struct platform_device *pdev)
"qcom,rpmcc-holi");
is_sdxnightjar = of_device_is_compatible(pdev->dev.of_node,
"qcom,rpmcc-sdxnightjar");
if (is_holi || is_sdxnightjar) {
is_monaco = of_device_is_compatible(pdev->dev.of_node,
"qcom,rpmcc-monaco");
if (is_holi || is_sdxnightjar || is_monaco) {
ret = clk_vote_bimc(&holi_bimc_clk.hw, INT_MAX);
if (ret < 0)
return ret;
@ -1061,7 +1120,7 @@ static int rpm_smd_clk_probe(struct platform_device *pdev)
if (ret)
goto err;
if (is_holi) {
if (is_holi || is_monaco) {
/*
* Keep an active vote on CXO in case no other driver
* votes for it.

4
include/dt-bindings/clock/qcom,rpmcc.h
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@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright 2015-2020 Linaro Limited
* Copyright 2015-2021, Linaro Limited
*/
#ifndef _DT_BINDINGS_CLK_MSM_RPMCC_H
@ -152,5 +152,7 @@
#define RPM_SMD_RF_CLK5_PIN 110
#define RPM_SMD_RF_CLK5_A_PIN 111
#define RPM_SMD_BIMC_FREQ_LOG 112
#define RPM_SMD_CPUSS_GNOC_CLK 113
#define RPM_SMD_CPUSS_GNOC_A_CLK 114
#endif