diff --git a/drivers/firmware/qcom_scm-smc.c b/drivers/firmware/qcom_scm-smc.c
index d3f96bc65b903..093500f3f89a9 100644
--- a/drivers/firmware/qcom_scm-smc.c
+++ b/drivers/firmware/qcom_scm-smc.c
@@ -1199,6 +1199,26 @@ int __qcom_scm_assign_mem(struct device *dev, phys_addr_t mem_region,
 	return ret ? : desc.res[0];
 }
 
+int __qcom_scm_mem_protect_sd_ctrl(struct device *dev, u32 devid,
+				phys_addr_t mem_addr, u64 mem_size, u32 vmid)
+{
+	int ret;
+	struct qcom_scm_desc desc = {
+		.svc = QCOM_SCM_SVC_MP,
+		.cmd = QCOM_SCM_MP_CMD_SD_CTRL,
+		.owner = ARM_SMCCC_OWNER_SIP
+	};
+
+	desc.args[0] = devid;
+	desc.args[1] = mem_addr;
+	desc.args[2] = mem_size;
+	desc.args[3] = vmid;
+	desc.arginfo = QCOM_SCM_ARGS(4);
+	ret = qcom_scm_call(dev, &desc);
+
+	return ret ? : desc.res[0];
+}
+
 int __qcom_scm_kgsl_set_smmu_aperture(struct device *dev,
 					unsigned int num_context_bank)
 {
diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
index abef50024c7f6..949f283a22dd4 100644
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -510,6 +510,18 @@ int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
 }
 EXPORT_SYMBOL(qcom_scm_assign_mem);
 
+/**
+ * qcom_scm_mem_protect_sd_ctrl() - SDE memory protect.
+ *
+ */
+int qcom_scm_mem_protect_sd_ctrl(u32 devid, phys_addr_t mem_addr, u64 mem_size,
+				u32 vmid)
+{
+	return __qcom_scm_mem_protect_sd_ctrl(__scm->dev, devid, mem_addr,
+						mem_size, vmid);
+}
+EXPORT_SYMBOL(qcom_scm_mem_protect_sd_ctrl);
+
 bool qcom_scm_kgsl_set_smmu_aperture_available(void)
 {
 	int ret;
diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h
index c9eece2edc323..fb8fb0a6a883b 100644
--- a/drivers/firmware/qcom_scm.h
+++ b/drivers/firmware/qcom_scm.h
@@ -77,6 +77,7 @@ extern void __qcom_scm_mmu_sync(struct device *dev, bool sync);
 #define QCOM_SCM_MP_IOMMU_SECURE_MAP2_FLAT	0x12
 #define QCOM_SCM_MP_IOMMU_SECURE_UNMAP2_FLAT	0x13
 #define QCOM_SCM_MP_ASSIGN			0x16
+#define QCOM_SCM_MP_CMD_SD_CTRL			0x18
 #define QCOM_SCM_MP_CP_SMMU_APERTURE_ID		0x1b
 #define QCOM_SCM_MEMP_SHM_BRIDGE_ENABLE		0x1c
 #define QCOM_SCM_MEMP_SHM_BRIDGE_DELETE		0x1d
@@ -108,6 +109,8 @@ extern int  __qcom_scm_assign_mem(struct device *dev,
 				  phys_addr_t mem_region, size_t mem_sz,
 				  phys_addr_t src, size_t src_sz,
 				  phys_addr_t dest, size_t dest_sz);
+extern int __qcom_scm_mem_protect_sd_ctrl(struct device *dev, u32 devid,
+				phys_addr_t mem_addr, u64 mem_size, u32 vmid);
 extern int __qcom_scm_kgsl_set_smmu_aperture(struct device *dev,
 						unsigned int num_context_bank);
 extern int __qcom_scm_enable_shm_bridge(struct device *dev);
diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h
index 242172432db0a..aafe1064d8eeb 100644
--- a/include/linux/qcom_scm.h
+++ b/include/linux/qcom_scm.h
@@ -72,6 +72,8 @@ extern int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
 			       unsigned int *src,
 			       const struct qcom_scm_vmperm *newvm,
 			       unsigned int dest_cnt);
+extern int qcom_scm_mem_protect_sd_ctrl(u32 devid, phys_addr_t mem_addr,
+					u64 mem_size, u32 vmid);
 extern bool qcom_scm_kgsl_set_smmu_aperture_available(void);
 extern int qcom_scm_kgsl_set_smmu_aperture(
 				unsigned int num_context_bank);
@@ -177,6 +179,9 @@ static inline int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
 				      unsigned int *src,
 				      const struct qcom_scm_vmperm *newvm,
 				      unsigned int dest_cnt) { return -ENODEV; }
+static inline int qcom_scm_mem_protect_sd_ctrl(u32 devid, phys_addr_t mem_addr,
+					u64 mem_size, u32 vmid)
+					{ return -ENODEV; }
 static inline bool qcom_scm_kgsl_set_smmu_aperture_available(void)
 		{ return false; }
 static inline int qcom_scm_kgsl_set_smmu_aperture(