Merge "disp: msm: dp: link training enhancements"
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qctecmdr
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commit
eddbcba8a5
183
msm/dp/dp_ctrl.c
183
msm/dp/dp_ctrl.c
@ -41,6 +41,8 @@
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#define MR_LINK_CUSTOM80 0x200
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#define MR_LINK_TRAINING4 0x40
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#define DP_MAX_LANES 4
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struct dp_mst_ch_slot_info {
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u32 start_slot;
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u32 tot_slots;
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@ -182,35 +184,40 @@ static void dp_ctrl_wait4video_ready(struct dp_ctrl_private *ctrl)
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pr_warn("SEND_VIDEO time out\n");
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}
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static int dp_ctrl_update_sink_vx_px(struct dp_ctrl_private *ctrl,
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u32 voltage_level, u32 pre_emphasis_level)
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static int dp_ctrl_update_sink_vx_px(struct dp_ctrl_private *ctrl)
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{
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int i;
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u8 buf[4];
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int i, ret;
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u8 buf[DP_MAX_LANES];
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u8 v_level = ctrl->link->phy_params.v_level;
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u8 p_level = ctrl->link->phy_params.p_level;
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u8 size = min_t(u8, sizeof(buf), ctrl->link->link_params.lane_count);
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u32 max_level_reached = 0;
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if (voltage_level == DP_LINK_VOLTAGE_MAX) {
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pr_debug("max. voltage swing level reached %d\n",
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voltage_level);
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max_level_reached |= BIT(2);
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if (v_level == DP_LINK_VOLTAGE_MAX) {
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pr_debug("max voltage swing level reached %d\n", v_level);
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max_level_reached |= DP_TRAIN_MAX_SWING_REACHED;
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}
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if (pre_emphasis_level == DP_LINK_PRE_EMPHASIS_MAX) {
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pr_debug("max. pre-emphasis level reached %d\n",
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pre_emphasis_level);
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max_level_reached |= BIT(5);
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if (p_level == DP_LINK_PRE_EMPHASIS_MAX) {
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pr_debug("max pre-emphasis level reached %d\n", p_level);
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max_level_reached |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
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}
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pre_emphasis_level <<= 3;
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p_level <<= DP_TRAIN_PRE_EMPHASIS_SHIFT;
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for (i = 0; i < 4; i++)
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buf[i] = voltage_level | pre_emphasis_level | max_level_reached;
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for (i = 0; i < size; i++)
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buf[i] = v_level | p_level | max_level_reached;
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pr_debug("sink: p|v=0x%x\n", voltage_level | pre_emphasis_level);
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return drm_dp_dpcd_write(ctrl->aux->drm_aux, 0x103, buf, 4);
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pr_debug("lanes: %d, swing: 0x%x, pre-emp: 0x%x\n",
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size, v_level, p_level);
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ret = drm_dp_dpcd_write(ctrl->aux->drm_aux,
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DP_TRAINING_LANE0_SET, buf, size);
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return ret <= 0 ? -EINVAL : 0;
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}
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static int dp_ctrl_update_vx_px(struct dp_ctrl_private *ctrl)
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static void dp_ctrl_update_hw_vx_px(struct dp_ctrl_private *ctrl)
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{
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struct dp_link *link = ctrl->link;
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bool high = false;
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@ -221,21 +228,22 @@ static int dp_ctrl_update_vx_px(struct dp_ctrl_private *ctrl)
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ctrl->catalog->update_vx_px(ctrl->catalog,
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link->phy_params.v_level, link->phy_params.p_level, high);
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return dp_ctrl_update_sink_vx_px(ctrl, link->phy_params.v_level,
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link->phy_params.p_level);
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}
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static int dp_ctrl_train_pattern_set(struct dp_ctrl_private *ctrl,
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u8 pattern)
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static int dp_ctrl_update_sink_pattern(struct dp_ctrl_private *ctrl, u8 pattern)
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{
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u8 buf[4];
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u8 buf = pattern;
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int ret;
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pr_debug("sink: pattern=%x\n", pattern);
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buf[0] = pattern;
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return drm_dp_dpcd_write(ctrl->aux->drm_aux,
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DP_TRAINING_PATTERN_SET, buf, 1);
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if (pattern && pattern != DP_TRAINING_PATTERN_4)
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buf |= DP_LINK_SCRAMBLING_DISABLE;
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ret = drm_dp_dpcd_writeb(ctrl->aux->drm_aux,
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DP_TRAINING_PATTERN_SET, buf);
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return ret <= 0 ? -EINVAL : 0;
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}
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static int dp_ctrl_read_link_status(struct dp_ctrl_private *ctrl,
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@ -287,10 +295,11 @@ static int dp_ctrl_lane_count_down_shift(struct dp_ctrl_private *ctrl)
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return ret;
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}
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static int dp_ctrl_link_train_1(struct dp_ctrl_private *ctrl)
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static int dp_ctrl_link_training_1(struct dp_ctrl_private *ctrl)
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{
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int tries, old_v_level, ret = 0;
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int tries, old_v_level, ret = -EINVAL;
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u8 link_status[DP_LINK_STATUS_SIZE];
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u8 pattern = 0;
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int const maximum_retries = 5;
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ctrl->aux->state &= ~DP_STATE_TRAIN_1_FAILED;
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@ -301,42 +310,42 @@ static int dp_ctrl_link_train_1(struct dp_ctrl_private *ctrl)
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/* Make sure to clear the current pattern before starting a new one */
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wmb();
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ctrl->catalog->set_pattern(ctrl->catalog, 0x01);
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ret = dp_ctrl_train_pattern_set(ctrl, DP_TRAINING_PATTERN_1 |
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DP_LINK_SCRAMBLING_DISABLE); /* train_1 */
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if (ret <= 0) {
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ret = -EINVAL;
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goto end;
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}
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ret = dp_ctrl_update_vx_px(ctrl);
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if (ret <= 0) {
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ret = -EINVAL;
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goto end;
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}
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tries = 0;
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old_v_level = ctrl->link->phy_params.v_level;
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while (1) {
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if (atomic_read(&ctrl->aborted)) {
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ret = -EINVAL;
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while (!atomic_read(&ctrl->aborted)) {
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/* update hardware with current swing/pre-emp values */
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dp_ctrl_update_hw_vx_px(ctrl);
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if (!pattern) {
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pattern = DP_TRAINING_PATTERN_1;
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ctrl->catalog->set_pattern(ctrl->catalog, pattern);
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/* update sink with current settings */
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ret = dp_ctrl_update_sink_pattern(ctrl, pattern);
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if (ret)
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break;
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}
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ret = dp_ctrl_update_sink_vx_px(ctrl);
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if (ret)
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break;
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drm_dp_link_train_clock_recovery_delay(ctrl->panel->dpcd);
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ret = dp_ctrl_read_link_status(ctrl, link_status);
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if (ret)
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break;
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if (drm_dp_clock_recovery_ok(link_status,
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ctrl->link->link_params.lane_count)) {
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if (!drm_dp_clock_recovery_ok(link_status,
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ctrl->link->link_params.lane_count))
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ret = -EINVAL;
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else
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break;
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}
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if (ctrl->link->phy_params.v_level == DP_LINK_VOLTAGE_MAX) {
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pr_err_ratelimited("max v_level reached\n");
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ret = -EAGAIN;
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break;
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}
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@ -355,13 +364,8 @@ static int dp_ctrl_link_train_1(struct dp_ctrl_private *ctrl)
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pr_debug("clock recovery not done, adjusting vx px\n");
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ctrl->link->adjust_levels(ctrl->link, link_status);
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ret = dp_ctrl_update_vx_px(ctrl);
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if (ret <= 0) {
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ret = -EINVAL;
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break;
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}
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}
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end:
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ctrl->aux->state &= ~DP_STATE_TRAIN_1_STARTED;
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if (ret)
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@ -400,14 +404,14 @@ static int dp_ctrl_link_rate_down_shift(struct dp_ctrl_private *ctrl)
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static void dp_ctrl_clear_training_pattern(struct dp_ctrl_private *ctrl)
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{
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dp_ctrl_train_pattern_set(ctrl, 0);
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dp_ctrl_update_sink_pattern(ctrl, 0);
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drm_dp_link_train_channel_eq_delay(ctrl->panel->dpcd);
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}
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static int dp_ctrl_link_training_2(struct dp_ctrl_private *ctrl)
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{
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int tries = 0, ret = 0;
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char pattern;
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int tries = 0, ret = -EINVAL;
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u8 dpcd_pattern, pattern = 0;
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int const maximum_retries = 5;
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u8 link_status[DP_LINK_STATUS_SIZE];
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@ -420,32 +424,30 @@ static int dp_ctrl_link_training_2(struct dp_ctrl_private *ctrl)
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wmb();
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if (drm_dp_tps3_supported(ctrl->panel->dpcd))
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pattern = DP_TRAINING_PATTERN_3;
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dpcd_pattern = DP_TRAINING_PATTERN_3;
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else
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pattern = DP_TRAINING_PATTERN_2;
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dpcd_pattern = DP_TRAINING_PATTERN_2;
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ret = dp_ctrl_update_vx_px(ctrl);
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if (ret <= 0) {
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ret = -EINVAL;
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goto end;
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}
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while (!atomic_read(&ctrl->aborted)) {
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/* update hardware with current swing/pre-emp values */
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dp_ctrl_update_hw_vx_px(ctrl);
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if (pattern != DP_TRAINING_PATTERN_4)
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pattern |= DP_LINK_SCRAMBLING_DISABLE;
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if (!pattern) {
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pattern = dpcd_pattern;
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/* program hw to send pattern */
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ctrl->catalog->set_pattern(ctrl->catalog, pattern);
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ret = dp_ctrl_train_pattern_set(ctrl, pattern);
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if (ret <= 0) {
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ret = -EINVAL;
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goto end;
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}
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do {
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if (atomic_read(&ctrl->aborted)) {
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ret = -EINVAL;
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/* update sink with current pattern */
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ret = dp_ctrl_update_sink_pattern(ctrl, pattern);
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if (ret)
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break;
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}
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ret = dp_ctrl_update_sink_vx_px(ctrl);
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if (ret)
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break;
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drm_dp_link_train_channel_eq_delay(ctrl->panel->dpcd);
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ret = dp_ctrl_read_link_status(ctrl, link_status);
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@ -459,8 +461,10 @@ static int dp_ctrl_link_training_2(struct dp_ctrl_private *ctrl)
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break;
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}
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if (drm_dp_channel_eq_ok(link_status,
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if (!drm_dp_channel_eq_ok(link_status,
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ctrl->link->link_params.lane_count))
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ret = -EINVAL;
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else
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break;
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if (tries > maximum_retries) {
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@ -470,13 +474,8 @@ static int dp_ctrl_link_training_2(struct dp_ctrl_private *ctrl)
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tries++;
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ctrl->link->adjust_levels(ctrl->link, link_status);
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ret = dp_ctrl_update_vx_px(ctrl);
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if (ret <= 0) {
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ret = -EINVAL;
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break;
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}
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} while (1);
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end:
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ctrl->aux->state &= ~DP_STATE_TRAIN_2_STARTED;
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if (ret)
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@ -489,7 +488,7 @@ end:
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static int dp_ctrl_link_train(struct dp_ctrl_private *ctrl)
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{
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int ret = 0;
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u8 encoding = 0x1;
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u8 const encoding = 0x1, downspread = 0x00;
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struct drm_dp_link link_info = {0};
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ctrl->link->phy_params.p_level = 0;
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@ -504,14 +503,21 @@ static int dp_ctrl_link_train(struct dp_ctrl_private *ctrl)
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if (ret)
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goto end;
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ret = drm_dp_dpcd_write(ctrl->aux->drm_aux,
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DP_MAIN_LINK_CHANNEL_CODING_SET, &encoding, 1);
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ret = drm_dp_dpcd_writeb(ctrl->aux->drm_aux,
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DP_DOWNSPREAD_CTRL, downspread);
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if (ret <= 0) {
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ret = -EINVAL;
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goto end;
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}
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ret = dp_ctrl_link_train_1(ctrl);
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ret = drm_dp_dpcd_writeb(ctrl->aux->drm_aux,
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DP_MAIN_LINK_CHANNEL_CODING_SET, encoding);
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if (ret <= 0) {
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ret = -EINVAL;
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goto end;
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}
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ret = dp_ctrl_link_training_1(ctrl);
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if (ret) {
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pr_err("link training #1 failed\n");
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goto end;
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@ -862,8 +868,9 @@ static void dp_ctrl_send_phy_test_pattern(struct dp_ctrl_private *ctrl)
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u32 pattern_sent = 0x0;
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u32 pattern_requested = ctrl->link->phy_params.phy_test_pattern_sel;
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dp_ctrl_update_vx_px(ctrl);
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dp_ctrl_update_hw_vx_px(ctrl);
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ctrl->catalog->send_phy_pattern(ctrl->catalog, pattern_requested);
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dp_ctrl_update_sink_vx_px(ctrl);
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ctrl->link->send_test_response(ctrl->link);
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pattern_sent = ctrl->catalog->read_phy_pattern(ctrl->catalog);
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@ -1426,6 +1426,10 @@ static int dp_link_adjust_levels(struct dp_link *dp_link, u8 *link_status)
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&& (dp_link->phy_params.v_level == DP_LINK_VOLTAGE_LEVEL_2))
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dp_link->phy_params.p_level = DP_LINK_PRE_EMPHASIS_LEVEL_1;
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if ((dp_link->phy_params.p_level > DP_LINK_PRE_EMPHASIS_LEVEL_2)
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&& (dp_link->phy_params.v_level == DP_LINK_VOLTAGE_LEVEL_1))
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dp_link->phy_params.p_level = DP_LINK_PRE_EMPHASIS_LEVEL_2;
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pr_debug("Set (VxPx): %x%x\n",
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dp_link->phy_params.v_level, dp_link->phy_params.p_level);
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