perf mem/c2c: Fix perf_mem_events to support powerpc
PowerPC hardware does not have a builtin latency filter (--ldlat) for the "mem-load" event and perf_mem_events by default includes "/ldlat=30/" which is causing a failure on PowerPC. Refactor the code to support "perf mem/c2c" on PowerPC. This patch depends on kernel side changes done my Madhavan: https://lists.ozlabs.org/pipermail/linuxppc-dev/2018-December/182596.html Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com> Acked-by: Jiri Olsa <jolsa@kernel.org> Cc: Dick Fowles <fowles@inreach.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Namhyung Kim <namhyung@kernel.org> Cc: linuxppc-dev@lists.ozlabs.org Link: http://lkml.kernel.org/r/20190129132412.771-1-ravi.bangoria@linux.ibm.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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@ -19,8 +19,11 @@ C2C stands for Cache To Cache.
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The perf c2c tool provides means for Shared Data C2C/HITM analysis. It allows
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The perf c2c tool provides means for Shared Data C2C/HITM analysis. It allows
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you to track down the cacheline contentions.
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you to track down the cacheline contentions.
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The tool is based on x86's load latency and precise store facility events
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On x86, the tool is based on load latency and precise store facility events
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provided by Intel CPUs. These events provide:
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provided by Intel CPUs. On PowerPC, the tool uses random instruction sampling
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with thresholding feature.
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These events provide:
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- memory address of the access
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- memory address of the access
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- type of the access (load and store details)
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- type of the access (load and store details)
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- latency (in cycles) of the load access
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- latency (in cycles) of the load access
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@ -46,7 +49,7 @@ RECORD OPTIONS
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-l::
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-l::
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--ldlat::
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--ldlat::
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Configure mem-loads latency.
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Configure mem-loads latency. (x86 only)
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-k::
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-k::
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--all-kernel::
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--all-kernel::
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@ -119,11 +122,16 @@ Following perf record options are configured by default:
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-W,-d,--phys-data,--sample-cpu
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-W,-d,--phys-data,--sample-cpu
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Unless specified otherwise with '-e' option, following events are monitored by
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Unless specified otherwise with '-e' option, following events are monitored by
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default:
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default on x86:
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cpu/mem-loads,ldlat=30/P
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cpu/mem-loads,ldlat=30/P
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cpu/mem-stores/P
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cpu/mem-stores/P
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and following on PowerPC:
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cpu/mem-loads/
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cpu/mem-stores/
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User can pass any 'perf record' option behind '--' mark, like (to enable
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User can pass any 'perf record' option behind '--' mark, like (to enable
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callchains and system wide monitoring):
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callchains and system wide monitoring):
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@ -82,7 +82,7 @@ RECORD OPTIONS
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Be more verbose (show counter open errors, etc)
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Be more verbose (show counter open errors, etc)
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--ldlat <n>::
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--ldlat <n>::
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Specify desired latency for loads event.
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Specify desired latency for loads event. (x86 only)
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In addition, for report all perf report options are valid, and for record
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In addition, for report all perf report options are valid, and for record
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all perf record options.
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all perf record options.
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@ -2,6 +2,7 @@ libperf-y += header.o
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libperf-y += sym-handling.o
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libperf-y += sym-handling.o
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libperf-y += kvm-stat.o
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libperf-y += kvm-stat.o
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libperf-y += perf_regs.o
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libperf-y += perf_regs.o
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libperf-y += mem-events.o
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libperf-$(CONFIG_DWARF) += dwarf-regs.o
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libperf-$(CONFIG_DWARF) += dwarf-regs.o
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libperf-$(CONFIG_DWARF) += skip-callchain-idx.o
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libperf-$(CONFIG_DWARF) += skip-callchain-idx.o
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11
tools/perf/arch/powerpc/util/mem-events.c
Normal file
11
tools/perf/arch/powerpc/util/mem-events.c
Normal file
@ -0,0 +1,11 @@
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// SPDX-License-Identifier: GPL-2.0
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#include "mem-events.h"
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/* PowerPC does not support 'ldlat' parameter. */
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char *perf_mem_events__name(int i)
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{
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if (i == PERF_MEM_EVENTS__LOAD)
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return (char *) "cpu/mem-loads/";
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return (char *) "cpu/mem-stores/";
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}
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@ -28,7 +28,7 @@ struct perf_mem_event perf_mem_events[PERF_MEM_EVENTS__MAX] = {
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static char mem_loads_name[100];
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static char mem_loads_name[100];
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static bool mem_loads_name__init;
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static bool mem_loads_name__init;
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char *perf_mem_events__name(int i)
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char * __weak perf_mem_events__name(int i)
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{
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{
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if (i == PERF_MEM_EVENTS__LOAD) {
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if (i == PERF_MEM_EVENTS__LOAD) {
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if (!mem_loads_name__init) {
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if (!mem_loads_name__init) {
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