lisa/android_kernel_xiaomi_sm8350
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qcacld-3.0: fix CMEM de-initialization

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DP SOC's fst_in_cmem will be set to true when the FW has support
for placing FST in CMEM; in FTM mode, though this variable will be
set, CMEM parameters will not be initialized. When the mode is
changed to mission mode, we try to de-initialize CMEM parameters
which are not initialized. Do not rely on this variable for
de-initialization of CMEM parameters.

Change-Id: I1818d5572b281b4ae800f3fef0c633fedde9e758
CRs-Fixed: 2783939
This commit is contained in:
Manikanta Pubbisetty 2020-09-24 11:59:24 +05:30 committed by snandini
parent 763d089577
commit f36e361f0d
2 changed files with 14 additions and 8 deletions
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4
core/dp/txrx3.0/dp_fisa_rx.c
View File

@ -581,7 +581,7 @@ dp_fisa_rx_get_hw_ft_timestamp(struct dp_rx_fst *fisa_hdl,
sw_ft_entry = &(((struct dp_fisa_rx_sw_ft *)
fisa_hdl->base)[hashed_flow_idx]);
if (fisa_hdl->soc_hdl->fst_in_cmem)
if (fisa_hdl->fst_in_cmem)
return hal_rx_flow_get_cmem_fse_timestamp(
hal_soc_hdl, sw_ft_entry->cmem_offset);
@ -921,7 +921,7 @@ dp_rx_get_fisa_flow(struct dp_rx_fst *fisa_hdl, struct dp_vdev *vdev,
}
/* else new flow, add entry to FT */
if (fisa_hdl->soc_hdl->fst_in_cmem)
if (fisa_hdl->fst_in_cmem)
return dp_fisa_rx_queue_fst_update_work(fisa_hdl, flow_idx,
nbuf, vdev);

18
core/dp/txrx3.0/dp_rx_fst.c
View File

@ -38,7 +38,7 @@ void dp_rx_dump_fisa_table(struct dp_soc *soc)
struct dp_fisa_rx_sw_ft *sw_ft_entry;
int i;
if (!soc->fst_in_cmem)
if (!fst->fst_in_cmem)
return hal_rx_dump_fse_table(soc->rx_fst->hal_rx_fst);
sw_ft_entry = (struct dp_fisa_rx_sw_ft *)fst->base;
@ -159,8 +159,10 @@ static QDF_STATUS dp_rx_fst_cmem_init(struct dp_rx_fst *fst)
fst->fst_update_wq =
qdf_alloc_high_prior_ordered_workqueue("dp_rx_fst_update_wq");
if (!fst->fst_update_wq)
if (!fst->fst_update_wq) {
dp_err("failed to allocate fst update wq\n");
return QDF_STATUS_E_FAILURE;
}
qdf_create_work(0, &fst->fst_update_work,
dp_fisa_rx_fst_update_work, fst);
@ -292,17 +294,21 @@ out2:
static void dp_rx_fst_check_cmem_support(struct dp_soc *soc)
{
struct dp_rx_fst *fst = soc->rx_fst;
QDF_STATUS status;
/* FW doesn't support CMEM FSE, keep it in DDR */
if (!soc->fst_in_cmem)
return;
status = dp_rx_fst_cmem_init(fst);
if (status != QDF_STATUS_SUCCESS)
return;
hal_rx_fst_detach(fst->hal_rx_fst, soc->osdev);
fst->hal_rx_fst = NULL;
fst->hal_rx_fst_base_paddr = 0;
dp_rx_fst_cmem_init(fst);
fst->flow_deletion_supported = true;
fst->fst_in_cmem = true;
}
/**
@ -336,7 +342,7 @@ QDF_STATUS dp_rx_flow_send_fst_fw_setup(struct dp_soc *soc,
status = dp_htt_rx_flow_fst_setup(pdev, &fisa_hw_fst_setup_cmd);
if (!soc->fst_in_cmem)
if (!fst->fst_in_cmem)
return status;
status = qdf_wait_single_event(&fst->cmem_resp_event,
@ -362,7 +368,7 @@ void dp_rx_fst_detach(struct dp_soc *soc, struct dp_pdev *pdev)
dp_fst = soc->rx_fst;
if (qdf_likely(dp_fst)) {
qdf_timer_sync_cancel(&dp_fst->fse_cache_flush_timer);
if (soc->fst_in_cmem)
if (dp_fst->fst_in_cmem)
dp_rx_fst_cmem_deinit(dp_fst);
else
hal_rx_fst_detach(dp_fst->hal_rx_fst, soc->osdev);