csky: Fixup msa highest 3 bits mask
[ Upstream commit 165f2d2858013253042809df082b8df7e34e86d7 ] Just as comment mentioned, the msa format: cr<30/31, 15> MSA register format: 31 - 29 | 28 - 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 BA Reserved SH WA B SO SEC C D V So we should shift 29 bits not 28 bits for mask Signed-off-by: Liu Yibin <jiulong@linux.alibaba.com> Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -167,8 +167,8 @@
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* BA Reserved C D V
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*/
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cprcr r6, cpcr30
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lsri r6, 28
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lsli r6, 28
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lsri r6, 29
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lsli r6, 29
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addi r6, 0xe
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cpwcr r6, cpcr30
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@ -225,8 +225,8 @@
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*/
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mfcr r6, cr<30, 15> /* Get MSA0 */
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2:
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lsri r6, 28
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lsli r6, 28
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lsri r6, 29
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lsli r6, 29
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addi r6, 0x1ce
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mtcr r6, cr<30, 15> /* Set MSA0 */
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