qseecom: Add qseecom driver snapshot for Lahaina
Add snapshot for qseecom driver from msm-4.19 commit 87a248d5b496d ("qseecom: invalidate listener buffer cache when get listener request"). Change-Id: I22261ad22fa8302b72b5569c68b311ca7fef9192 Signed-off-by: Zhen Kong <zkong@codeaurora.org>
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@ -481,6 +481,14 @@ config PVPANIC
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a paravirtualized device provided by QEMU; it lets a virtual machine
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(guest) communicate panic events to the host.
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config QSEECOM
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tristate "QTI Secure Execution Communicator driver"
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help
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Provides a communication interface between userspace and
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QTI Secure Execution Environment (QSEE) using Secure Channel
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Manager (SCM) interface. It exposes APIs for both userspace and
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kernel clients.
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source "drivers/misc/c2port/Kconfig"
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source "drivers/misc/eeprom/Kconfig"
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source "drivers/misc/cb710/Kconfig"
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@ -58,3 +58,4 @@ obj-$(CONFIG_PVPANIC) += pvpanic.o
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obj-$(CONFIG_HABANA_AI) += habanalabs/
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obj-$(CONFIG_XILINX_SDFEC) += xilinx_sdfec.o
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obj-$(CONFIG_UID_SYS_STATS) += uid_sys_stats.o
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obj-$(CONFIG_QSEECOM) += qseecom.o
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9738
drivers/misc/qseecom.c
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9738
drivers/misc/qseecom.c
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File diff suppressed because it is too large
Load Diff
36
drivers/misc/qseecom_kernel.h
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36
drivers/misc/qseecom_kernel.h
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@ -0,0 +1,36 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
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*/
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#ifndef __QSEECOM_KERNEL_H_
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#define __QSEECOM_KERNEL_H_
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#include <linux/types.h>
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#define QSEECOM_ALIGN_SIZE 0x40
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#define QSEECOM_ALIGN_MASK (QSEECOM_ALIGN_SIZE - 1)
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#define QSEECOM_ALIGN(x) \
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((x + QSEECOM_ALIGN_MASK) & (~QSEECOM_ALIGN_MASK))
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/*
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* struct qseecom_handle -
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* Handle to the qseecom device for kernel clients
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* @sbuf - shared buffer pointer
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* @sbbuf_len - shared buffer size
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*/
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struct qseecom_handle {
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void *dev; /* in/out */
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unsigned char *sbuf; /* in/out */
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uint32_t sbuf_len; /* in/out */
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};
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int qseecom_start_app(struct qseecom_handle **handle,
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char *app_name, uint32_t size);
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int qseecom_shutdown_app(struct qseecom_handle **handle);
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int qseecom_send_command(struct qseecom_handle *handle, void *send_buf,
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uint32_t sbuf_len, void *resp_buf, uint32_t rbuf_len);
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int qseecom_set_bandwidth(struct qseecom_handle *handle, bool high);
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int qseecom_process_listener_from_smcinvoke(struct scm_desc *desc);
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#endif /* __QSEECOM_KERNEL_H_ */
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145
include/crypto/ice.h
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145
include/crypto/ice.h
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@ -0,0 +1,145 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2014-2020, The Linux Foundation. All rights reserved.
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*/
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#ifndef _QCOM_INLINE_CRYPTO_ENGINE_H_
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#define _QCOM_INLINE_CRYPTO_ENGINE_H_
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#include <linux/platform_device.h>
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#include <linux/cdev.h>
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struct request;
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enum ice_cryto_algo_mode {
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ICE_CRYPTO_ALGO_MODE_AES_ECB = 0x0,
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ICE_CRYPTO_ALGO_MODE_AES_XTS = 0x3,
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};
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enum ice_crpto_key_size {
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ICE_CRYPTO_KEY_SIZE_128 = 0x0,
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ICE_CRYPTO_KEY_SIZE_256 = 0x2,
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};
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enum ice_crpto_key_mode {
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ICE_CRYPTO_USE_KEY0_HW_KEY = 0x0,
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ICE_CRYPTO_USE_KEY1_HW_KEY = 0x1,
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ICE_CRYPTO_USE_LUT_SW_KEY0 = 0x2,
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ICE_CRYPTO_USE_LUT_SW_KEY = 0x3
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};
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#define QCOM_ICE_TYPE_NAME_LEN 8
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typedef void (*ice_error_cb)(void *, u32 error);
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struct qcom_ice_bus_vote {
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uint32_t client_handle;
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uint32_t curr_vote;
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int min_bw_vote;
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int max_bw_vote;
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int saved_vote;
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bool is_max_bw_needed;
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struct device_attribute max_bus_bw;
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};
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/*
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* ICE HW device structure.
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*/
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struct ice_device {
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struct list_head list;
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struct device *pdev;
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struct cdev cdev;
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dev_t device_no;
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struct class *driver_class;
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void __iomem *mmio;
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struct resource *res;
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int irq;
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bool is_ice_enabled;
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bool is_ice_disable_fuse_blown;
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ice_error_cb error_cb;
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void *host_controller_data; /* UFS/EMMC/other? */
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struct list_head clk_list_head;
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u32 ice_hw_version;
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bool is_ice_clk_available;
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char ice_instance_type[QCOM_ICE_TYPE_NAME_LEN];
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struct regulator *reg;
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bool is_regulator_available;
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struct qcom_ice_bus_vote bus_vote;
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ktime_t ice_reset_start_time;
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ktime_t ice_reset_complete_time;
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void *key_table;
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};
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struct ice_crypto_setting {
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enum ice_crpto_key_size key_size;
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enum ice_cryto_algo_mode algo_mode;
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enum ice_crpto_key_mode key_mode;
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short key_index;
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};
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struct ice_data_setting {
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struct ice_crypto_setting crypto_data;
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bool sw_forced_context_switch;
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bool decr_bypass;
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bool encr_bypass;
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};
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/* MSM ICE Crypto Data Unit of target DUN of Transfer Request */
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enum ice_crypto_data_unit {
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ICE_CRYPTO_DATA_UNIT_512_B = 0,
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ICE_CRYPTO_DATA_UNIT_1_KB = 1,
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ICE_CRYPTO_DATA_UNIT_2_KB = 2,
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ICE_CRYPTO_DATA_UNIT_4_KB = 3,
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ICE_CRYPTO_DATA_UNIT_8_KB = 4,
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ICE_CRYPTO_DATA_UNIT_16_KB = 5,
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ICE_CRYPTO_DATA_UNIT_32_KB = 6,
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ICE_CRYPTO_DATA_UNIT_64_KB = 7,
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};
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struct qcom_ice_variant_ops *qcom_ice_get_variant_ops(struct device_node *node);
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struct platform_device *qcom_ice_get_pdevice(struct device_node *node);
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#if IS_ENABLED(CONFIG_CYRPTO_DEV_QCOM_ICE)
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int enable_ice_setup(struct ice_device *ice_dev);
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int disable_ice_setup(struct ice_device *ice_dev);
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int qcom_ice_setup_ice_hw(const char *storage_type, int enable);
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void qcom_ice_set_fde_flag(int flag);
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struct list_head *get_ice_dev_list(void);
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#else
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static inline int enable_ice_setup(struct ice_device *ice_dev)
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{
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return 0;
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}
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static inline int disable_ice_setup(struct ice_device *ice_dev)
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{
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return 0;
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}
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static inline int qcom_ice_setup_ice_hw(const char *storage_type, int enable)
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{
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return 0;
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}
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static inline void qcom_ice_set_fde_flag(int flag) {}
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static inline struct list_head *get_ice_dev_list(void)
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{
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return NULL;
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}
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#endif
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struct qcom_ice_variant_ops {
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const char *name;
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int (*init)(struct platform_device *device_init, void *init_data,
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ice_error_cb err);
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int (*reset)(struct platform_device *device_reset);
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int (*resume)(struct platform_device *device_resume);
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int (*suspend)(struct platform_device *device_suspend);
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int (*config_start)(struct platform_device *device_start,
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struct request *req, struct ice_data_setting *setting,
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bool start);
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int (*config_end)(struct platform_device *pdev,
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struct request *req);
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int (*status)(struct platform_device *device_status);
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void (*debug)(struct platform_device *device_debug);
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};
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#endif /* _QCOM_INLINE_CRYPTO_ENGINE_H_ */
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79
include/linux/pfk.h
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79
include/linux/pfk.h
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@ -0,0 +1,79 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.
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*/
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#ifndef PFK_H_
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#define PFK_H_
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#include <linux/bio.h>
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#include <crypto/ice.h>
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struct ice_crypto_setting;
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#ifdef CONFIG_PFK
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/*
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* Default key for inline encryption.
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*
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* For now only AES-256-XTS is supported, so this is a fixed length. But if
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* ever needed, this should be made variable-length with a 'mode' and 'size'.
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* (Remember to update pfk_allow_merge_bio() when doing so!)
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*/
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#define BLK_ENCRYPTION_KEY_SIZE_AES_256_XTS 64
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struct blk_encryption_key {
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u8 raw[BLK_ENCRYPTION_KEY_SIZE_AES_256_XTS];
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};
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int pfk_load_key_start(const struct bio *bio, struct ice_device *ice_dev,
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struct ice_crypto_setting *ice_setting,
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bool *is_pfe, bool async);
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int pfk_load_key_end(const struct bio *bio, struct ice_device *ice_dev,
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bool *is_pfe);
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int pfk_fbe_clear_key(const unsigned char *key, size_t key_size,
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const unsigned char *salt, size_t salt_size);
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bool pfk_allow_merge_bio(const struct bio *bio1, const struct bio *bio2);
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void pfk_clear_on_reset(struct ice_device *ice_dev);
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int pfk_initialize_key_table(struct ice_device *ice_dev);
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int pfk_remove(struct ice_device *ice_dev);
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#else
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static inline int pfk_load_key_start(const struct bio *bio,
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struct ice_crypto_setting *ice_setting, bool *is_pfe, bool async)
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{
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return -ENODEV;
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}
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static inline int pfk_load_key_end(const struct bio *bio, bool *is_pfe)
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{
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return -ENODEV;
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}
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static inline bool pfk_allow_merge_bio(const struct bio *bio1,
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const struct bio *bio2)
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{
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return true;
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}
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static inline int pfk_fbe_clear_key(const unsigned char *key, size_t key_size,
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const unsigned char *salt, size_t salt_size)
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{
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return -ENODEV;
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}
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static inline void pfk_clear_on_reset(void)
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{}
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static inline int pfk_initialize_key_table(struct ice_device *ice_dev)
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{
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return -ENODEV;
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}
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static inline int pfk_remove(struct ice_device *ice_dev)
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{
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return -ENODEV;
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}
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#endif /* CONFIG_PFK */
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#endif /* PFK_H */
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