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This is the 5.4.153 stable release

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-----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEZH8oZUiU471FcZm+ONu9yGCSaT4FAmFmlC8ACgkQONu9yGCS
 aT545xAA0AR7TypYDpuNjsftOROnk3mlaH6g8X8SeLSkrT36/cP7fn/zKR6aESxo
 GM/HYjy/ph5Oyhqytegl+h1uulmTgpyGTVzOLwHSP8G/YRtj0z8yTg7cDLnSIOMo
 4QUxvdx7lGDu/gEKi8Ny0pwgmCBsqcSco1miLzeMa395aIeqqd7d5rcfs1xkPa5O
 18yFcu2+d5KWQyhMDdOKmhNNbuHZTIoeavsjaKGx5COG4kdArLWe1j12nLQ4hUzp
 MK+o3PNFWW7iOQFKhjruHvfzxOBNAH3rUedxbqb+DJ/7VqgcsiXhbjTOQP3OwK4I
 TJkJfPziwcBc0hkoZrUpBRdXkZJ84rrQr1pi3yv/VEXYbEjlZ4+JqZfvswlYmN1X
 itQsrI51Mjgw5Y6+zw52EvGKo0BFe6OrLd1upv7Cf+BsV6XW7PDBnHk+lQlNOEQ1
 sGptNAYcWQYxSFqvrT7Cs5yQ9gWvdZt6fkj9K9oHX5qwA9XIqFampVN45bmd5/6x
 Znu0DLvhgQ/aFQev5/4dn9BRF7i+fPzYmtmljBnTLkEC1SFsykNrAYSQdKvO5Tkc
 PYAl0IYs+LoCMbG9Ws7wlf4UaEZnrHd3q5qdxjeHlnahjTxIx4Z3LPiS/uK0i9ea
 NpR1ielMA+vbU6LswuF15h/bs1SgPvs7NIqcCVEFOSbY2dBdDNM=
 =tN5h
 -----END PGP SIGNATURE-----

Merge 5.4.153 into android11-5.4-lts

Changes in 5.4.153
	Partially revert "usb: Kconfig: using select for USB_COMMON dependency"
	USB: cdc-acm: fix racy tty buffer accesses
	USB: cdc-acm: fix break reporting
	usb: typec: tcpm: handle SRC_STARTUP state if cc changes
	xen/privcmd: fix error handling in mmap-resource processing
	mmc: meson-gx: do not use memcpy_to/fromio for dram-access-quirk
	ovl: fix missing negative dentry check in ovl_rename()
	nfsd: fix error handling of register_pernet_subsys() in init_nfsd()
	nfsd4: Handle the NFSv4 READDIR 'dircount' hint being zero
	xen/balloon: fix cancelled balloon action
	ARM: dts: omap3430-sdp: Fix NAND device node
	ARM: dts: qcom: apq8064: use compatible which contains chipid
	MIPS: BPF: Restore MIPS32 cBPF JIT
	bpf, mips: Validate conditional branch offsets
	soc: qcom: socinfo: Fixed argument passed to platform_set_data()
	ARM: dts: qcom: apq8064: Use 27MHz PXO clock as DSI PLL reference
	soc: qcom: mdt_loader: Drop PT_LOAD check on hash segment
	ARM: dts: imx: Add missing pinctrl-names for panel on M53Menlo
	ARM: dts: imx: Fix USB host power regulator polarity on M53Menlo
	arm64: dts: qcom: pm8150: use qcom,pm8998-pon binding
	xtensa: move XCHAL_KIO_* definitions to kmem_layout.h
	xtensa: use CONFIG_USE_OF instead of CONFIG_OF
	xtensa: call irqchip_init only when CONFIG_USE_OF is selected
	bpf, arm: Fix register clobbering in div/mod implementation
	bpf: Fix integer overflow in prealloc_elems_and_freelist()
	phy: mdio: fix memory leak
	net_sched: fix NULL deref in fifo_set_limit()
	powerpc/fsl/dts: Fix phy-connection-type for fm1mac3
	ptp_pch: Load module automatically if ID matches
	arm64: dts: freescale: Fix SP805 clock-names
	arm64: dts: ls1028a: add missing CAN nodes
	ARM: imx6: disable the GIC CPU interface before calling stby-poweroff sequence
	net: bridge: use nla_total_size_64bit() in br_get_linkxstats_size()
	net/sched: sch_taprio: properly cancel timer from taprio_destroy()
	net: sfp: Fix typo in state machine debug string
	netlink: annotate data races around nlk->bound
	bus: ti-sysc: Use CLKDM_NOAUTO for dra7 dcan1 for errata i893
	video: fbdev: gbefb: Only instantiate device when built for IP32
	drm/nouveau/debugfs: fix file release memory leak
	gve: Correct available tx qpl check
	rtnetlink: fix if_nlmsg_stats_size() under estimation
	gve: fix gve_get_stats()
	i40e: fix endless loop under rtnl
	i40e: Fix freeing of uninitialized misc IRQ vector
	net: prefer socket bound to interface when not in VRF
	i2c: acpi: fix resource leak in reconfiguration device addition
	bpf, s390: Fix potential memory leak about jit_data
	RISC-V: Include clone3() on rv32
	x86/platform/olpc: Correct ifdef symbol to intended CONFIG_OLPC_XO15_SCI
	x86/hpet: Use another crystalball to evaluate HPET usability
	x86/Kconfig: Correct reference to MWINCHIP3D
	Linux 5.4.153

Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: I9c69f5eb4cd896e6f3f585e983956b5711ea09b6
This commit is contained in:
Greg Kroah-Hartman 2021-10-13 10:58:45 +02:00
commit ffab1c7d7c
58 changed files with 1946 additions and 144 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Makefile
View File

@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 5
PATCHLEVEL = 4
SUBLEVEL = 152
SUBLEVEL = 153
EXTRAVERSION =
NAME = Kleptomaniac Octopus

4
arch/arm/boot/dts/imx53-m53menlo.dts
View File

@ -56,6 +56,7 @@
panel {
compatible = "edt,etm0700g0dh6";
pinctrl-0 = <&pinctrl_display_gpio>;
pinctrl-names = "default";
enable-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
port {
@ -76,8 +77,7 @@
regulator-name = "vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
gpio = <&gpio1 2 0>;
};
};

2
arch/arm/boot/dts/omap3430-sdp.dts
View File

@ -101,7 +101,7 @@
nand@1,0 {
compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
reg = <1 0 4>; /* CS1, offset 0, IO size 4 */
interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */

7
arch/arm/boot/dts/qcom-apq8064.dtsi
View File

@ -198,7 +198,7 @@
clock-frequency = <19200000>;
};
pxo_board {
pxo_board: pxo_board {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
@ -1147,7 +1147,7 @@
};
gpu: adreno-3xx@4300000 {
compatible = "qcom,adreno-3xx";
compatible = "qcom,adreno-320.2", "qcom,adreno";
reg = <0x04300000 0x20000>;
reg-names = "kgsl_3d0_reg_memory";
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
@ -1162,7 +1162,6 @@
<&mmcc GFX3D_AHB_CLK>,
<&mmcc GFX3D_AXI_CLK>,
<&mmcc MMSS_IMEM_AHB_CLK>;
qcom,chipid = <0x03020002>;
iommus = <&gfx3d 0
&gfx3d 1
@ -1305,7 +1304,7 @@
reg-names = "dsi_pll", "dsi_phy", "dsi_phy_regulator";
clock-names = "iface_clk", "ref";
clocks = <&mmcc DSI_M_AHB_CLK>,
<&cxo_board>;
<&pxo_board>;
};

2
arch/arm/mach-imx/pm-imx6.c
View File

@ -9,6 +9,7 @@
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/genalloc.h>
#include <linux/irqchip/arm-gic.h>
#include <linux/mfd/syscon.h>
#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
#include <linux/of.h>
@ -618,6 +619,7 @@ static void __init imx6_pm_common_init(const struct imx6_pm_socdata
static void imx6_pm_stby_poweroff(void)
{
gic_cpu_if_down(0);
imx6_set_lpm(STOP_POWER_OFF);
imx6q_suspend_finish(0);

2
arch/arm/mach-omap2/omap_hwmod.c
View File

@ -3656,6 +3656,8 @@ int omap_hwmod_init_module(struct device *dev,
oh->flags |= HWMOD_SWSUP_SIDLE_ACT;
if (data->cfg->quirks & SYSC_QUIRK_SWSUP_MSTANDBY)
oh->flags |= HWMOD_SWSUP_MSTANDBY;
if (data->cfg->quirks & SYSC_QUIRK_CLKDM_NOAUTO)
oh->flags |= HWMOD_CLKDM_NOAUTO;
error = omap_hwmod_check_module(dev, oh, data, sysc_fields,
rev_offs, sysc_offs, syss_offs,

19
arch/arm/net/bpf_jit_32.c
View File

@ -36,6 +36,10 @@
* +-----+
* |RSVD | JIT scratchpad
* current ARM_SP => +-----+ <= (BPF_FP - STACK_SIZE + SCRATCH_SIZE)
* | ... | caller-saved registers
* +-----+
* | ... | arguments passed on stack
* ARM_SP during call => +-----|
* | |
* | ... | Function call stack
* | |
@ -63,6 +67,12 @@
*
* When popping registers off the stack at the end of a BPF function, we
* reference them via the current ARM_FP register.
*
* Some eBPF operations are implemented via a call to a helper function.
* Such calls are "invisible" in the eBPF code, so it is up to the calling
* program to preserve any caller-saved ARM registers during the call. The
* JIT emits code to push and pop those registers onto the stack, immediately
* above the callee stack frame.
*/
#define CALLEE_MASK (1 << ARM_R4 | 1 << ARM_R5 | 1 << ARM_R6 | \
1 << ARM_R7 | 1 << ARM_R8 | 1 << ARM_R9 | \
@ -70,6 +80,8 @@
#define CALLEE_PUSH_MASK (CALLEE_MASK | 1 << ARM_LR)
#define CALLEE_POP_MASK (CALLEE_MASK | 1 << ARM_PC)
#define CALLER_MASK (1 << ARM_R0 | 1 << ARM_R1 | 1 << ARM_R2 | 1 << ARM_R3)
enum {
/* Stack layout - these are offsets from (top of stack - 4) */
BPF_R2_HI,
@ -464,6 +476,7 @@ static inline int epilogue_offset(const struct jit_ctx *ctx)
static inline void emit_udivmod(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx, u8 op)
{
const int exclude_mask = BIT(ARM_R0) | BIT(ARM_R1);
const s8 *tmp = bpf2a32[TMP_REG_1];
#if __LINUX_ARM_ARCH__ == 7
@ -495,11 +508,17 @@ static inline void emit_udivmod(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx, u8 op)
emit(ARM_MOV_R(ARM_R0, rm), ctx);
}
/* Push caller-saved registers on stack */
emit(ARM_PUSH(CALLER_MASK & ~exclude_mask), ctx);
/* Call appropriate function */
emit_mov_i(ARM_IP, op == BPF_DIV ?
(u32)jit_udiv32 : (u32)jit_mod32, ctx);
emit_blx_r(ARM_IP, ctx);
/* Restore caller-saved registers from stack */
emit(ARM_POP(CALLER_MASK & ~exclude_mask), ctx);
/* Save return value */
if (rd != ARM_R0)
emit(ARM_MOV_R(rd, ARM_R0), ctx);

22
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
View File

@ -287,6 +287,24 @@
status = "disabled";
};
can0: can@2180000 {
compatible = "fsl,ls1028ar1-flexcan", "fsl,lx2160ar1-flexcan";
reg = <0x0 0x2180000 0x0 0x10000>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sysclk>, <&clockgen 4 1>;
clock-names = "ipg", "per";
status = "disabled";
};
can1: can@2190000 {
compatible = "fsl,ls1028ar1-flexcan", "fsl,lx2160ar1-flexcan";
reg = <0x0 0x2190000 0x0 0x10000>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sysclk>, <&clockgen 4 1>;
clock-names = "ipg", "per";
status = "disabled";
};
duart0: serial@21c0500 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x00 0x21c0500 0x0 0x100>;
@ -496,14 +514,14 @@
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc000000 0x0 0x1000>;
clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "apb_pclk", "wdog_clk";
clock-names = "wdog_clk", "apb_pclk";
};
cluster1_core1_watchdog: watchdog@c010000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc010000 0x0 0x1000>;
clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "apb_pclk", "wdog_clk";
clock-names = "wdog_clk", "apb_pclk";
};
sai1: audio-controller@f100000 {

16
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
View File

@ -640,56 +640,56 @@
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc000000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
clock-names = "wdog_clk", "apb_pclk";
};
cluster1_core1_watchdog: wdt@c010000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc010000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
clock-names = "wdog_clk", "apb_pclk";
};
cluster1_core2_watchdog: wdt@c020000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc020000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
clock-names = "wdog_clk", "apb_pclk";
};
cluster1_core3_watchdog: wdt@c030000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc030000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
clock-names = "wdog_clk", "apb_pclk";
};
cluster2_core0_watchdog: wdt@c100000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc100000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
clock-names = "wdog_clk", "apb_pclk";
};
cluster2_core1_watchdog: wdt@c110000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc110000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
clock-names = "wdog_clk", "apb_pclk";
};
cluster2_core2_watchdog: wdt@c120000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc120000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
clock-names = "wdog_clk", "apb_pclk";
};
cluster2_core3_watchdog: wdt@c130000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc130000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
clock-names = "wdog_clk", "apb_pclk";
};
fsl_mc: fsl-mc@80c000000 {

16
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
View File

@ -230,56 +230,56 @@
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc000000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
clock-names = "wdog_clk", "apb_pclk";
};
cluster1_core1_watchdog: wdt@c010000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc010000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
clock-names = "wdog_clk", "apb_pclk";
};
cluster2_core0_watchdog: wdt@c100000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc100000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
clock-names = "wdog_clk", "apb_pclk";
};
cluster2_core1_watchdog: wdt@c110000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc110000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
clock-names = "wdog_clk", "apb_pclk";
};
cluster3_core0_watchdog: wdt@c200000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc200000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
clock-names = "wdog_clk", "apb_pclk";
};
cluster3_core1_watchdog: wdt@c210000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc210000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
clock-names = "wdog_clk", "apb_pclk";
};
cluster4_core0_watchdog: wdt@c300000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc300000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
clock-names = "wdog_clk", "apb_pclk";
};
cluster4_core1_watchdog: wdt@c310000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc310000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
clock-names = "wdog_clk", "apb_pclk";
};
crypto: crypto@8000000 {

2
arch/arm64/boot/dts/qcom/pm8150.dtsi
View File

@ -17,7 +17,7 @@
#size-cells = <0>;
pon: power-on@800 {
compatible = "qcom,pm8916-pon";
compatible = "qcom,pm8998-pon";
reg = <0x0800>;
pwrkey {
compatible = "qcom,pm8941-pwrkey";

1
arch/mips/Kconfig
View File

@ -46,6 +46,7 @@ config MIPS
select HAVE_ARCH_TRACEHOOK
select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
select HAVE_ASM_MODVERSIONS
select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
select HAVE_CONTEXT_TRACKING
select HAVE_COPY_THREAD_TLS

1
arch/mips/net/Makefile
View File

@ -1,4 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only
# MIPS networking code
obj-$(CONFIG_MIPS_CBPF_JIT) += bpf_jit.o bpf_jit_asm.o
obj-$(CONFIG_MIPS_EBPF_JIT) += ebpf_jit.o

1299
arch/mips/net/bpf_jit.c Normal file
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File diff suppressed because it is too large Load Diff

285
arch/mips/net/bpf_jit_asm.S Normal file
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@ -0,0 +1,285 @@
/*
* bpf_jib_asm.S: Packet/header access helper functions for MIPS/MIPS64 BPF
* compiler.
*
* Copyright (C) 2015 Imagination Technologies Ltd.
* Author: Markos Chandras <markos.chandras@imgtec.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; version 2 of the License.
*/
#include <asm/asm.h>
#include <asm/isa-rev.h>
#include <asm/regdef.h>
#include "bpf_jit.h"
/* ABI
*
* r_skb_hl skb header length
* r_skb_data skb data
* r_off(a1) offset register
* r_A BPF register A
* r_X PF register X
* r_skb(a0) *skb
* r_M *scratch memory
* r_skb_le skb length
* r_s0 Scratch register 0
* r_s1 Scratch register 1
*
* On entry:
* a0: *skb
* a1: offset (imm or imm + X)
*
* All non-BPF-ABI registers are free for use. On return, we only
* care about r_ret. The BPF-ABI registers are assumed to remain
* unmodified during the entire filter operation.
*/
#define skb a0
#define offset a1
#define SKF_LL_OFF (-0x200000) /* Can't include linux/filter.h in assembly */
/* We know better :) so prevent assembler reordering etc */
.set noreorder
#define is_offset_negative(TYPE) \
/* If offset is negative we have more work to do */ \
slti t0, offset, 0; \
bgtz t0, bpf_slow_path_##TYPE##_neg; \
/* Be careful what follows in DS. */
#define is_offset_in_header(SIZE, TYPE) \
/* Reading from header? */ \
addiu $r_s0, $r_skb_hl, -SIZE; \
slt t0, $r_s0, offset; \
bgtz t0, bpf_slow_path_##TYPE; \
LEAF(sk_load_word)
is_offset_negative(word)
FEXPORT(sk_load_word_positive)
is_offset_in_header(4, word)
/* Offset within header boundaries */
PTR_ADDU t1, $r_skb_data, offset
.set reorder
lw $r_A, 0(t1)
.set noreorder
#ifdef CONFIG_CPU_LITTLE_ENDIAN
# if MIPS_ISA_REV >= 2
wsbh t0, $r_A
rotr $r_A, t0, 16
# else
sll t0, $r_A, 24
srl t1, $r_A, 24
srl t2, $r_A, 8
or t0, t0, t1
andi t2, t2, 0xff00
andi t1, $r_A, 0xff00
or t0, t0, t2
sll t1, t1, 8
or $r_A, t0, t1
# endif
#endif
jr $r_ra
move $r_ret, zero
END(sk_load_word)
LEAF(sk_load_half)
is_offset_negative(half)
FEXPORT(sk_load_half_positive)
is_offset_in_header(2, half)
/* Offset within header boundaries */
PTR_ADDU t1, $r_skb_data, offset
lhu $r_A, 0(t1)
#ifdef CONFIG_CPU_LITTLE_ENDIAN
# if MIPS_ISA_REV >= 2
wsbh $r_A, $r_A
# else
sll t0, $r_A, 8
srl t1, $r_A, 8
andi t0, t0, 0xff00
or $r_A, t0, t1
# endif
#endif
jr $r_ra
move $r_ret, zero
END(sk_load_half)
LEAF(sk_load_byte)
is_offset_negative(byte)
FEXPORT(sk_load_byte_positive)
is_offset_in_header(1, byte)
/* Offset within header boundaries */
PTR_ADDU t1, $r_skb_data, offset
lbu $r_A, 0(t1)
jr $r_ra
move $r_ret, zero
END(sk_load_byte)
/*
* call skb_copy_bits:
* (prototype in linux/skbuff.h)
*
* int skb_copy_bits(sk_buff *skb, int offset, void *to, int len)
*
* o32 mandates we leave 4 spaces for argument registers in case
* the callee needs to use them. Even though we don't care about
* the argument registers ourselves, we need to allocate that space
* to remain ABI compliant since the callee may want to use that space.
* We also allocate 2 more spaces for $r_ra and our return register (*to).
*
* n64 is a bit different. The *caller* will allocate the space to preserve
* the arguments. So in 64-bit kernels, we allocate the 4-arg space for no
* good reason but it does not matter that much really.
*
* (void *to) is returned in r_s0
*
*/
#ifdef CONFIG_CPU_LITTLE_ENDIAN
#define DS_OFFSET(SIZE) (4 * SZREG)
#else
#define DS_OFFSET(SIZE) ((4 * SZREG) + (4 - SIZE))
#endif
#define bpf_slow_path_common(SIZE) \
/* Quick check. Are we within reasonable boundaries? */ \
LONG_ADDIU $r_s1, $r_skb_len, -SIZE; \
sltu $r_s0, offset, $r_s1; \
beqz $r_s0, fault; \
/* Load 4th argument in DS */ \
LONG_ADDIU a3, zero, SIZE; \
PTR_ADDIU $r_sp, $r_sp, -(6 * SZREG); \
PTR_LA t0, skb_copy_bits; \
PTR_S $r_ra, (5 * SZREG)($r_sp); \
/* Assign low slot to a2 */ \
PTR_ADDIU a2, $r_sp, DS_OFFSET(SIZE); \
jalr t0; \
/* Reset our destination slot (DS but it's ok) */ \
INT_S zero, (4 * SZREG)($r_sp); \
/* \
* skb_copy_bits returns 0 on success and -EFAULT \
* on error. Our data live in a2. Do not bother with \
* our data if an error has been returned. \
*/ \
/* Restore our frame */ \
PTR_L $r_ra, (5 * SZREG)($r_sp); \
INT_L $r_s0, (4 * SZREG)($r_sp); \
bltz v0, fault; \
PTR_ADDIU $r_sp, $r_sp, 6 * SZREG; \
move $r_ret, zero; \
NESTED(bpf_slow_path_word, (6 * SZREG), $r_sp)
bpf_slow_path_common(4)
#ifdef CONFIG_CPU_LITTLE_ENDIAN
# if MIPS_ISA_REV >= 2
wsbh t0, $r_s0
jr $r_ra
rotr $r_A, t0, 16
# else
sll t0, $r_s0, 24
srl t1, $r_s0, 24
srl t2, $r_s0, 8
or t0, t0, t1
andi t2, t2, 0xff00
andi t1, $r_s0, 0xff00
or t0, t0, t2
sll t1, t1, 8
jr $r_ra
or $r_A, t0, t1
# endif
#else
jr $r_ra
move $r_A, $r_s0
#endif
END(bpf_slow_path_word)
NESTED(bpf_slow_path_half, (6 * SZREG), $r_sp)
bpf_slow_path_common(2)
#ifdef CONFIG_CPU_LITTLE_ENDIAN
# if MIPS_ISA_REV >= 2
jr $r_ra
wsbh $r_A, $r_s0
# else
sll t0, $r_s0, 8
andi t1, $r_s0, 0xff00
andi t0, t0, 0xff00
srl t1, t1, 8
jr $r_ra
or $r_A, t0, t1
# endif
#else
jr $r_ra
move $r_A, $r_s0
#endif
END(bpf_slow_path_half)
NESTED(bpf_slow_path_byte, (6 * SZREG), $r_sp)
bpf_slow_path_common(1)
jr $r_ra
move $r_A, $r_s0
END(bpf_slow_path_byte)
/*
* Negative entry points
*/
.macro bpf_is_end_of_data
li t0, SKF_LL_OFF
/* Reading link layer data? */
slt t1, offset, t0
bgtz t1, fault
/* Be careful what follows in DS. */
.endm
/*
* call skb_copy_bits:
* (prototype in linux/filter.h)
*
* void *bpf_internal_load_pointer_neg_helper(const struct sk_buff *skb,
* int k, unsigned int size)
*
* see above (bpf_slow_path_common) for ABI restrictions
*/
#define bpf_negative_common(SIZE) \
PTR_ADDIU $r_sp, $r_sp, -(6 * SZREG); \
PTR_LA t0, bpf_internal_load_pointer_neg_helper; \
PTR_S $r_ra, (5 * SZREG)($r_sp); \
jalr t0; \
li a2, SIZE; \
PTR_L $r_ra, (5 * SZREG)($r_sp); \
/* Check return pointer */ \
beqz v0, fault; \
PTR_ADDIU $r_sp, $r_sp, 6 * SZREG; \
/* Preserve our pointer */ \
move $r_s0, v0; \
/* Set return value */ \
move $r_ret, zero; \
bpf_slow_path_word_neg:
bpf_is_end_of_data
NESTED(sk_load_word_negative, (6 * SZREG), $r_sp)
bpf_negative_common(4)
jr $r_ra
lw $r_A, 0($r_s0)
END(sk_load_word_negative)
bpf_slow_path_half_neg:
bpf_is_end_of_data
NESTED(sk_load_half_negative, (6 * SZREG), $r_sp)
bpf_negative_common(2)
jr $r_ra
lhu $r_A, 0($r_s0)
END(sk_load_half_negative)
bpf_slow_path_byte_neg:
bpf_is_end_of_data
NESTED(sk_load_byte_negative, (6 * SZREG), $r_sp)
bpf_negative_common(1)
jr $r_ra
lbu $r_A, 0($r_s0)
END(sk_load_byte_negative)
fault:
jr $r_ra
addiu $r_ret, zero, 1

2
arch/powerpc/boot/dts/fsl/t1023rdb.dts
View File

@ -154,7 +154,7 @@
fm1mac3: ethernet@e4000 {
phy-handle = <&sgmii_aqr_phy3>;
phy-connection-type = "sgmii-2500";
phy-connection-type = "2500base-x";
sleep = <&rcpm 0x20000000>;
};

3
arch/riscv/include/uapi/asm/unistd.h
View File

@ -18,9 +18,10 @@
#ifdef __LP64__
#define __ARCH_WANT_NEW_STAT
#define __ARCH_WANT_SET_GET_RLIMIT
#define __ARCH_WANT_SYS_CLONE3
#endif /* __LP64__ */
#define __ARCH_WANT_SYS_CLONE3
#include <asm-generic/unistd.h>
/*

2
arch/s390/net/bpf_jit_comp.c
View File

@ -1385,7 +1385,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *fp)
jit.addrs = kvcalloc(fp->len + 1, sizeof(*jit.addrs), GFP_KERNEL);
if (jit.addrs == NULL) {
fp = orig_fp;
goto out;
goto free_addrs;
}
/*
* Three initial passes:

2
arch/x86/Kconfig
View File

@ -1427,7 +1427,7 @@ config HIGHMEM4G
config HIGHMEM64G
bool "64GB"
depends on !M486 && !M586 && !M586TSC && !M586MMX && !MGEODE_LX && !MGEODEGX1 && !MCYRIXIII && !MELAN && !MWINCHIPC6 && !WINCHIP3D && !MK6
depends on !M486 && !M586 && !M586TSC && !M586MMX && !MGEODE_LX && !MGEODEGX1 && !MCYRIXIII && !MELAN && !MWINCHIPC6 && !MWINCHIP3D && !MK6
select X86_PAE
---help---
Select this if you have a 32-bit processor and more than 4

6
arch/x86/kernel/early-quirks.c
View File

@ -710,12 +710,6 @@ static struct chipset early_qrk[] __initdata = {
*/
{ PCI_VENDOR_ID_INTEL, 0x0f00,
PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
{ PCI_VENDOR_ID_INTEL, 0x3e20,
PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
{ PCI_VENDOR_ID_INTEL, 0x3ec4,
PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
{ PCI_VENDOR_ID_INTEL, 0x8a12,
PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
{ PCI_VENDOR_ID_BROADCOM, 0x4331,
PCI_CLASS_NETWORK_OTHER, PCI_ANY_ID, 0, apple_airport_reset},
{}

81
arch/x86/kernel/hpet.c
View File

@ -9,6 +9,7 @@
#include <asm/hpet.h>
#include <asm/time.h>
#include <asm/mwait.h>
#undef pr_fmt
#define pr_fmt(fmt) "hpet: " fmt
@ -806,6 +807,83 @@ static bool __init hpet_counting(void)
return false;
}
static bool __init mwait_pc10_supported(void)
{
unsigned int eax, ebx, ecx, mwait_substates;
if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
return false;
if (!cpu_feature_enabled(X86_FEATURE_MWAIT))
return false;
if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF)
return false;
cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates);
return (ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) &&
(ecx & CPUID5_ECX_INTERRUPT_BREAK) &&
(mwait_substates & (0xF << 28));
}
/*
* Check whether the system supports PC10. If so force disable HPET as that
* stops counting in PC10. This check is overbroad as it does not take any
* of the following into account:
*
* - ACPI tables
* - Enablement of intel_idle
* - Command line arguments which limit intel_idle C-state support
*
* That's perfectly fine. HPET is a piece of hardware designed by committee
* and the only reasons why it is still in use on modern systems is the
* fact that it is impossible to reliably query TSC and CPU frequency via
* CPUID or firmware.
*
* If HPET is functional it is useful for calibrating TSC, but this can be
* done via PMTIMER as well which seems to be the last remaining timer on
* X86/INTEL platforms that has not been completely wreckaged by feature
* creep.
*
* In theory HPET support should be removed altogether, but there are older
* systems out there which depend on it because TSC and APIC timer are
* dysfunctional in deeper C-states.
*
* It's only 20 years now that hardware people have been asked to provide
* reliable and discoverable facilities which can be used for timekeeping
* and per CPU timer interrupts.
*
* The probability that this problem is going to be solved in the
* forseeable future is close to zero, so the kernel has to be cluttered
* with heuristics to keep up with the ever growing amount of hardware and
* firmware trainwrecks. Hopefully some day hardware people will understand
* that the approach of "This can be fixed in software" is not sustainable.
* Hope dies last...
*/
static bool __init hpet_is_pc10_damaged(void)
{
unsigned long long pcfg;
/* Check whether PC10 substates are supported */
if (!mwait_pc10_supported())
return false;
/* Check whether PC10 is enabled in PKG C-state limit */
rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, pcfg);
if ((pcfg & 0xF) < 8)
return false;
if (hpet_force_user) {
pr_warn("HPET force enabled via command line, but dysfunctional in PC10.\n");
return false;
}
pr_info("HPET dysfunctional in PC10. Force disabled.\n");
boot_hpet_disable = true;
return true;
}
/**
* hpet_enable - Try to setup the HPET timer. Returns 1 on success.
*/
@ -819,6 +897,9 @@ int __init hpet_enable(void)
if (!is_hpet_capable())
return 0;
if (hpet_is_pc10_damaged())
return 0;
hpet_set_mapping();
if (!hpet_virt_address)
return 0;

2
arch/x86/platform/olpc/olpc.c
View File

@ -274,7 +274,7 @@ static struct olpc_ec_driver ec_xo1_driver = {
static struct olpc_ec_driver ec_xo1_5_driver = {
.ec_cmd = olpc_xo1_ec_cmd,
#ifdef CONFIG_OLPC_XO1_5_SCI
#ifdef CONFIG_OLPC_XO15_SCI
/*
* XO-1.5 EC wakeups are available when olpc-xo15-sci driver is
* compiled in

29
arch/xtensa/include/asm/kmem_layout.h
View File

@ -11,6 +11,7 @@
#ifndef _XTENSA_KMEM_LAYOUT_H
#define _XTENSA_KMEM_LAYOUT_H
#include <asm/core.h>
#include <asm/types.h>
#ifdef CONFIG_MMU
@ -65,6 +66,34 @@
#endif
/* KIO definition */
#if XCHAL_HAVE_PTP_MMU
#define XCHAL_KIO_CACHED_VADDR 0xe0000000
#define XCHAL_KIO_BYPASS_VADDR 0xf0000000
#define XCHAL_KIO_DEFAULT_PADDR 0xf0000000
#else
#define XCHAL_KIO_BYPASS_VADDR XCHAL_KIO_PADDR
#define XCHAL_KIO_DEFAULT_PADDR 0x90000000
#endif
#define XCHAL_KIO_SIZE 0x10000000
#if (!XCHAL_HAVE_PTP_MMU || XCHAL_HAVE_SPANNING_WAY) && defined(CONFIG_USE_OF)
#define XCHAL_KIO_PADDR xtensa_get_kio_paddr()
#ifndef __ASSEMBLY__
extern unsigned long xtensa_kio_paddr;
static inline unsigned long xtensa_get_kio_paddr(void)
{
return xtensa_kio_paddr;
}
#endif
#else
#define XCHAL_KIO_PADDR XCHAL_KIO_DEFAULT_PADDR
#endif
/* KERNEL_STACK definition */
#ifndef CONFIG_KASAN
#define KERNEL_STACK_SHIFT 13
#else

42
arch/xtensa/include/asm/vectors.h
View File

@ -21,50 +21,14 @@
#include <asm/core.h>
#include <asm/kmem_layout.h>
#if XCHAL_HAVE_PTP_MMU
#define XCHAL_KIO_CACHED_VADDR 0xe0000000
#define XCHAL_KIO_BYPASS_VADDR 0xf0000000
#define XCHAL_KIO_DEFAULT_PADDR 0xf0000000
#else
#define XCHAL_KIO_BYPASS_VADDR XCHAL_KIO_PADDR
#define XCHAL_KIO_DEFAULT_PADDR 0x90000000
#endif
#define XCHAL_KIO_SIZE 0x10000000
#if (!XCHAL_HAVE_PTP_MMU || XCHAL_HAVE_SPANNING_WAY) && defined(CONFIG_OF)
#define XCHAL_KIO_PADDR xtensa_get_kio_paddr()
#ifndef __ASSEMBLY__
extern unsigned long xtensa_kio_paddr;
static inline unsigned long xtensa_get_kio_paddr(void)
{
return xtensa_kio_paddr;
}
#endif
#else
#define XCHAL_KIO_PADDR XCHAL_KIO_DEFAULT_PADDR
#endif
#if defined(CONFIG_MMU)
#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY
/* Image Virtual Start Address */
#define KERNELOFFSET (XCHAL_KSEG_CACHED_VADDR + \
CONFIG_KERNEL_LOAD_ADDRESS - \
#if defined(CONFIG_MMU) && XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY
#define KERNELOFFSET (CONFIG_KERNEL_LOAD_ADDRESS + \
XCHAL_KSEG_CACHED_VADDR - \
XCHAL_KSEG_PADDR)
#else
#define KERNELOFFSET CONFIG_KERNEL_LOAD_ADDRESS
#endif
#else /* !defined(CONFIG_MMU) */
/* MMU Not being used - Virtual == Physical */
/* Location of the start of the kernel text, _start */
#define KERNELOFFSET CONFIG_KERNEL_LOAD_ADDRESS
#endif /* CONFIG_MMU */
#define RESET_VECTOR1_VADDR (XCHAL_RESET_VECTOR1_VADDR)
#ifdef CONFIG_VECTORS_OFFSET
#define VECBASE_VADDR (KERNELOFFSET - CONFIG_VECTORS_OFFSET)

2
arch/xtensa/kernel/irq.c
View File

@ -145,7 +145,7 @@ unsigned xtensa_get_ext_irq_no(unsigned irq)
void __init init_IRQ(void)
{
#ifdef CONFIG_OF
#ifdef CONFIG_USE_OF
irqchip_init();
#else
#ifdef CONFIG_HAVE_SMP

12
arch/xtensa/kernel/setup.c
View File

@ -64,7 +64,7 @@ extern unsigned long initrd_end;
extern int initrd_below_start_ok;
#endif
#ifdef CONFIG_OF
#ifdef CONFIG_USE_OF
void *dtb_start = __dtb_start;
#endif
@ -126,7 +126,7 @@ __tagtable(BP_TAG_INITRD, parse_tag_initrd);
#endif /* CONFIG_BLK_DEV_INITRD */
#ifdef CONFIG_OF
#ifdef CONFIG_USE_OF
static int __init parse_tag_fdt(const bp_tag_t *tag)
{
@ -136,7 +136,7 @@ static int __init parse_tag_fdt(const bp_tag_t *tag)
__tagtable(BP_TAG_FDT, parse_tag_fdt);
#endif /* CONFIG_OF */
#endif /* CONFIG_USE_OF */
static int __init parse_tag_cmdline(const bp_tag_t* tag)
{
@ -184,7 +184,7 @@ static int __init parse_bootparam(const bp_tag_t *tag)
}
#endif
#ifdef CONFIG_OF
#ifdef CONFIG_USE_OF
#if !XCHAL_HAVE_PTP_MMU || XCHAL_HAVE_SPANNING_WAY
unsigned long xtensa_kio_paddr = XCHAL_KIO_DEFAULT_PADDR;
@ -233,7 +233,7 @@ void __init early_init_devtree(void *params)
strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
}
#endif /* CONFIG_OF */
#endif /* CONFIG_USE_OF */
/*
* Initialize architecture. (Early stage)
@ -254,7 +254,7 @@ void __init init_arch(bp_tag_t *bp_start)
if (bp_start)
parse_bootparam(bp_start);
#ifdef CONFIG_OF
#ifdef CONFIG_USE_OF
early_init_devtree(dtb_start);
#endif

2
arch/xtensa/mm/mmu.c
View File

@ -101,7 +101,7 @@ void init_mmu(void)
void init_kio(void)
{
#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && defined(CONFIG_OF)
#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && defined(CONFIG_USE_OF)
/*
* Update the IO area mapping in case xtensa_kio_paddr has changed
*/

3
drivers/bus/ti-sysc.c
View File

@ -1388,6 +1388,9 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
/* Quirks that need to be set based on detected module */
SYSC_QUIRK("aess", 0, 0, 0x10, -ENODEV, 0x40000000, 0xffffffff,
SYSC_MODULE_QUIRK_AESS),
/* Errata i893 handling for dra7 dcan1 and 2 */
SYSC_QUIRK("dcan", 0x4ae3c000, 0x20, -ENODEV, -ENODEV, 0xa3170504, 0xffffffff,
SYSC_QUIRK_CLKDM_NOAUTO),
SYSC_QUIRK("dcan", 0x48480000, 0x20, -ENODEV, -ENODEV, 0xa3170504, 0xffffffff,
SYSC_QUIRK_CLKDM_NOAUTO),
SYSC_QUIRK("dss", 0x4832a000, 0, 0x10, 0x14, 0x00000020, 0xffffffff,

1
drivers/gpu/drm/nouveau/nouveau_debugfs.c
View File

@ -207,6 +207,7 @@ static const struct file_operations nouveau_pstate_fops = {
.open = nouveau_debugfs_pstate_open,
.read = seq_read,
.write = nouveau_debugfs_pstate_set,
.release = single_release,
};
static struct drm_info_list nouveau_debugfs_list[] = {

1
drivers/i2c/i2c-core-acpi.c
View File

@ -436,6 +436,7 @@ static int i2c_acpi_notify(struct notifier_block *nb, unsigned long value,
break;
i2c_acpi_register_device(adapter, adev, &info);
put_device(&adapter->dev);
break;
case ACPI_RECONFIG_DEVICE_REMOVE:
if (!acpi_device_enumerated(adev))

73
drivers/mmc/host/meson-gx-mmc.c
View File

@ -738,7 +738,7 @@ static void meson_mmc_desc_chain_transfer(struct mmc_host *mmc, u32 cmd_cfg)
writel(start, host->regs + SD_EMMC_START);
}
/* local sg copy to buffer version with _to/fromio usage for dram_access_quirk */
/* local sg copy for dram_access_quirk */
static void meson_mmc_copy_buffer(struct meson_host *host, struct mmc_data *data,
size_t buflen, bool to_buffer)
{
@ -756,21 +756,27 @@ static void meson_mmc_copy_buffer(struct meson_host *host, struct mmc_data *data
sg_miter_start(&miter, sgl, nents, sg_flags);
while ((offset < buflen) && sg_miter_next(&miter)) {
unsigned int len;
unsigned int buf_offset = 0;
unsigned int len, left;
u32 *buf = miter.addr;
len = min(miter.length, buflen - offset);
left = len;
/* When dram_access_quirk, the bounce buffer is a iomem mapping */
if (host->dram_access_quirk) {
if (to_buffer)
memcpy_toio(host->bounce_iomem_buf + offset, miter.addr, len);
else
memcpy_fromio(miter.addr, host->bounce_iomem_buf + offset, len);
if (to_buffer) {
do {
writel(*buf++, host->bounce_iomem_buf + offset + buf_offset);
buf_offset += 4;
left -= 4;
} while (left);
} else {
if (to_buffer)
memcpy(host->bounce_buf + offset, miter.addr, len);
else
memcpy(miter.addr, host->bounce_buf + offset, len);
do {
*buf++ = readl(host->bounce_iomem_buf + offset + buf_offset);
buf_offset += 4;
left -= 4;
} while (left);
}
offset += len;
@ -822,7 +828,11 @@ static void meson_mmc_start_cmd(struct mmc_host *mmc, struct mmc_command *cmd)
if (data->flags & MMC_DATA_WRITE) {
cmd_cfg |= CMD_CFG_DATA_WR;
WARN_ON(xfer_bytes > host->bounce_buf_size);
meson_mmc_copy_buffer(host, data, xfer_bytes, true);
if (host->dram_access_quirk)
meson_mmc_copy_buffer(host, data, xfer_bytes, true);
else
sg_copy_to_buffer(data->sg, data->sg_len,
host->bounce_buf, xfer_bytes);
dma_wmb();
}
@ -841,12 +851,43 @@ static void meson_mmc_start_cmd(struct mmc_host *mmc, struct mmc_command *cmd)
writel(cmd->arg, host->regs + SD_EMMC_CMD_ARG);
}
static int meson_mmc_validate_dram_access(struct mmc_host *mmc, struct mmc_data *data)
{
struct scatterlist *sg;
int i;
/* Reject request if any element offset or size is not 32bit aligned */
for_each_sg(data->sg, sg, data->sg_len, i) {
if (!IS_ALIGNED(sg->offset, sizeof(u32)) ||
!IS_ALIGNED(sg->length, sizeof(u32))) {
dev_err(mmc_dev(mmc), "unaligned sg offset %u len %u\n",
data->sg->offset, data->sg->length);
return -EINVAL;
}
}
return 0;
}
static void meson_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
{
struct meson_host *host = mmc_priv(mmc);
bool needs_pre_post_req = mrq->data &&
!(mrq->data->host_cookie & SD_EMMC_PRE_REQ_DONE);
/*
* The memory at the end of the controller used as bounce buffer for
* the dram_access_quirk only accepts 32bit read/write access,
* check the aligment and length of the data before starting the request.
*/
if (host->dram_access_quirk && mrq->data) {
mrq->cmd->error = meson_mmc_validate_dram_access(mmc, mrq->data);
if (mrq->cmd->error) {
mmc_request_done(mmc, mrq);
return;
}
}
if (needs_pre_post_req) {
meson_mmc_get_transfer_mode(mmc, mrq);
if (!meson_mmc_desc_chain_mode(mrq->data))
@ -991,7 +1032,11 @@ static irqreturn_t meson_mmc_irq_thread(int irq, void *dev_id)
if (meson_mmc_bounce_buf_read(data)) {
xfer_bytes = data->blksz * data->blocks;
WARN_ON(xfer_bytes > host->bounce_buf_size);
meson_mmc_copy_buffer(host, data, xfer_bytes, false);
if (host->dram_access_quirk)
meson_mmc_copy_buffer(host, data, xfer_bytes, false);
else
sg_copy_from_buffer(data->sg, data->sg_len,
host->bounce_buf, xfer_bytes);
}
next_cmd = meson_mmc_get_next_command(cmd);

2
drivers/net/ethernet/google/gve/gve.h
View File

@ -391,7 +391,7 @@ struct gve_queue_page_list *gve_assign_rx_qpl(struct gve_priv *priv)
gve_num_tx_qpls(priv));
/* we are out of rx qpls */
if (id == priv->qpl_cfg.qpl_map_size)
if (id == gve_num_tx_qpls(priv) + gve_num_rx_qpls(priv))
return NULL;
set_bit(id, priv->qpl_cfg.qpl_id_map);

13
drivers/net/ethernet/google/gve/gve_main.c
View File

@ -30,6 +30,7 @@ static void gve_get_stats(struct net_device *dev, struct rtnl_link_stats64 *s)
{
struct gve_priv *priv = netdev_priv(dev);
unsigned int start;
u64 packets, bytes;
int ring;
if (priv->rx) {
@ -37,10 +38,12 @@ static void gve_get_stats(struct net_device *dev, struct rtnl_link_stats64 *s)
do {
start =
u64_stats_fetch_begin(&priv->rx[ring].statss);
s->rx_packets += priv->rx[ring].rpackets;
s->rx_bytes += priv->rx[ring].rbytes;
packets = priv->rx[ring].rpackets;
bytes = priv->rx[ring].rbytes;
} while (u64_stats_fetch_retry(&priv->rx[ring].statss,
start));
s->rx_packets += packets;
s->rx_bytes += bytes;
}
}
if (priv->tx) {
@ -48,10 +51,12 @@ static void gve_get_stats(struct net_device *dev, struct rtnl_link_stats64 *s)
do {
start =
u64_stats_fetch_begin(&priv->tx[ring].statss);
s->tx_packets += priv->tx[ring].pkt_done;
s->tx_bytes += priv->tx[ring].bytes_done;
packets = priv->tx[ring].pkt_done;
bytes = priv->tx[ring].bytes_done;
} while (u64_stats_fetch_retry(&priv->tx[ring].statss,
start));
s->tx_packets += packets;
s->tx_bytes += bytes;
}
}
}

5
drivers/net/ethernet/intel/i40e/i40e_main.c
View File

@ -4817,7 +4817,8 @@ static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
{
int i;
i40e_free_misc_vector(pf);
if (test_bit(__I40E_MISC_IRQ_REQUESTED, pf->state))
i40e_free_misc_vector(pf);
i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
I40E_IWARP_IRQ_PILE_ID);
@ -9616,7 +9617,7 @@ static int i40e_get_capabilities(struct i40e_pf *pf,
if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
/* retry with a larger buffer */
buf_len = data_size;
} else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
} else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK || err) {
dev_info(&pf->pdev->dev,
"capability discovery failed, err %s aq_err %s\n",
i40e_stat_str(&pf->hw, err),

7
drivers/net/phy/mdio_bus.c
View File

@ -385,6 +385,13 @@ int __mdiobus_register(struct mii_bus *bus, struct module *owner)
bus->dev.groups = NULL;
dev_set_name(&bus->dev, "%s", bus->id);
/* We need to set state to MDIOBUS_UNREGISTERED to correctly release
* the device in mdiobus_free()
*
* State will be updated later in this function in case of success
*/
bus->state = MDIOBUS_UNREGISTERED;
err = device_register(&bus->dev);
if (err) {
pr_err("mii_bus %s failed to register\n", bus->id);

2
drivers/net/phy/sfp.c
View File

@ -115,7 +115,7 @@ static const char * const sm_state_strings[] = {
[SFP_S_LINK_UP] = "link_up",
[SFP_S_TX_FAULT] = "tx_fault",
[SFP_S_REINIT] = "reinit",
[SFP_S_TX_DISABLE] = "rx_disable",
[SFP_S_TX_DISABLE] = "tx_disable",
};
static const char *sm_state_to_str(unsigned short sm_state)

1
drivers/ptp/ptp_pch.c
View File

@ -683,6 +683,7 @@ static const struct pci_device_id pch_ieee1588_pcidev_id[] = {
},
{0}
};
MODULE_DEVICE_TABLE(pci, pch_ieee1588_pcidev_id);
static struct pci_driver pch_driver = {
.name = KBUILD_MODNAME,

2
drivers/soc/qcom/mdt_loader.c
View File

@ -98,7 +98,7 @@ void *qcom_mdt_read_metadata(const struct firmware *fw, size_t *data_len)
if (ehdr->e_phnum < 2)
return ERR_PTR(-EINVAL);
if (phdrs[0].p_type == PT_LOAD || phdrs[1].p_type == PT_LOAD)
if (phdrs[0].p_type == PT_LOAD)
return ERR_PTR(-EINVAL);
if ((phdrs[1].p_flags & QCOM_MDT_TYPE_MASK) != QCOM_MDT_TYPE_HASH)

2
drivers/soc/qcom/socinfo.c
View File

@ -447,7 +447,7 @@ static int qcom_socinfo_probe(struct platform_device *pdev)
/* Feed the soc specific unique data into entropy pool */
add_device_randomness(info, item_size);
platform_set_drvdata(pdev, qs->soc_dev);
platform_set_drvdata(pdev, qs);
return 0;
}

8
drivers/usb/class/cdc-acm.c
View File

@ -339,6 +339,9 @@ static void acm_process_notification(struct acm *acm, unsigned char *buf)
acm->iocount.overrun++;
spin_unlock_irqrestore(&acm->read_lock, flags);
if (newctrl & ACM_CTRL_BRK)
tty_flip_buffer_push(&acm->port);
if (difference)
wake_up_all(&acm->wioctl);
@ -474,11 +477,16 @@ static int acm_submit_read_urbs(struct acm *acm, gfp_t mem_flags)
static void acm_process_read_urb(struct acm *acm, struct urb *urb)
{
unsigned long flags;
if (!urb->actual_length)
return;
spin_lock_irqsave(&acm->read_lock, flags);
tty_insert_flip_string(&acm->port, urb->transfer_buffer,
urb->actual_length);
spin_unlock_irqrestore(&acm->read_lock, flags);
tty_flip_buffer_push(&acm->port);
}

3
drivers/usb/common/Kconfig
View File

@ -6,8 +6,7 @@ config USB_COMMON
config USB_LED_TRIG
bool "USB LED Triggers"
depends on LEDS_CLASS && LEDS_TRIGGERS
select USB_COMMON
depends on LEDS_CLASS && USB_COMMON && LEDS_TRIGGERS
help
This option adds LED triggers for USB host and/or gadget activity.

1
drivers/usb/typec/tcpm/tcpm.c
View File

@ -3654,6 +3654,7 @@ static void _tcpm_cc_change(struct tcpm_port *port, enum typec_cc_status cc1,
tcpm_set_state(port, SRC_ATTACH_WAIT, 0);
break;
case SRC_ATTACHED:
case SRC_STARTUP:
case SRC_SEND_CAPABILITIES:
case SRC_READY:
if (tcpm_port_is_disconnected(port) ||

2
drivers/video/fbdev/gbefb.c
View File

@ -1269,7 +1269,7 @@ static struct platform_device *gbefb_device;
static int __init gbefb_init(void)
{
int ret = platform_driver_register(&gbefb_driver);
if (!ret) {
if (IS_ENABLED(CONFIG_SGI_IP32) && !ret) {
gbefb_device = platform_device_alloc("gbefb", 0);
if (gbefb_device) {
ret = platform_device_add(gbefb_device);

21
drivers/xen/balloon.c
View File

@ -508,12 +508,12 @@ static enum bp_state decrease_reservation(unsigned long nr_pages, gfp_t gfp)
}
/*
* Stop waiting if either state is not BP_EAGAIN and ballooning action is
* needed, or if the credit has changed while state is BP_EAGAIN.
* Stop waiting if either state is BP_DONE and ballooning action is
* needed, or if the credit has changed while state is not BP_DONE.
*/
static bool balloon_thread_cond(enum bp_state state, long credit)
{
if (state != BP_EAGAIN)
if (state == BP_DONE)
credit = 0;
return current_credit() != credit || kthread_should_stop();
@ -533,10 +533,19 @@ static int balloon_thread(void *unused)
set_freezable();
for (;;) {
if (state == BP_EAGAIN)
timeout = balloon_stats.schedule_delay * HZ;
else
switch (state) {
case BP_DONE:
case BP_ECANCELED:
timeout = 3600 * HZ;
break;
case BP_EAGAIN:
timeout = balloon_stats.schedule_delay * HZ;
break;
case BP_WAIT:
timeout = HZ;
break;
}
credit = current_credit();
wait_event_freezable_timeout(balloon_thread_wq,

7
drivers/xen/privcmd.c
View File

@ -810,11 +810,12 @@ static long privcmd_ioctl_mmap_resource(struct file *file,
unsigned int domid =
(xdata.flags & XENMEM_rsrc_acq_caller_owned) ?
DOMID_SELF : kdata.dom;
int num;
int num, *errs = (int *)pfns;
BUILD_BUG_ON(sizeof(*errs) > sizeof(*pfns));
num = xen_remap_domain_mfn_array(vma,
kdata.addr & PAGE_MASK,
pfns, kdata.num, (int *)pfns,
pfns, kdata.num, errs,
vma->vm_page_prot,
domid,
vma->vm_private_data);
@ -824,7 +825,7 @@ static long privcmd_ioctl_mmap_resource(struct file *file,
unsigned int i;
for (i = 0; i < num; i++) {
rc = pfns[i];
rc = errs[i];
if (rc < 0)
break;
}

19
fs/nfsd/nfs4xdr.c
View File

@ -3131,15 +3131,18 @@ nfsd4_encode_dirent(void *ccdv, const char *name, int namlen,
goto fail;
cd->rd_maxcount -= entry_bytes;
/*
* RFC 3530 14.2.24 describes rd_dircount as only a "hint", so
* let's always let through the first entry, at least:
* RFC 3530 14.2.24 describes rd_dircount as only a "hint", and
* notes that it could be zero. If it is zero, then the server
* should enforce only the rd_maxcount value.
*/
if (!cd->rd_dircount)
goto fail;
name_and_cookie = 4 + 4 * XDR_QUADLEN(namlen) + 8;
if (name_and_cookie > cd->rd_dircount && cd->cookie_offset)
goto fail;
cd->rd_dircount -= min(cd->rd_dircount, name_and_cookie);
if (cd->rd_dircount) {
name_and_cookie = 4 + 4 * XDR_QUADLEN(namlen) + 8;
if (name_and_cookie > cd->rd_dircount && cd->cookie_offset)
goto fail;
cd->rd_dircount -= min(cd->rd_dircount, name_and_cookie);
if (!cd->rd_dircount)
cd->rd_maxcount = 0;
}
cd->cookie_offset = cookie_offset;
skip_entry:

2
fs/nfsd/nfsctl.c
View File

@ -1549,7 +1549,7 @@ static int __init init_nfsd(void)
goto out_free_all;
return 0;
out_free_all:
unregister_pernet_subsys(&nfsd_net_ops);
unregister_filesystem(&nfsd_fs_type);
out_free_exports:
remove_proc_entry("fs/nfs/exports", NULL);
remove_proc_entry("fs/nfs", NULL);

10
fs/overlayfs/dir.c
View File

@ -1165,9 +1165,13 @@ static int ovl_rename(struct inode *olddir, struct dentry *old,
goto out_dput;
}
} else {
if (!d_is_negative(newdentry) &&
(!new_opaque || !ovl_is_whiteout(newdentry)))
goto out_dput;
if (!d_is_negative(newdentry)) {
if (!new_opaque || !ovl_is_whiteout(newdentry))
goto out_dput;
} else {
if (flags & RENAME_EXCHANGE)
goto out_dput;
}
}
if (olddentry == trap)

3
kernel/bpf/stackmap.c
View File

@ -60,7 +60,8 @@ static inline int stack_map_data_size(struct bpf_map *map)
static int prealloc_elems_and_freelist(struct bpf_stack_map *smap)
{
u32 elem_size = sizeof(struct stack_map_bucket) + smap->map.value_size;
u64 elem_size = sizeof(struct stack_map_bucket) +
(u64)smap->map.value_size;
int err;
smap->elems = bpf_map_area_alloc(elem_size * smap->map.max_entries,

2
net/bridge/br_netlink.c
View File

@ -1536,7 +1536,7 @@ static size_t br_get_linkxstats_size(const struct net_device *dev, int attr)
}
return numvls * nla_total_size(sizeof(struct bridge_vlan_xstats)) +
nla_total_size(sizeof(struct br_mcast_stats)) +
nla_total_size_64bit(sizeof(struct br_mcast_stats)) +
nla_total_size(0);
}

2
net/core/rtnetlink.c
View File

@ -4950,7 +4950,7 @@ nla_put_failure:
static size_t if_nlmsg_stats_size(const struct net_device *dev,
u32 filter_mask)
{
size_t size = 0;
size_t size = NLMSG_ALIGN(sizeof(struct if_stats_msg));
if (stats_attr_valid(filter_mask, IFLA_STATS_LINK_64, 0))
size += nla_total_size_64bit(sizeof(struct rtnl_link_stats64));

4
net/ipv4/inet_hashtables.c
View File

@ -239,8 +239,10 @@ static inline int compute_score(struct sock *sk, struct net *net,
if (!inet_sk_bound_dev_eq(net, sk->sk_bound_dev_if, dif, sdif))
return -1;
score = sk->sk_bound_dev_if ? 2 : 1;
score = sk->sk_family == PF_INET ? 2 : 1;
if (sk->sk_family == PF_INET)
score++;
if (READ_ONCE(sk->sk_incoming_cpu) == raw_smp_processor_id())
score++;
}

3
net/ipv4/udp.c
View File

@ -386,7 +386,8 @@ static int compute_score(struct sock *sk, struct net *net,
dif, sdif);
if (!dev_match)
return -1;
score += 4;
if (sk->sk_bound_dev_if)
score += 4;
if (READ_ONCE(sk->sk_incoming_cpu) == raw_smp_processor_id())
score++;

2
net/ipv6/inet6_hashtables.c
View File

@ -104,7 +104,7 @@ static inline int compute_score(struct sock *sk, struct net *net,
if (!inet_sk_bound_dev_eq(net, sk->sk_bound_dev_if, dif, sdif))
return -1;
score = 1;
score = sk->sk_bound_dev_if ? 2 : 1;
if (READ_ONCE(sk->sk_incoming_cpu) == raw_smp_processor_id())
score++;
}

3
net/ipv6/udp.c
View File

@ -133,7 +133,8 @@ static int compute_score(struct sock *sk, struct net *net,
dev_match = udp_sk_bound_dev_eq(net, sk->sk_bound_dev_if, dif, sdif);
if (!dev_match)
return -1;
score++;
if (sk->sk_bound_dev_if)
score++;
if (READ_ONCE(sk->sk_incoming_cpu) == raw_smp_processor_id())
score++;

14
net/netlink/af_netlink.c
View File

@ -585,7 +585,10 @@ static int netlink_insert(struct sock *sk, u32 portid)
/* We need to ensure that the socket is hashed and visible. */
smp_wmb();
nlk_sk(sk)->bound = portid;
/* Paired with lockless reads from netlink_bind(),
* netlink_connect() and netlink_sendmsg().
*/
WRITE_ONCE(nlk_sk(sk)->bound, portid);
err:
release_sock(sk);
@ -1003,7 +1006,8 @@ static int netlink_bind(struct socket *sock, struct sockaddr *addr,
if (nlk->ngroups < BITS_PER_LONG)
groups &= (1UL << nlk->ngroups) - 1;
bound = nlk->bound;
/* Paired with WRITE_ONCE() in netlink_insert() */
bound = READ_ONCE(nlk->bound);
if (bound) {
/* Ensure nlk->portid is up-to-date. */
smp_rmb();
@ -1089,8 +1093,9 @@ static int netlink_connect(struct socket *sock, struct sockaddr *addr,
/* No need for barriers here as we return to user-space without
* using any of the bound attributes.
* Paired with WRITE_ONCE() in netlink_insert().
*/
if (!nlk->bound)
if (!READ_ONCE(nlk->bound))
err = netlink_autobind(sock);
if (err == 0) {
@ -1879,7 +1884,8 @@ static int netlink_sendmsg(struct socket *sock, struct msghdr *msg, size_t len)
dst_group = nlk->dst_group;
}
if (!nlk->bound) {
/* Paired with WRITE_ONCE() in netlink_insert() */
if (!READ_ONCE(nlk->bound)) {
err = netlink_autobind(sock);
if (err)
goto out;

3
net/sched/sch_fifo.c
View File

@ -148,6 +148,9 @@ int fifo_set_limit(struct Qdisc *q, unsigned int limit)
if (strncmp(q->ops->id + 1, "fifo", 4) != 0)
return 0;
if (!q->ops->change)
return 0;
nla = kmalloc(nla_attr_size(sizeof(struct tc_fifo_qopt)), GFP_KERNEL);
if (nla) {
nla->nla_type = RTM_NEWQDISC;

4
net/sched/sch_taprio.c
View File

@ -1630,6 +1630,10 @@ static void taprio_destroy(struct Qdisc *sch)
list_del(&q->taprio_list);
spin_unlock(&taprio_list_lock);
/* Note that taprio_reset() might not be called if an error
* happens in qdisc_create(), after taprio_init() has been called.
*/
hrtimer_cancel(&q->advance_timer);
taprio_disable_offload(dev, q, NULL);