With board_pci_channels now being exported in a single place, update the
boards that duplicated the export.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Fix the problem that cannot work PCI device on 32-bit mode because
influence of the commit 68b42d1b54
("sh: sh7785lcr: Map whole PCI address space."). So this patch was
implement like a 29-bit mode, map whole physical address space of
DDR-SDRAM.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
PCI still doesn't work on sh7785lcr 29bit 256M map mode.
On SH7785, PCI -> SHwy address translation is not base+offset but
somewhat like base|offset (See HW Manual (rej09b0261) Fig. 13.11).
So, you can't export CS2,3,4,5 by 256M at CS2 (results CS0,1,2,3
exported, I guess). There are two candidates.
a) 128M@CS2 + 128M@CS4
b) 512M@CS0
Attached patch is B. It maps 512M Byte at 0 independently of memory
size. It results CS0 to CS6 and perhaps some more being accessible
from PCI.
Tested on
7785lcr 29bit 128M map
7785lcr 29bit 256M map
(NOT tested on 32bit)
Signed-off-by: Takashi YOSHII <yoshii.takashi@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds initial support for the Renesas R0P7785LC0011RL board.
This patch supports 29bit address mode only.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
