These should be returning a uint32_t, whereas they were erroneously
returning a u64 before. As the register sizes are 32-bits, this doesn't
really make a lot of sense.
Reported-by: Katsuya MATSUBARA <matsu@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
We need to know the CPU ID in order to calculate the mask and ack
registers effectively. Stub this in for UP.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This was using CONFIG_SH_SOLUTION_ENGINE, where we really wanted
CONFIG_SOLUTION_ENGINE. While we're at it, move the whole CF
enabler mess somewhere better suited.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Only print out pgd/pte data in the oops path if oops_may_print()
holds true. Follows the i386 implementation.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch reworks the ipr code by grouping the offset array together
with the ipr_data structure in a new data structure called ipr_desc.
This new structure also contains the name of the controller in struct
irq_chip. The idea behind putting struct irq_chip in there is that we
can use offsetof() to locate the base addresses in the irq_chip
callbacks. This strategy has much in common with the recently merged
intc2 code.
One logic change has been made - the original ipr code enabled the
interrupts by default but with this patch they are all disabled by
default.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
We don't have a PMB for SH-X2 or later, so only enable it for
the few CPUs that support it. Fixes up the boot for SH4AL-DSP.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The shared intc2 code currently contains cpu-specific #ifdefs.
This is a tad unclean and it prevents us from using the shared code
to drive board-specific irqs on the se7780 board.
This patch reworks the intc2 code by moving the base addresses of
the intc2 registers into struct intc2_desc. This new structure also
contains the name of the controller in struct irq_chip. The idea
behind putting struct irq_chip in there is that we can use offsetof()
to locate the base addresses in the irq_chip callbacks.
One logic change has been made - the original shared intc2 code
enabled the interrupts by default but with this patch they are all
disabled by default.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
There's no point in keeping these around, they've been broken
for some time, and the dmaenging/async_tx framework provides a
far more reasonable interface.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
SH-2 can presently get in to some pretty bogus states, so
we tidy up the dependencies a bit and get it all building
again.
This gets us a bit closer to a functional allyesconfig
and allmodconfig, though there are still a few things to
fix up.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This was added during 2.5.x, but was never moved along. This
can easily be resurrected if someone has one they wish to work
with, but it's not worth keeping around in its current form.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This enables simple hotplug support for sparsemem users. Presently
this only permits memory being added in to node 0 on ZONE_NORMAL.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Currently cpu_to_node() is always 0 in the UP case, though
we do want to have the CPU association linked in under sysfs
even in the cases where we're only on a single CPU.
Fix this up, so we have the cpu0 link on all of the available
nodes that don't already have a CPU link of their own.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds the URAM block on SH7722 as a separate node.
Sparsemem is required for this, or it can simply be disabled
by explicitly selecting a flatmem model.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds basic support for multiple nodes on SH machines.
This is primarily useful for boards with many different
memory blocks that are otherwise unused (SH7722/SH7785 URAM
and so forth).
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Currently using multiple nodes tramples the ZONE_NORMAL
max low pfn, tidy up the logic a bit to get it all working
as expected.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Some compilers don't support the explicit CPU tuning, while binutils
is still able to handle the special subtype-specific opcodes. Make
the CFLAG optional, falling back on the compiler default if nothing
better exists.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
We have to call in to sparse_memory_present_with_active_regions()
earlier in order for sparsemem to be happy. This was being called
too late, and was causing troubles with the platforms that needed
to enable sparsemem.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This implements basic sparsemem support for SH. Presently this only
uses static sparsemem, and we still permit explicit selection of
flatmem. Those boards that want sparsemem can select it as usual.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
.machvec.init can be misaligned with the recent machvec changes,
forcibly align it on the boundary that it expects, as before.
Signed-off-by: Takashi YOSHII <takashi.yoshii.ze@hitachi.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Now that select no longer works for selecting the "closest" CPU,
we have to explicitly reference the precise sub-type in the few
places where it actually matters (presently only setup code and
some legacy sh-sci cruft).
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This kills off the BareCPU board as a "special" machvec, rather,
we leave this as a default for when no other vector is available,
or when we want to use it in combination with other vectors for
testing with generic ops. As sh_mv is copied out anyways (or
overloaded when an alternate vector is explicitly selected), this
doesn't consume any additional memory.
The generic machvec can be forcibly selected with sh_mv=generic,
or by not having any other boards enabled.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
We now throw all of the machvecs in to .machvec.init and either
select one on the command line, or copy out the first (and
usually only) one to sh_mv. The rest are freed as usual.
This gets rid of all of the silly sh_mv aliasing and makes the
selection explicit rather than link-order dependent.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This tidies up the build rules and permits multiple boards to be
linked in to the same kernel. The earlier Kconfig work ensures that
the CPU configuration is consistent across the boards, as this is
the only thing that we can't do dynamically.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This was a big mess, rework the logic a bit so that we constrain
to a particular subtype and figure out the board support based
on that. This makes building subtype specific kernels supporting
multiple boards possible again.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This fixes up much of the machvec handling, allowing for it to be
overloaded on boot. Making practical use of this still requires
some Kconfig munging, however.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds in some more __user annotations. These weren't being
handled properly in some of the __get_user and __put_user paths,
so tidy those up.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Split out the CPU topology initialization to a separate file,
and switch it to a percpu type, rather than an NR_CPUS array.
At the same time, switch to only registering present CPUs,
rather than using the possible CPU map.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* git://git.linux-xtensa.org/kernel/xtensa-feed:
Xtensa: use asm-generic/fcntl.h
[XTENSA] Remove non-rt signal handling
[XTENSA] Move common sections into bss sections
[XTENSA] clean-up header files
[XTENSA] Use generic 64-bit division
[XTENSA] Remove multi-exported symbols from xtensa_ksyms.c
[XTENSA] fix sources using deprecated assembler directive
[XTENSA] Spelling fixes in arch/xtensa
[XTENSA] fix bit operations in bitops.h
This is a minor fix, but what is currently there is essentially wrong.
In do_page_fault, if the faulting address from user code happens to be
in kernel address space (int *p = (int*)-1; p = 0xbed;) then the
do_page_fault handler will jump over the local_irq_enable with the
goto bad_area_nosemaphore;
But the first line there sees this is user code and goes through the
process of sending a signal to send SIGSEGV to the user task. This whole
time interrupts are disabled and the task can not be preempted by a
higher priority task.
This patch always enables interrupts in the user path of the
bad_area_nosemaphore.
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
