Some controllers have been designed on the assumption that all transfers
will be 32-bit aligned, both in start address and in size. This is not a
guarantee the SDHCI specification provides and not one we can provide.
Revert back to PIO for individual requests in order to work around the
hardware bug.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
It is fully legal for a controller to start issuing data related
interrupts before it has signalled that the command has completed.
Make sure the driver actually can handle this.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
The controller has a bit indicating that one of the higher bits (the
error bits) are set. A previous bug caused this bit to be masked, but
since that bug has been fixed we have to clear it explicictly.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
