Commit Graph

7 Commits

Author SHA1 Message Date
Franck Bui-Huu
192cca6ef2 [MIPS] Remove Momenco Ocelot C support
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 delete mode 100644 arch/mips/configs/ocelot_c_defconfig
 delete mode 100644 arch/mips/momentum/ocelot_c/Makefile
 delete mode 100644 arch/mips/momentum/ocelot_c/cpci-irq.c
 delete mode 100644 arch/mips/momentum/ocelot_c/dbg_io.c
 delete mode 100644 arch/mips/momentum/ocelot_c/irq.c
 delete mode 100644 arch/mips/momentum/ocelot_c/ocelot_c_fpga.h
 delete mode 100644 arch/mips/momentum/ocelot_c/platform.c
 delete mode 100644 arch/mips/momentum/ocelot_c/prom.c
 delete mode 100644 arch/mips/momentum/ocelot_c/reset.c
 delete mode 100644 arch/mips/momentum/ocelot_c/setup.c
 delete mode 100644 arch/mips/momentum/ocelot_c/uart-irq.c
 delete mode 100644 arch/mips/pci/fixup-ocelot-c.c
 delete mode 100644 arch/mips/pci/pci-ocelot-c.c
2007-07-10 17:33:01 +01:00
Yoichi Yuasa
6b5bf50931 [MIPS] EV64120: Remove support
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:00 +01:00
Ralf Baechle
aea0e582d3 [MIPS] Viper2: Remove defective support.
A defconfig file and the 10 lines of code (including comments ...) that
are rotting since lmo commit 6516a42dc8b40c6c00010346dd51496125b16644
don't quite make proper support, so let's trash it.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-03-13 16:59:31 +00:00
Franck Bui-Huu
9693a85378 [MIPS] Add basic SMARTMIPS ASE support
This patch adds trivial support for SMARTMIPS extension. This extension
is currently implemented by 4KS[CD] CPUs.

Basically it saves/restores ACX register, which is part of the SMARTMIPS
ASE, when needed. This patch does *not* add any support for Smartmips MMU
features.

Futhermore this patch does not add explicit support for 4KS[CD] CPUs since
they are respectively mips32 and mips32r2 compliant.  So with the current
processor configuration, a platform that has such CPUs needs to select
both configs:

	CPU_HAS_SMARTMIPS
	SYS_HAS_CPU_MIPS32_R[12]

This is due to the processor configuration which is mixing up all the
architecture variants and the processor types.

The drawback of this, is that we currently pass '-march=mips32' option to
gcc when building a kernel instead of '-march=4ksc' for 4KSC case. This
can lead to a kernel image a little bit bigger than required.

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-22 00:50:44 +00:00
Ralf Baechle
040cf8cfe5 [MIPS] Update defconfigs
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-18 21:31:37 +00:00
Thomas Bogendoerfer
14b36af46a [MIPS] Rename SNI_RM200_PCI to just SNI_RM preparing for more RM machines
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-12-09 01:03:58 +00:00
Ralf Baechle
de4f742b96 [MIPS] Jazz defconfig file.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-09 00:15:27 +01:00