Commit Graph

512 Commits

Author SHA1 Message Date
Priyanka Gujjula
372b7136f5 msm: vidc: Add support for 128x32 alignment of NV12
Introduce new internal driver color format
V4L2_PIX_FMT_NV12_128 and uapi color format
COLOR_FMT_NV12_128 to map with NV12 128x32
alignment. Also, clean up intermediate HAL
color formats.

Change-Id: Ia28d0f422f2777bda865c2fc6c7499cce9dabb54
Signed-off-by: Priyanka Gujjula <pgujjula@codeaurora.org>
2020-08-29 00:42:28 +05:30
Priyanka Gujjula
2686a86b94 msm: vidc: Include uapi header files from techpack
Currently uapi header files are included from core
kernel include path since core kernel makefile also
includes them. Hence making changes to include path
in techpack makefile such that uapi header files are
included from techpack project.

Change-Id: I604b8bbb3058473b3e301cbbce112c8c93a0e963
Signed-off-by: Priyanka Gujjula <pgujjula@codeaurora.org>
2020-08-19 22:32:19 +05:30
qctecmdr
3bf4f90efb Merge "msm: vidc: Restrict dynamic low latency for h264 and hevc" 2020-08-19 03:01:35 -07:00
qctecmdr
9354ca4ba5 Merge "msm: vidc: improve heif decoder performance" 2020-08-18 18:38:24 -07:00
Govindaraj Rajagopal
c24265be5c msm: vidc: Update VP9 decoder capabilities for shima
Update VP9 decoder capabilities for shima to be inline
with lahaina.

Change-Id: Ieab73987d92bb093fd06391086935900b5e01768
Signed-off-by: Govindaraj Rajagopal <grajagop@codeaurora.org>
2020-08-18 18:53:35 +05:30
Qiwei Liu
0e570d90fa msm: vidc: improve heif decoder performance
Add V4L2 interface to indicate heif decoder, and use
below configurations to improve performance.
1. Set turbo session
2. Disable DCVS and batch
3. Increase input and output buffer count to 12
4. Modify input buffer size calculation
5. Avoid framerate calc and ts list maintenance
6. Skip setting bse-vpp delay

Change-Id: I9a47a88154238db3ac4285462c6030114546d333
Signed-off-by: Qiwei Liu <qiweil@codeaurora.org>
2020-08-18 11:34:24 +08:00
Vikash Garodia
b560c7a295 msm: vidc: Restrict dynamic low latency for h264 and hevc
In existing approach, dynamic low latency i.e low latency hint
is restricted via specific low latency components in userspace.
This change adds one more checkpoint to ensure that video
firmware is configured for low latency only for desired codecs.

Change-Id: Iad36c3b84ddc3b94033c4bf5f0afdd3a18600111
Signed-off-by: Vikash Garodia <vgarodia@codeaurora.org>
2020-08-18 01:22:20 +05:30
Mihir Ganu
5a5d1b2859 msm: vidc: Update VP9 decoder capabilities
Revise VP9 decoder capabilities and limits to
match the updated Lahaina PRD.

Change-Id: I7a92c88b21e19ab44b43a0c829491f58aa1ce492
Signed-off-by: Mihir Ganu <mganu@codeaurora.org>
2020-08-14 11:31:30 -07:00
qctecmdr
583ad02d81 Merge "msm: vidc: set chroma_qp_offset only for client set cases" 2020-08-13 23:49:45 -07:00
qctecmdr
c9ab640209 Merge "msm: vidc: update vsp_cycle entries for shima" 2020-08-12 17:19:15 -07:00
qctecmdr
6a424bb70f Merge "msm: vidc: Deprecate Mpeg2 secure decode support" 2020-08-12 17:19:15 -07:00
Govindaraj Rajagopal
36d91e66e0 msm: vidc: set chroma_qp_offset only for client set cases
Set chroma_qp_offset hfi to firmware only for client set cases.
Supported value: 0 & -12

If hfi not set, firmware proceeds with its own default value.
10-bit: default: 0
8-bit : default: Adaptive chroma_qp

Change-Id: I40262aae87b2a385c6cd7d60faa19b6adfe8b151
Signed-off-by: Govindaraj Rajagopal <grajagop@codeaurora.org>
2020-08-12 18:56:04 +05:30
Govindaraj Rajagopal
be77d74ff1 msm: vidc: update vsp_cycle entries for shima
Updated VSP base cycle entries for Shima to inline
with vperf.

Change-Id: I26e7a521434765b97cc1a508b714652d14adf2aa
Signed-off-by: Govindaraj Rajagopal <grajagop@codeaurora.org>
2020-08-11 20:21:52 +05:30
qctecmdr
c1ad7b0054 Merge "msm: vidc: revise timestamp data type to s64" 2020-08-10 16:04:35 -07:00
Shi Zhongbo
b1a132ad57 msm: vidc: revise timestamp data type to s64
Revise internal timestamp data type from u64
to s64 in case of negative timestamps.

Change-Id: Ib026d504a08ce5ac67d1d962b671c37637761321
Signed-off-by: Shi Zhongbo <zhongbos@codeaurora.org>
2020-08-10 13:05:17 -07:00
Mihir Ganu
4be4e326bf msm: vidc: Fix incorrect VP9 scratch buffer calculation
Fix the incorrect VP9 decoder scratch buffer calculation
and match it with firmware definition of scratch buffer size.

Change-Id: Ie901082760d675153d1eb898cbe665cc6ad59bd1
Signed-off-by: Mihir Ganu <mganu@codeaurora.org>
2020-08-10 13:04:57 -07:00
Shi Zhongbo
460c45b72a msm: vidc: fix time stamp store after EOS for decoders
1. Add a new EOS flag to denote EOS pending status;
2. Set all existed time stamps with EOS flag as true
   after inserting EOS time stamp;
3. Ignore time stamp sorting to buffers with EOS pending
   flag as true;

Change-Id: I72b041150973e2a28d1039c5f906fdb222a86081
Signed-off-by: Shi Zhongbo <zhongbos@codeaurora.org>
2020-08-10 13:04:38 -07:00
qctecmdr
10fbc8019e Merge "msm: vidc: fix less_or_equal resolution check" 2020-08-10 09:10:00 -07:00
Govindaraj Rajagopal
5e7df6ab91 msm: vidc: Deprecate Mpeg2 secure decode support
Remove secure deocde support for Mpeg2 codec.

Change-Id: Ieec132b0c86aa6be3e382c091acdf734d1e1c31e
Signed-off-by: Govindaraj Rajagopal <grajagop@codeaurora.org>
2020-08-10 14:03:22 +05:30
Rakshitha Shakamuri
d36983b6f6 Revert "msm: vidc: Update timer API"
This reverts commit a03df1c593.

Change-Id: I65a664bfcb25a534fc71be238dae8560cea3fd6c
Signed-off-by: Rakshitha Shakamuri <rshakamu@codeaurora.org>
2020-08-08 21:58:35 -07:00
qctecmdr
1f1189b278 Merge "msm: vidc: Update timer API" 2020-08-05 12:16:50 -07:00
Govindaraj Rajagopal
cd778f6988 msm: vidc: always read fuse value irrespective of sku-index
[1] Only one vidc node is maintained, so "sku-index" entry is
    removed in dtsi.
[2] In video driver, always read fuse value if efuse_data entry
    is populated

Change-Id: I86b8c38f1e71491678b54a11783292e1281f90d3
Signed-off-by: Govindaraj Rajagopal <grajagop@codeaurora.org>
2020-08-04 23:59:55 -07:00
qctecmdr
a742fc9e9a Merge "msm: vidc: Update DCVS thresholds for sufficient seq change" 2020-08-03 17:44:15 -07:00
Chinmay Sawarkar
912bb52fc1 msm: vidc: Update DCVS thresholds for sufficient seq change
1. Sufficient event should use fw min count for DCVS.
2. Input buffer count calculation is independent of Realtime/Non-Realtime.
3. Batching should be disabled if it is non-realtime session.
4. Removed misleading logs and changed buffer count logs to
convey the correct meaning.

Change-Id: Ieba6fc022549f5e767a833410ead5aa7fb52e14b
Signed-off-by: Chinmay Sawarkar <chinmays@codeaurora.org>
2020-08-03 11:12:44 -07:00
Shi Zhongbo
21cba5ad49 msm: vidc: fix time stamp store and fetch
Fix to skip time stamp store and fetch for buffers
with codec config flag.

Change-Id: I867db519c45751ef2dadef5a323c7a4ad2741385
Signed-off-by: Shi Zhongbo <zhongbos@codeaurora.org>
2020-08-03 16:23:43 +08:00
Mihir Ganu
a03df1c593 msm: vidc: Update timer API
Replace the obsolete do_gettimeofday API with ktime API.

Change-Id: Id105d2c531f8b9aa3315800ab3312bc6a619b792
Signed-off-by: Mihir Ganu <mganu@codeaurora.org>
2020-08-02 20:14:27 -07:00
qctecmdr
9fa91852ca Merge "msm: vidc: Copy hfi buf req to hal buf req" 2020-08-01 14:09:39 -07:00
qctecmdr
d2eb76acdc Merge "msm: vidc: check for cvp support" 2020-08-01 14:09:39 -07:00
Qiwei Liu
e05aff730d msm: vidc: fix less_or_equal resolution check
For less_or_equal check, need to meet all the
conditions when return true, not only one condition.

Change-Id: Icf103721596cdcb6a4a90e1def67f3151140db85
Signed-off-by: Qiwei Liu <qiweil@codeaurora.org>
2020-07-29 11:35:59 +08:00
Manikanta Kanamarlapudi
7ae805aa63 msm: vidc: check for cvp support
check for cvp support before any cvp
related operation.

CRs-Fixed: 2741030
Change-Id: I7a457608321f0aa5b93b6f62d7ceb76c0b00fb93
Signed-off-by: Manikanta Kanamarlapudi <kmanikan@codeaurora.org>
2020-07-28 11:55:57 +05:30
Manikanta Kanamarlapudi
e2a2a4a190 msm: vidc: Copy hfi buf req to hal buf req
copy hfi buf req to hal buf req element by
element. Due to change in structure sizes,
memcpy may lead to memory corruption.

CRs-Fixed: 2741030
Change-Id: Ie4a3aeba7cac78af99355eb766a5ead755cf654b
Signed-off-by: Manikanta Kanamarlapudi <kmanikan@codeaurora.org>
2020-07-28 00:25:43 +05:30
qctecmdr
7fc1d99c4b Merge "msm: vidc: disable DCVS for camera encode batching" 2020-07-26 12:20:17 -07:00
Mihir Ganu
f8eaa17bf0 msm: vidc: Enable 8-bit chroma QP offset support
Enable support for 8-bit chroma QP offset.

Change-Id: I296f7a5669439c21d9727b1b731cfce14cbcd529
Signed-off-by: Mihir Ganu <mganu@codeaurora.org>
2020-07-24 16:14:08 -07:00
Priyanka Gujjula
4f287b68ad msm: vidc: disable DCVS for camera encode batching
Disable DCVS for encode usecases if the control
V4L2_CID_MPEG_VIDC_SUPERFRAME is enabled.

Change-Id: I72a4bebbd79c42988867572d69f6833629054cba
2020-07-24 12:48:34 +05:30
Mihir Ganu
fbc3b10e06 msm: vidc: Update power sequence to match Lahaina HPG steps
Update power sequence by removing all resets during power down.

Change-Id: I88610e9c71a91a32332626bf6da88f0f64ed1c65
Signed-off-by: Mihir Ganu <mganu@codeaurora.org>
(cherry picked from commit 5cffae52eacaaf6b0698de06c11397339d904f35)
2020-07-21 09:35:17 -07:00
Amit Shekhar
59ca4e2365 msm: vidc: Fix p-frame count
Fix p-frame count during intra-period setting for HEVC session without
layer encoding.

Change-Id: I796cac16fbb0538012f9fc97262e1877285e1803
CRs-Fixed: 2735233
Signed-off-by: Amit Shekhar <ashekhar@codeaurora.org>
2020-07-20 17:14:08 -07:00
Akshata Sahukar
1fd9cfcf2e msm: vidc: Fix to add correct superframe buffer timestamps
Avoid adapting driver framerate to camera qbuf rate in superframe
enabled case to avoid setting incorrect hfr buffer timestamps.

Change-Id: I354e7517b9aeef7f1b01f33089b81bf7122e12e2
Signed-off-by: Akshata Sahukar <asahukar@codeaurora.org>
2020-07-20 10:32:32 -07:00
qctecmdr
b14f4c13bc Merge "msm: vidc: Check validity of a timestamp before inserting it to list" 2020-07-17 18:24:53 -07:00
Mihir Ganu
6b73bf247d msm: vidc: Check validity of a timestamp before inserting it to list
In steady state, the first entry in the linked list of timestamps is
always invalid. When adding a new timestamp entry, adding the
timestamp which is a duplicate of first entry leads to duplicate
linked list nodes. To avoid this, check for validity of an entry
before inserting duplicates to the linked list.

Change-Id: I47dd8fb06b9e4eb307605df6b0e2b352a2e263fe
Signed-off-by: Mihir Ganu <mganu@codeaurora.org>
2020-07-17 11:31:48 -07:00
qctecmdr
fdffed7083 Merge "msm: vidc: fix sub_frame flag when fetch ts" 2020-07-17 11:31:01 -07:00
qctecmdr
5a51ddcaba Merge "msm: vidc: Fix static analysis issues" 2020-07-17 11:31:01 -07:00
Qiwei Liu
b226cd01b3 msm: vidc: fix sub_frame flag when fetch ts
Need to check against v4l2 flag instead of
hfi flag.

Change-Id: Ib15974b1cc2ee23861b47425ebe21d25ff6dc694
Signed-off-by: Qiwei Liu <qiweil@codeaurora.org>
2020-07-16 18:30:43 +08:00
Amit Shekhar
209b06e403 msm: vidc: Fix static analysis issues
Fix uninitialized access issue with a few variables.

Change-Id: Ib79186e0b837ce1d020546c8a3436745c5d50532
CRs-Fixed: 2729628
Signed-off-by: Amit Shekhar <ashekhar@codeaurora.org>
2020-07-15 22:58:11 -07:00
Amit Shekhar
911dc56174 msm: vidc: Add support for Hier-B
Add support for Hier-B.

Change-Id: I2bd6f1b6525224795500d8a260de3d78a78d2163
CRs-Fixed: 2637948
Signed-off-by: Amit Shekhar <ashekhar@codeaurora.org>
2020-07-15 22:55:27 -07:00
Vikash Garodia
f171a0918b msm: vidc: Update perf mode spec for shima
As per the recommended configuration, the max spec
for running an encode session in high quality is
1080p@30. Updating the same.

Change-Id: I649790bbf8a3c2264bfe6c36769717df2d2f2a55
Signed-off-by: Vikash Garodia <vgarodia@codeaurora.org>
2020-07-16 00:14:31 +05:30
Govindaraj Rajagopal
9f8094a79d msm: vidc: use clock-rates from static table instead from dtsi
Currently video has multiple nodes in dtsi to support/limit
sw capabilities via sku-index. Mostly restriction comes in
terms of allowed-clock-rate. So created static entries in
platform.c to configure clocks based on plaform fuse value.
So that single vidc dtsi node is sufficient and there will
not be a probe defer/failure during bootup.

For ex. Shima supports 3 sku's.
AB - max 364.8 MHz - sku_version(1) - picked from dtsi(default sku)
AA - max 201.6 MHz - sku_version(2) - clock_data_v2
AC - max 444 MHz   - sku_version(0) - clock_data_v0(no fuse)

Single vidc node - "aa00000.qcom,vidc"

Change-Id: I870f1e3a24c0cbfdd92c537d3e40c4cf5400326d
Signed-off-by: Govindaraj Rajagopal <grajagop@codeaurora.org>
2020-07-08 20:09:15 +05:30
Manikanta Kanamarlapudi
8fa3a6f8a4 msm: vidc: Update min resolution capability
Update min resolution support from 128x128
to 96x96 for decoder.

CRs-Fixed: 2724675
Change-Id: I230d3c5fbdc1d476a634160de30b20e207a5f315
Signed-off-by: Manikanta Kanamarlapudi <kmanikan@codeaurora.org>
2020-07-04 10:16:42 +05:30
Govindaraj Rajagopal
7b3b1524c4 msm: vidc: fix deadlock between queue and flush buffer handling
qbuf ioctl acquired bufq[port].lock in one thread and flush
call acquired registeredbufs.lock in another thread. So
thread-1 is waiting for registeredbufs.lock & thread-2 is
waiting for bufq[port].lock i.e leading to deadlock. So
added change to avoid above mentioned deadlock.

Change-Id: Ie21984fdb562ca7a09f801f036f3a78429ceab94
Signed-off-by: Govindaraj Rajagopal <grajagop@codeaurora.org>
2020-06-30 09:46:54 +05:30
Priyanka Gujjula
bc901f21ba msm: vidc: Align per pipe usage with DMA alignment
Currently, total buffer size across pipes is
aligned with 256. It should be per pipe usage
aligned with 256.

Change-Id: I389f2a0539bb04b9d038fe44122da70690c43466
Signed-off-by: Priyanka Gujjula <pgujjula@codeaurora.org>
2020-06-25 16:42:54 +05:30
qctecmdr
8da86217fe Merge "msm: vidc: configure work mode for 720p" 2020-06-24 22:18:39 -07:00