Reading this driver I noticed some trailing whitespaces and tabs so I
removed them with some 80th column fitting and a few more similar
things.
From: Carlo Perassi <carlo@linux.it>
Signed-off-by: Lonnie Mendez <dignome@gmail.com>
Signed-off-by: Carlo Perassi <carlo@linux.it>
Signed-off-by: Domen Puncer <domen@coderock.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Patch from Ben Dooks
Updated the s3c2410_defconfig for the 2.6.13-git8
kernel release, as well as adding the Anubis
board to the list of boards built.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Tony Lindgren
This patch syncs the mainline kernel with linux-omap tree.
The highlights of the patch are:
- Convert more drivers to register resources in board-*.c to take
advantage of the driver model by David Brownell and Ladislav Michl
- Use set_irq_type() for GPIO interrupts instead of
omap_set_gpio_edge_ctrl() by David Brownell
- Add minimal support for handling optional add-on boards, such as
OSK Mistral board with LCD and keypad, by David Brownell
- Minimal support for loading functions to SRAM by Tony Lindgren
- Wake up from serial port by muxing RX lines temporarily into GPIO
interrupts by Tony Lindgren
- 32KHz sched_clock by Tony Lindgren and Juha Yrjola
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Simple cleanup to eliminate X copies of the pci_enable_intx() function
in libata. Moved ahci.c's pci_intx() to pci.c and use it throughout
libata and msi.c.
Signed-off-by: Brett Russ <russb@emc.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
- support PCI PM CAP version 3 (as defined in PCI PM Interface Spec v1.2)
- pci/probe.c sets the PM state initially to 4 which is D3cold. add a
PCI_UNKNOWN
- minor cleanups
Signed-off-by: Daniel Ritz <daniel.ritz@gmx.ch>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
The PCI error recovery infrastructure needs to be able to contact all
the drivers affected by a PCI error event, which may mean traversing
all the devices under a given PCI-PCI bridge. This patch adds a
function to the PCI core that traverses all the PCI devices on a PCI
bus and under any PCI-PCI bridges on that bus (and so on), calling a
given function for each device. This provides a way for the error
recovery code to iterate through all devices that are affected by an
error event.
This version is not implemented as a recursive function. Instead,
when we reach a PCI-PCI bridge, we set the pointers to start doing the
devices on the bus under the bridge, and when we reach the end of a
bus's devices, we use the bus->self pointer to go back up to the next
higher bus and continue doing its devices.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
These fixes were suggested by pcihpd-discuss, but were dropped in the
initial checkin of the code. These fixes include cleaning up the
hotplug driver sysfs filename, and some minor code cleanups. The driver
also requires at least PROM 4.30, not 4.20.
Signed-off-by: Prarit Bhargava <prarit@sgi.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This patch (as552) fixes yet another small problem recently added. If an
attempt to put a PCI device back into D0 fails because the device doesn't
support PCI PM, it shouldn't count as error. Without this patch the UHCI
controllers on my Intel motherboard don't work.
Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
There were three changes necessary in order to allow
sparc64 to use setup-res.c:
1) Sparc64 roots the PCI I/O and MEM address space using
parent resources contained in the PCI controller structure.
I'm actually surprised no other platforms do this, especially
ones like Alpha and PPC{,64}. These resources get linked into the
iomem/ioport tree when PCI controllers are probed.
So the hierarchy looks like this:
iomem --|
PCI controller 1 MEM space --|
device 1
device 2
etc.
PCI controller 2 MEM space --|
...
ioport --|
PCI controller 1 IO space --|
...
PCI controller 2 IO space --|
...
You get the idea. The drivers/pci/setup-res.c code allocates
using plain iomem_space and ioport_space as the root, so that
wouldn't work with the above setup.
So I added a pcibios_select_root() that is used to handle this.
It uses the PCI controller struct's io_space and mem_space on
sparc64, and io{port,mem}_resource on every other platform to
keep current behavior.
2) quirk_io_region() is buggy. It takes in raw BUS view addresses
and tries to use them as a PCI resource.
pci_claim_resource() expects the resource to be fully formed when
it gets called. The sparc64 implementation would do the translation
but that's absolutely wrong, because if the same resource gets
released then re-claimed we'll adjust things twice.
So I fixed up quirk_io_region() to do the proper pcibios_bus_to_resource()
conversion before passing it on to pci_claim_resource().
3) I was mistakedly __init'ing the function methods the PCI controller
drivers provide on sparc64 to implement some parts of these
routines. This was, of course, easy to fix.
So we end up with the following, and that nasty SPARC64 makefile
ifdef in drivers/pci/Makefile is finally zapped.
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Some PCI devices (e.g. 3c905B, 3c556B) lose all configuration
(including BARs) when transitioning from D3hot->D0. This leaves such
a device in an inaccessible state. The patch below causes the BARs
to be restored when enabling such a device, so that its driver will
be able to access it.
The patch also adds pci_restore_bars as a new global symbol, and adds a
correpsonding EXPORT_SYMBOL_GPL for that.
Some firmware (e.g. Thinkpad T21) leaves devices in D3hot after a
(re)boot. Most drivers call pci_enable_device very early, so devices
left in D3hot that lose configuration during the D3hot->D0 transition
will be inaccessible to their drivers.
Drivers could be modified to account for this, but it would
be difficult to know which drivers need modification. This is
especially true since often many devices are covered by the same
driver. It likely would be necessary to replicate code across dozens
of drivers.
The patch below should trigger only when transitioning from D3hot->D0
(or at boot), and only for devices that have the "no soft reset" bit
cleared in the PM control register. I believe it is safe to include
this patch as part of the PCI infrastructure.
The cleanest implementation of pci_restore_bars was to call
pci_update_resource. Unfortunately, that does not currently exist
for the sparc64 architecture. The patch below includes a null
implemenation of pci_update_resource for sparc64.
Some have expressed interest in making general use of the the
pci_restore_bars function, so that has been exported to GPL licensed
modules.
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
For systems with multiple hotplug controllers, you need to use more than
just the slot number to uniquely name the slot. Without a unique slot
name, the pci_hp_register() will fail. This patch adds the bus number
to the name.
Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Convert i386/pci to use io_remap_pfn_range instead of remap_pfn_range.
This is good for Xen which reuses i386/pci/i386.c for domain 0 code.
Signed-off-by: Michael S. Tsirkin <mst@mellanox.co.il>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This cleans up some of the #ifdef CONFIG_PCI stuff up, and moves the pci register
info out to a separate file, where it belongs. Eventually we can stop including
this file from within pci.h, but lots of code needs to be audited first.
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Make PCI fixup data const, so it'll end up in a r/o section.
This also fixes the conversion into ECOFF which gets broken by too many
changes between r/w and r/o sections. Call it a hack but it's a change
that's correct by itself.
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Run PCI driver initialization on local node
Instead of adding messy kmalloc_node()s everywhere run the
PCI driver probe on the node local to the device.
This would not have helped for IDE, but should for
other more clean drivers that do more initialization in probe().
It won't help for drivers that do most of the work
on first open (like many network drivers)
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Currently rpaphp registers the following bus types as hotplug slots:
1) Actual PCI Hotplug slots
2) Embedded/Internal PCI slots
3) PCI Host Bridges
The second and third bus types are not actually direct parents of
removable adapters. As such, the rpaphp has special case code to fake
results for attributes like power, adapter status, etc. This patch
removes types 2 and 3 from the rpaphp module.
This patch also changes the DLPAR module so that slots can be
DLPAR-added/removed without having been designated as hotplug-capable.
Signed-off-by: John Rose <johnrose@austin.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This patch exports rpaphp_config_pci_adapter() for use by the rpadlpar
module. It also changes this function by removing any dependencies on
struct slot. The patch also changes the RPA DLPAR-add path to enable
newly-added slots in a separate step from that which registers them as
hotplug slots.
Signed-off-by: John Rose <johnrose@austin.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
The rpaphp module currently uses a fragile method to find a pci device
by its device node. This function is unnecessary, so this patch scraps
it.
Signed-off-by: John Rose <johnrose@austin.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
The slot structure in the rpaphp module currently references the PCI
contents of the slot using the PCI device of the parent bridge. This
is unnecessary, since the module is actually interested in the
subordinate bus of the bridge. The dependency on a PCI bridge device
also prohibits the module from registering hotplug slots that have a
root bridge as a parent, since root bridges on PPC64 don't have PCI
devices.
This patch changes struct slot to reference the PCI subsystem using a
pci_bus rather than a pci_dev.
Signed-off-by: John Rose <johnrose@austin.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Currently, rpaphp registers Virtual I/O slots as hotplug slots. The
only purpose of this registration is to ensure that the VIO subsystem
is notified of new VIO buses during DLPAR adds. Similarly, rpaphp
notifies the VIO subsystem when a VIO bus is DLPAR-removed. The rpaphp
module has special case code to fake results for attributes like power,
adapter status, etc.
The VIO register/unregister functions could just as easily be made from
the DLPAR module. This patch moves the VIO registration calls to the
DLPAR module, and removes the VIO fluff from rpaphp altogether.
Signed-off-by: John Rose <johnrose@austin.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Allow PXA platforms to pass an appropriate delay value to the
PXA MCI driver for delaying detection changes.
Signed-Off-By: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Proud member of Uglyhacks'R'US.
Acked-by: David S. Miller <davem@davemloft.net>
Acked-by: Russell King <rmk+lkml@arm.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
mmc_priv() has some nasty effects if the wrong pointer type is
passed to it. Introduce type checking, which also means we get
the right type. Also add an additional member to mmc_host which
is used to align host-private data appropriately.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The changes to ds2433 to add CRC16 protection and read caching.
Signed-off-by: Ben Gardner <bgardner@wabtec.com>
Signed-off-by: Evgeniy Polyakov <johnpol@2ka.mipt.ru>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Add the crc16 routines, as used by w1 devices.
Signed-off-by: Ben Gardner <bgardner@wabtec.com>
Signed-off-by: Evgeniy Polyakov <johnpol@2ka.mipt.ru>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Patch is based on work from Ben Gardner <bgardner@wabtec.com>
Signed-off-by: Evgeniy Polyakov <johnpol@2ka.mipt.ru>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
sending either a skip rom or a rom match.
Patch from Ben Gardner <bgardner@wabtec.com>
Signed-off-by: Evgeniy Polyakov <johnpol@2ka.mipt.ru>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
