This is the second version of the shared interrupt controller patch
for the sh architecture, fixing up handling of intc_reg_fns[].
The three main advantages with this controller over the existing
ones are:
- Both priority (ipr) and bitmap (intc2) registers are
supported
- External pin sense configuration is supported, ie edge
vs level triggered
- CPU/Board specific code maps 1:1 with datasheet for
easy verification
This controller can easily coexist with the current IPR and INTC2
controllers, but the idea is that CPUs/Boards should be moved over
to this controller over time so we have a single code base to
maintain.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch contains two serial port related fixes for sh7722:
- Make sure the irqs for the first serial port is correct
- Add the second and third serial port to the platform data
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Slab destructors were no longer supported after Christoph's
c59def9f22 change. They've been
BUGs for both slab and slub, and slob never supported them
either.
This rips out support for the dtor pointer from kmem_cache_create()
completely and fixes up every single callsite in the kernel (there were
about 224, not including the slab allocator definitions themselves,
or the documentation references).
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
We need to know the CPU ID in order to calculate the mask and ack
registers effectively. Stub this in for UP.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch reworks the ipr code by grouping the offset array together
with the ipr_data structure in a new data structure called ipr_desc.
This new structure also contains the name of the controller in struct
irq_chip. The idea behind putting struct irq_chip in there is that we
can use offsetof() to locate the base addresses in the irq_chip
callbacks. This strategy has much in common with the recently merged
intc2 code.
One logic change has been made - the original ipr code enabled the
interrupts by default but with this patch they are all disabled by
default.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The shared intc2 code currently contains cpu-specific #ifdefs.
This is a tad unclean and it prevents us from using the shared code
to drive board-specific irqs on the se7780 board.
This patch reworks the intc2 code by moving the base addresses of
the intc2 registers into struct intc2_desc. This new structure also
contains the name of the controller in struct irq_chip. The idea
behind putting struct irq_chip in there is that we can use offsetof()
to locate the base addresses in the irq_chip callbacks.
One logic change has been made - the original shared intc2 code
enabled the interrupts by default but with this patch they are all
disabled by default.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
SH-2 can presently get in to some pretty bogus states, so
we tidy up the dependencies a bit and get it all building
again.
This gets us a bit closer to a functional allyesconfig
and allmodconfig, though there are still a few things to
fix up.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This was added during 2.5.x, but was never moved along. This
can easily be resurrected if someone has one they wish to work
with, but it's not worth keeping around in its current form.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds the URAM block on SH7722 as a separate node.
Sparsemem is required for this, or it can simply be disabled
by explicitly selecting a flatmem model.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Now that select no longer works for selecting the "closest" CPU,
we have to explicitly reference the precise sub-type in the few
places where it actually matters (presently only setup code and
some legacy sh-sci cruft).
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
With the SH7722 changes, ->set_rate() also takes an algo_id,
SH4-202 was overlooked when this change went in.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
If CONFIG_KGDB_NMI is disabled, we're left with a stray in_nmi
reference that can't be resolved. Move the symbol under the ifdef,
too.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Several errors were spotted during building for custom config (SMP
included). Although SMP still does not compile (no ipi and
__smp_call_function) and does not work, this looks a bit cleaner.
Some other errors obtained via gcc-4.1.0 build.
Signed-off-by: Evgeniy Polyakov <johnpol@2ka.mipt.ru>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add lost in_nmi definition to solve pcrel too far.
Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This fixes up the master clock multiplier and initial rate
propagation for the SH7722 clocks.
Signed-off-by: dmitry pervushin <dimka@nomadgs.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
- setup-sh7750.c only defines the sh7751_ipr_map when building
with SH7751 support.
- 7722 Solution Engine was missing a mach-type entry, causing
the macro in cf-enabler to be undefined.
- arch/sh/mm/init.c needs linux/pagemap.h.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Many files include the filename at the beginning, serveral used a wrong one.
Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
There are a few different cases for figuring out how to
size the instruction. We read in the instruction located
at regs->pc - 4 when rewinding the opcode to figure out if
there's a 32-bit opcode before the faulting instruction, with
a default of a - 2 adjustment on a mismatch. In practice this
works for the cases where pc - 4 is just another 16-bit opcode,
or we happen to have a 32-bit and a 16-bit immediately
preceeding the pc value.
In the cases where we aren't rewinding, this is much less ugly..
We also don't bother fixing up the places where we're explicitly
dealing with 16-bit instructions, since this might lead to
confusion regarding the encoding size possibilities on other
CPU variants.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
SH-2A supports both 16 and 32-bit instructions, add a simple helper
for figuring out the instruction size in the places where there are
hardcoded 16-bit assumptions.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The only difference between these at the moment are the FPU
exceptions, and these are hidden away under CONFIG_SH_FPU
(which is only set for the SH-4 case anyways..).
This consolidates the two tables, and updates SH-4 to use
the updated copy.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Some fixups for the R7785RP board. Gets iVDR working.
Signed-off-by: Ryusuke Sakato <sakato.ryusuke@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
hp6xx requires some additional IRQs that aren't currently enabled in
the SH7709 setup code. Wire them up.
Signed-off-by: Takashi YOSHII <takashi.yoshii.ze@hitachi.com>
Signed-off-by: Kristoffer Ericson <kristoffer.ericson@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Previously this was done in cpuinfo, but with the number of clocks
growing, it makes more sense to place this in a different proc entry.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This fixes up SH7705 CPU support and the SE7705 board
for some of the recent changes.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.zh@hitachi.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds support for the SH7722 (MobileR) to the clock framework.
Signed-off-by: dmitry pervushin <dimka@nomadgs.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds preliminary support for the SH7785-based Highlander board.
Some of the Highlander support code is reordered so that most of it
can be reused directly.
This also plugs in missing SH7785 checks in the places that need it,
as this is the first board to support the CPU.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
SH7780 has a speculative execution mode where it can speculatively
perform an instruction fetch for subroutine returns, this allows it
to be enabled. There are some various pitfalls associated with this
mode, so it's left as depending on CONFIG_EXPERIMENTAL and not
enabled by default.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
SH-3 and SH-4 were trampling the register, and SH-2 wasn't even
setting it in the first place. This ended up with some rather
broken behaviour in the sysrq show_regs().
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The code for performing the calculation was only in the SH-4 probe
path, move it out to the common path so the other parts get this
right too.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The C99 specification states in section 6.11.5:
The placement of a storage-class specifier other than at the
beginning of the declaration specifiers in a declaration is an
obsolescent feature.
Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
This tidies up some of the rts7751r2d mess and gets it booting
again. Update the defconfig, too.
Signed-off-by: Masayuki Hosokawa <hosokawa@ace-jp.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This ended up causing problems for older parts (particularly ones
using PTEA). Revert this for now, it can be added back in once it's
had some more testing.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
There are a lot of bogus cpu_data-> references that only end up working
for the boot CPU, convert these to current_cpu_data to fixup SMP.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Previously this was implemented using a global cache, cache
this per-CPU instead and bump up the number of context IDs to
match NR_CPUS.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch does the following:
- remove the make_ipr_irq stuff from dma-sh.c and replace it
with a simple channel<->irq mapping table.
- add DMTEx_IRQ constants for sh4 cpus
- fix sh7751 DMAE irq number
The SH7780 uses the same IRQs for DMA as other SH4 types, so
I put the constants on top of the dma.h file.
Other CPU types need to #define their own DMTEx_IRQ contants
in their appropriate header.
Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This converts the lazy dcache handling to the model described in
Documentation/cachetlb.txt and drops the ptep_get_and_clear() hacks
used for the aliasing dcaches on SH-4 and SH7705 in 32kB mode. As a
bonus, this slightly cuts down on the cache flushing frequency.
With that and the PTEA handling out of the way, the update_mmu_cache()
implementations can be consolidated, and we no longer have to worry
about which configuration the cache is in for the SH7705 case.
And finally, explicitly disable the lazy writeback on SMP (SH-4A).
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
There were a few more things that needed fixing up, namely THREAD_SIZE
and the TLB miss handler where certain PTRS_PER_PGD == PTRS_PER_PTE
assumptions were being made.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This fixes up shmin (and SH7706/SH7708) IPR support for some of the
recent API changes.
Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This rips out most of the needlessly complicated sh_bios and kgdb
trap handling, and forces it all through a common fast dispatch path.
As more debug traps are inserted, it's important to keep them in sync
for all of the parts, not just SH-3/4.
As the SH-2 parts are unable to do traps in the >= 0x40 range, we
restrict the debug traps to the 0x30-0x3f range on all parts, and
also bump the kgdb breakpoint trap down in to this range (from 0xff
to 0x3c) so it's possible to use for nommu.
Optionally, this table can be padded out to catch spurious traps for
SH-3/4, but we don't do that yet..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds in support for the BUG() trap on SH-2.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This updates the SH7619 and SH7206 code for the IPR IRQ changes.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Register the RTC resources for the sh775x subtype so that the new
generic RTC support in drivers/rtc/rtc-sh.c will work.
Signed-off-by: Jamie Lenehan <lenehan@twibble.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Replace all uses of kmem_cache_t with struct kmem_cache.
The patch was generated using the following script:
#!/bin/sh
#
# Replace one string by another in all the kernel sources.
#
set -e
for file in `find * -name "*.c" -o -name "*.h"|xargs grep -l $1`; do
quilt add $file
sed -e "1,\$s/$1/$2/g" $file >/tmp/$$
mv /tmp/$$ $file
quilt refresh
done
The script was run like this
sh replace kmem_cache_t "struct kmem_cache"
Signed-off-by: Christoph Lameter <clameter@sgi.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
The following moves the creation of IPR interupts into setup-7750.c
and updates a few other things to make it all work after the "Drop
CPU subtype IRQ headers" commit. It boots and runs fine on my titan
board.
- adds an ipr_idx to the ipr_data and uses a function in the subtype
code to calculate the address of the IPR registers
- adds a function to enable individual interrupt mode for externals
in the subtype code and calls that from the titan board code
instead of doing it directly.
- I changed the shift in the ipr_data to be the actual # of bits to
shift, instead of the numnber / 4 - made it easier to match with
the manual.
Signed-off-by: Jamie Lenehan <lenehan@twibble.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This syncs up the SH clock framework with the linux/clk.h API,
for which there were only some minor changes required, namely
the clk_get() dev_id and subsequent callsites.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The end of the store queue bitmap is miscalculated when searching
for a free range in sq_remap(), missing the PAGE_SHIFT shift that's
done in sq_api_init(). This runs in to workloads where we can scan
beyond the end of the bitmap.
Spotted by Paul Jackson:
http://marc.theaimsgroup.com/?l=linux-kernel&m=116493191224097&w
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
There were a number of places that made evil PAGE_SIZE == 4k
assumptions that ended up breaking when trying to play with
8k and 64k page sizes, this fixes those up.
The most significant change is the way we load THREAD_SIZE,
previously this was done via:
mov #(THREAD_SIZE >> 8), reg
shll8 reg
to avoid a memory access and allow the immediate load. With
a 64k PAGE_SIZE, we're out of range for the immediate load
size without resorting to special instructions available in
later ISAs (movi20s and so on). The "workaround" for this is
to bump up the shift to 10 and insert a shll2, which gives a
bit more flexibility while still being much cheaper than a
memory access.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Handle simple TLB miss faults which can be resolved completely
from the page table in assembler.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Remove the previous saving of fault codes into the thread_struct
as they are never used, and appeared to be inherited from x86.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This fixes up the kernel for gcc4. The existing exception handlers
needed some wrapping for pt_regs access, acessing the registers
via a RELOC_HIDE() pointer.
The strcpy() issues popped up here too, so add -ffreestanding and
kill off the symbol export.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This drops the various IRQ headers that were floating around
and primarily providing hardcoded IRQ definitions for the
various CPU subtypes. This quickly got to be an unmaintainable
mess, made even more evident by the subtle breakage introduced
by the SH-2 and SH-2A changes.
Now that subtypes are able to register IRQ maps directly, just
rip all of the headers out.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
All of the various CPU subtypes currently hardcode TIMER_IRQ,
switch this to a config option in the few places we need this.
This allows further removal of hardcoded IRQ headers..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This splits out common bits from the existing exception handler for
use between SH-2/SH-2A and SH-3/4, and adds support for the SH-2/2A
exceptions.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This implements initial support for the SH7206 (SH-2A) and SH7619
(SH-2) MMU-less CPUs.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The conversion from IPR-IRQ to IRQ-chip resulted in the
ipr data being allocated in a local variable in
make_ipr_irq - breaking anything using IPR interrupts.
This changes all of the callers of make_ipr_irq to
allocate a static structure containing the IPR data which
is then passed to make_ipr_irq. This removes the need for
make_ipr_irq to allocate any additional space for the IPR
information.
Signed-off-by: Jamie Lenehan <lenehan@twibble.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Currently the INTC2 code contains a fixed IRQ table that it
iterates through to set the handler type, we move this in to
the CPU subtype setup code instead and allow for submitting
the table that way.
This drops the ST40 tables, as nothing has been happening
with those processors, while converting the only existing
users to use the new table directly (SH7760 and SH7780).
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
handle_irq_name() and set_irq_chip_and_handler() disappeared,
update for desc->name and set_irq_chip_and_handler_name() use.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
With the recent change ripping out interrupt_table, explicit
padding of the table was missing, causing bad things to happen
when manually inserting handlers in to the table. This problem
particularly showed up in relation to do_fpu_state_restore()
which was inserted quite deeply in to the table and ended up
scribbling over a slab object.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Kill off interrupt_table for all of the CPU subtypes, we now
default in to stepping in to do_IRQ() for _all_ IRQ exceptions
and counting the spurious ones, rather than simply flipping on
the ones we cared about. This and enabling the IRQ by default
automatically has already uncovered a couple of bugs and IRQs
that weren't being caught, as well as some that are being
generated far too often (SCI Tx Data Empty, for example).
The general rationale is to use a marker for interrupt exceptions,
test for it in the handle_exception() path, and skip out to
do_IRQ() if it's found. Everything else follows the same behaviour
of finding the cached EXPEVT value in r2/r2_bank, we just rip out
the INTEVT read from entry.S entirely (except for in the kGDB NMI
case, which is another matter).
Note that while this changes the do_IRQ() semantics regarding r4
handling, they were fundamentally broken anyways (relying entirely
on r2_bank for the cached code). With this, we do the INTEVT read
from do_IRQ() itself (in the CONFIG_CPU_HAS_INTEVT case), or fall
back on r4 for the muxed IRQ number, which should also be closer
to what SH-2 and SH-2A want anyways.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Many files include the filename at the beginning, serveral used a wrong one.
Signed-off-by: Uwe Zeisberger <Uwe_Zeisberger@digi.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Set the SHM alignment at runtime, based off of probed cache desc.
Optimize get_unmapped_area() to only colour align shared mappings.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Figure out the cache desc entry_mask at runtime, and remove
hard-coded assumption about the cacheline size.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This enables support for 4K stacks on SH.
Currently this depends on DEBUG_KERNEL, but likely all boards
will switch to this as the default in the future.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The generic hardirq layer already takes care of a lot of the
appropriate locking and disabling for us, no need to duplicate
it in the handlers..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds support for the aforementioned CPU subtypes, and cleans
up some build issues encountered as a result.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds some simple setup code for most of the CPU subtypes,
primarily simple platform device registration.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This cleans up quite a lot of the PCI mess that we
currently have, and attempts to consolidate the
duplication in the SH7780 and SH7751 PCI controllers.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Rewrite the store queue API for a per-cpu interface in the driver
model. The old miscdevice is dropped, due to TASK_SIZE limitations,
and no one was using it anyways.
Carve up and allocate store queue space with a bitmap, back sq
mapping objects with a slab cache, and let userspace worry about
its own prefetching.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This reworks some of the SH-4 cache handling code to more easily
accomodate newer-style caches (particularly for the > direct-mapped
case), as well as optimizing some of the old code.
Signed-off-by: Richard Curnow <richard.curnow@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
We had quite a bit of whitespace damage, clean most of it up..
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Arthur Othieno <a.othieno@bluewin.ch>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Clean up proc file removal in sq module for superh arch. currently on a
failed module load or on module unload a proc file is left registered which
can cause a random memory execution or oopses if read after unload. This
patch cleans up that deregistration.
Signed-off-by: Neil Horman <nhorman@tuxdriver.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/devfs-2.6: (22 commits)
[PATCH] devfs: Remove it from the feature_removal.txt file
[PATCH] devfs: Last little devfs cleanups throughout the kernel tree.
[PATCH] devfs: Rename TTY_DRIVER_NO_DEVFS to TTY_DRIVER_DYNAMIC_DEV
[PATCH] devfs: Remove the tty_driver devfs_name field as it's no longer needed
[PATCH] devfs: Remove the line_driver devfs_name field as it's no longer needed
[PATCH] devfs: Remove the videodevice devfs_name field as it's no longer needed
[PATCH] devfs: Remove the gendisk devfs_name field as it's no longer needed
[PATCH] devfs: Remove the miscdevice devfs_name field as it's no longer needed
[PATCH] devfs: Remove the devfs_fs_kernel.h file from the tree
[PATCH] devfs: Remove devfs_remove() function from the kernel tree
[PATCH] devfs: Remove devfs_mk_cdev() function from the kernel tree
[PATCH] devfs: Remove devfs_mk_bdev() function from the kernel tree
[PATCH] devfs: Remove devfs_mk_symlink() function from the kernel tree
[PATCH] devfs: Remove devfs_mk_dir() function from the kernel tree
[PATCH] devfs: Remove devfs_*_tape() functions from the kernel tree
[PATCH] devfs: Remove devfs support from the sound subsystem
[PATCH] devfs: Remove devfs support from the ide subsystem.
[PATCH] devfs: Remove devfs support from the serial subsystem
[PATCH] devfs: Remove devfs from the init code
[PATCH] devfs: Remove devfs from the partition code
...
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.
While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.
The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.
This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.
As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.
The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.
We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.
This patch:
rename desc->handler to desc->chip.
Originally i did not want to do this, because it's a big patch. But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.
I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.
So lets get over with this quickly. The conversion was done automatically
via scripts and converts all the code in the kernel.
This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.
[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
The boot cmdline is parsed in parse_early_param() and
parse_args(,unknown_bootoption).
And __setup() is used in obsolete_checksetup().
start_kernel()
-> parse_args()
-> unknown_bootoption()
-> obsolete_checksetup()
If __setup()'s callback (->setup_func()) returns 1 in
obsolete_checksetup(), obsolete_checksetup() thinks a parameter was
handled.
If ->setup_func() returns 0, obsolete_checksetup() tries other
->setup_func(). If all ->setup_func() that matched a parameter returns 0,
a parameter is seted to argv_init[].
Then, when runing /sbin/init or init=app, argv_init[] is passed to the app.
If the app doesn't ignore those arguments, it will warning and exit.
This patch fixes a wrong usage of it, however fixes obvious one only.
Signed-off-by: OGAWA Hirofumi <hirofumi@mail.parknet.co.jp>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Trivial patch updating the voyagergx cchip code to reference a platform device
instead, now that the dma mask is taken care of. Given this, there's no
longer any reason to drag around the SH-bus code, so kill that off entirely.
Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Cc: Greg KH <greg@kroah.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Clean up some of the subtype IRQ definitions for IPR IRQ, and consolidate the
make_ipr_irq() definitions by dropping maskpos. SH-4A was the only thing
interested in the maskpos, and this should be handled through INTC2 rather
than IPR.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Pretty much every subtype does this now anyways, and as we depend on it in a
few places being set to something sensible quite early on, it's better for a
new subtype to simply set a sensible default.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This adds a relatively simplistic clock framework for sh. The initial goal
behind this is to clean up the arch/sh/kernel/time.c mess and to get the CPU
subtype-specific frequency setting and calculation code moved somewhere more
sensible.
This only deals with the core clocks at the moment, though it's trivial for
other drivers to define their own clocks as desired.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Cc: john stultz <johnstul@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This moves the various IRQ controller drivers into a new subdirectory, and
also extends the INTC2 IRQ handler to also deal with SH7760 and SH7780
interrupts, rather than just ST-40.
The old CONFIG_SH_GENERIC has also been removed from the IRQ definitions, as
new ports are expected to be based off of CONFIG_SH_UNKNOWN. Since there are
plenty of incompatible machvecs, CONFIG_SH_GENERIC doesn't make sense anymore.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This extends the current SH DMA API somewhat to support a proper virtual
channel abstraction, and also works to represent this through the driver model
by giving each DMAC its own platform device.
There's also a few other minor changes to support a few new CPU subtypes, and
make TEI generation for the SH DMAC configurable.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Convert the initializers of hw_interrupt_type structures to C99 initializers.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This fixes u32 vs. pm_message_t confusion in remaining places. Fortunately
there's few of them.
Signed-off-by: Pavel Machek <pavel@suse.cz>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
