Commit Graph

925 Commits

Author SHA1 Message Date
Steve Cohen
7bd07a29ac disp: msm: sde: fix-up reg-bus device node parsing logic for rsc
Power handle's interconnect interface assumes all interconnects
contain a reg bus entry, but RSC does not require one. Change
the logic to only report interconnect failure if the reg bus
node exists in the device node.

Change-Id: Ia4b1cfd1c482a9674b6a29d07483e801ac20a67c
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-03-21 16:22:11 -04:00
Steve Cohen
7a5d2d5d00 disp: msm: sde: skip vsync wait during rsc state switch
When switching from CMD to VIDEO or vice-versa, HW no longer
requires a vsync wait in between since the vsyncs will be
synchronized. So skip the wait for HW which supports this
feature.

Change-Id: Ia5823495bc7bfc7d590098775b0a5f4b4347b5ed
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-03-21 16:16:32 -04:00
Steve Cohen
80aa9f9c32 disp: msm: sde: add profiling counters support for RSC
Add support for enabling and reading profiling counters via
debugfs. This change also introduces RSC rev 4 (first rev
supporting profiling counters), enabling all relevant rev 3
features as well.

Change-Id: I0326215b069a37c91072965379b0b4843916ee0a
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-03-21 16:16:32 -04:00
qctecmdr
1fc486ad3e Merge "disp: msm: sde: ctl hw flush ops clean up" 2020-03-21 13:08:07 -07:00
qctecmdr
7e6415ab67 Merge "disp: msm: dsi: fix kw issues in DSI" 2020-03-21 11:05:07 -07:00
qctecmdr
87ad17de0d Merge "disp: msm: add debugbus support for lahaina" 2020-03-21 04:57:18 -07:00
qctecmdr
5aacc34ec6 Merge "disp: msm: sde: add doc for sde_dt_props helpers" 2020-03-21 04:57:18 -07:00
qctecmdr
34b32d77f8 Merge "disp: msm: dsi: disallow backlight update during panel mode switch" 2020-03-20 20:33:23 -07:00
qctecmdr
56d95ba3e2 Merge "disp: msm: sde: add support for spr hw block configuration" 2020-03-20 15:31:25 -07:00
qctecmdr
0bf109883c Merge "drm: msm: sde: Clear SB DMA flag upon sending SB DMA last command" 2020-03-20 12:11:23 -07:00
qctecmdr
c9cbf75095 Merge "disp: msm: update igc last entry to fixed value" 2020-03-20 12:11:23 -07:00
qctecmdr
ce305188eb Merge "include: uapi: add Kbuild entries for msm_hdmi_hdcp_mgr.h" 2020-03-20 08:59:05 -07:00
Prabhanjan Kandula
8120e65f95 disp: msm: sde: add support for spr hw block configuration
This change adds support for programming SPR hw block as per the
client configuration from the respective color property blob.
Currently only reg dma accelerated path is provided.

Change-Id: Ib8559ec2c392be7b69ca43c6364e701fab877a28
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2020-03-19 16:22:40 -07:00
Linux Build Service Account
244be03e47 Merge changes I83462042,I8bf28827,I28482380 into display-kernel.lnx.5.4
* changes:
  disp: hdcp: add driver to handle userspace interactions
  disp: msm: dp: compile MST feature based on display config
  disp: msm: dp: use updated colorimetry and DSC definitions
2020-03-19 10:35:39 -07:00
Gopikrishnaiah Anandan
f853f611b2 disp: msm: update igc last entry to fixed value
Currently driver clients are not setting the last value of the igc
table. As a temporary change setting it to 4095, once user-space changes
are updated will revert the current fix.

Change-Id: Ifd6e62cd9edf3d1f2917079f639e00aa4ea31cf1
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
2020-03-18 20:11:50 -07:00
Satya Rama Aditya Pinapala
196502bc12 disp: msm: sde: setting async cmd wait flag only for DSI
Asynchronous command transfer wait during pre kickoff
is only applicable for DSI. The change ensures that
the flag is set only for DSI connector, otherwise it can
result in memory scribbling for other connectors.

Change-Id: I623f15cf13fcd3ae72f584d5ef8883570a848c93
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-18 15:08:02 -07:00
Christopher Braga
1cefdf74e4 drm: msm: sde: Clear SB DMA flag upon sending SB DMA last command
Previous SB DMA logic was not clearing a "SB DMA active" flag, resulting
in SB DMA incorrectly being flushed every frame. While this logic
matches the DB DMA approach, it is unnecessary and could result in
delayed DB DMA execution.

Update SB DMA logic to clear the "active" flag for the target DSPP
immediately after the SB DMA is flushed.

Change-Id: I3dc0792a50d7dec42cb32bf8cd1e3d0b217cf582
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2020-03-18 13:24:14 -07:00
Lakshmi Narayana Kalavala
7969ca8633 disp: msm: sde: fix gamut block pogramming sequence
Gamut registers have been updated in newer version of dpu where the
bit depth of the registers have been updated. Change programs
the values by adjusting for bit depth changes.

Change-Id: Id8d8dc37aff6854d67855b9aa7644d1ca4ec4e6f
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
2020-03-17 22:47:43 -07:00
Lei Chen
3842597275 disp: msm: dsi: disallow backlight update during panel mode switch
DSI controller and clock will be disabled/enabled during panel mode
switch, so disallow backlight update during panel mode switch to
avoiding DSI exception.

Change-Id: I37e2f3c9aa929555593ffb53950521150ee7698f
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:34:51 -07:00
Neeraj Upadhyay
7d33aeb87e disp: msm: dsi: Fix compilation error with -fno-builtin removed
Fix compilation error observed with -fno-builtin compilation
flag removed.

Change-Id: I07ac73db206fab3a1b648d7b656e002c6d347b3b
Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:34:51 -07:00
Vara Reddy
df28b30edf drm/msm/dsi: update recommended non-embedded mode sequence
Removing dsi soft reset logic while arbitrating transferring
embedded mode and non-embedded dsi commands. This change
follows the recommended sequence for kona.

Change-Id: I05eef0c6cfd671f48fbfdf7cb2cab788e42bb1e5
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:34:51 -07:00
Vara Reddy
294db87b1f drm/msm/dsi: set cmd dma done mask before triggering cmds
Make sure that cmd dma done mask is set before sending
dma commands. This will make sure that we don't timeout
if the refcnt's are not properly handled. Many oem's
have their own customizations around this which maynot
handle the refcnt's correctly.

Change-Id: If7f5ed1fae20b57f6e9147cae2caa3c5097466c9
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:34:51 -07:00
Satya Rama Aditya Pinapala
918f7479dd disp: msm: dsi: do not skip DSI CTRL init for DMS on first frame
For command mode panels, if a dynamic mode switch occurs on
the first frame, the current code skips DSI controller initialization
and registering for error handlers. This causes the software state
to be uninitialized for DSI CTRL, resulting in command transfer
failures and eventual crash. The change ensures that initialization
is complete even if the DMS occurs on first frame.

Change-Id: I83e3336f7c09424b6c7b95826c30b37974ec29ab
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:34:39 -07:00
Lei Chen
64675ef266 disp: msm: dsi: add panel mode restriction for DFPS and RFI
Add this change to ensure that DFPS and RFI happen in the
same panel mode for avoiding unexpected panel mode switch.

Change-Id: I6783b320e73a88e8f75cb83bcce85e50f798b6ab
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:31:41 -07:00
Lei Chen
fda33778de disp: msm: dsi: reject POMS commit with active changed
Reject composition if panel mode switch is requested
during power on/off commits.

Change-Id: I3a5b28fd9f5bd927537824033a1c8dc838366d5b
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:31:35 -07:00
Dhaval Patel
9652f27293 disp: msm: avoid esd check during pm_suspend state
Avoid esd check during pm_suspend state because core
clock enable will fail. This change adds additional
check and also adds the clock enable failure check.

Change-Id: Ie8bfa4f74d323ff15a07fb037675f07ab942f016
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:31:26 -07:00
Lei Chen
8fbd145c74 disp: msm: dsi: update panel mode parsing message for POMS
It should not be an error that panel mode isn't specified
in timing node, so add this change to lower the log level
from error to info.

Change-Id: I49bd1fec1c09697d9829a8e0767dfa3cf2cff512
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:31:12 -07:00
Satya Rama Aditya Pinapala
4a85d3152c disp: msm: dsi: Fix porch calculation issue for constant fps
For constant fps feature, porch is calculated based on supported
clk rates. Currently, data type of local variables used for porch
calculation is u32 which leads to incorrect porch calculation for
higher clk rates. So, update the data type to u64.

Change-Id: I8eb04487d1dcce05989448c0b063e56752af412b
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:31:03 -07:00
Lipsa Rout
10fde7ee16 disp: msm: dsi: Add support for dynamically switch dsi clock
Add changes to support dynamic switching of dsi clock feature for
phy ver 2.0. This helps to avoid RF interference with DSI clock.

Change-Id: I69958d9224665296cc0f272e39dcdfcefbe293d4
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:30:58 -07:00
Aravind Venkateswaran
e84524efd2 disp: msm: dsi: disable DSI cmd tx async wait for video mode
For video mode panels, async wait feature for DCS command
transmission may not always be reliable as additional programming
would be needed to ensure that the DCS commands are correctly scheduled.
Until this feature is properly implemented and validated, disable this
for video mode panels to avoid potential DSI command transfer
failures.

Change-Id: I18c853bc5607cc1cc523b36f6f346b213911c1a9
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:30:53 -07:00
Aravind Venkateswaran
bce44eed47 disp: msm: dsi: add additional validation checks for async cmd wait
Disable DSI command transfer async wait feature for DSI read commands
and the commands sent in non-embedded mode.

CRs-Fixed: 2579259
Change-Id: Ib3b08fbb091711aa4be87400b79d01f0dcc05e71
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:30:46 -07:00
Vara Reddy
81ad4ef407 drm/msm/dsi: fix dsi command dma async race condition
Change will be removing checking and clearing dsi cmd done
interrupt in commit thread and in workqueue context, which
can race with dsi isr, when it tries to clear the interrupt.

Change-Id: I96e7f8dffed1af3cec0c7668ab1729337d4b260e
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:30:32 -07:00
Lipsa Rout
5e09ea2aed disp: msm: dsi: Add support for clk switch with constant FPS
There is lag or lead in the FPS during dynamic clock change,
along with the increment or decrement in clock. So, HFP or
VFP are adjusted to ensure a constant FPS.

Change-Id: I87ba7a185104a0f5f1d13734a7e487e728d6b2c0
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:30:26 -07:00
Lipsa Rout
5644d01f7a disp: msm: dsi: Update dsi byte interface clock calculation
Update dsi byte interface clock as per hardware recommendation.
For Phy ver 2.0 and below: byte intf clk equals to byte clk.
For Phy ver 3.0 and above: byte intf clk equals to byte clk / 2.

Change-Id: Ic3af2e4348403aeacb2e1c73c4dc133db63a51a4
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-17 19:30:09 -07:00
Tatenda Chipeperekwa
9c262723f4 include: uapi: add Kbuild entries for msm_hdmi_hdcp_mgr.h
Add Kbuild entries for msm_hdmi_hdcp_mgr.h to ensure that this
uapi header is copied out from display techpack path for
userspace clients to use after kernel compilation.

Change-Id: I0780a1eb9e85badabc58b172d46c73822c2210e3
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2020-03-17 13:00:55 -07:00
Prabhanjan Kandula
7469563793 disp: msm: sde: install crtc color property for spr programming
This change installs blob property on each crtc for client to program
SPR block configuration based on display panel SPR pattern. Property
installation is conditional only if MDSS hw has SPR block entries.

Change-Id: Ie85423d83b7badc547e75e6eb07ee6b9945f8834
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2020-03-16 22:06:14 -07:00
Prabhanjan Kandula
b3a61a8922 uapi/drm: add data structure for spr block programming
This change defines data structure for user mode program
to configure SPR block of MDSS hw.

Change-Id: Ia4edb5af757541309c50047f4b7476cac8ddd39f
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2020-03-16 22:05:51 -07:00
Prabhanjan Kandula
45af4566d9 disp: msm: dsi: add support for spr enable from panel config
This change parses SPR enable entry from panel device tree and
populates SPR specific information in panel data structure.
Valid entry of SPR pack type is treated as panel requirement
to enable SPR for specified pack type from source end. This change
also populate connector capabilities blob with SPR pack type.

Change-Id: I9d9ab8a990476fba281e12890bf3f7b17a174d79
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2020-03-16 22:04:40 -07:00
Prabhanjan Kandula
89a141df9f disp: msm: sde: add support for mdss spr hw block
This change parses SPR hw block entries from device tree and populate
SPR block as sub block of DSPP block. Change also enables register dump
by registering sub blocks with sde driver register dump routine.

Change-Id: Ic603cd3cc001dddce5dfea61341c166a5fec1682
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2020-03-16 22:04:21 -07:00
Steve Cohen
a75c28266e disp: msm: add debugbus support for lahaina
Update the table with new testpoints added for lahaina.

Change-Id: Ib1253f696e6e670b6dc475cc68a73c8c41ee264b
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-03-16 19:58:57 -04:00
Steve Cohen
7fe084620e disp: msm: sde: use devm_kzalloc for debug dumps
Upstream has added an "enhancement" to the DMA allocator to
reject coherent allocations less than a a full page, so allocate
device managed memory instead of artificially inflating the
buffer sizes. This has the added benefit of having this memory
automatically freed when the module is unloaded, avoiding
possible leaks.

Change-Id: I653f2cd1f06f1a352cd61e36ea8baaf7c30efd98
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-03-16 19:56:33 -04:00
Satya Rama Aditya Pinapala
0f4f0fb0fd disp: msm: dsi: fix kw issues in DSI
Change initializes uninitialized variables and handles null pointer
references in DSI driver.

Change-Id: I24200b4bafc5e0b223d64b1ad66fdebeeea37e99
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-03-16 12:21:14 -07:00
Tatenda Chipeperekwa
d8ccb70157 config: enable DisplayPort compilation
Enable compilation of the DisplayPort driver on Lahaina.

Change-Id: Ie8437c136a2daa0f8119b0a592577e5592ce2142
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2020-03-13 20:26:39 -07:00
Tatenda Chipeperekwa
4571b23507 disp: msm: dp: use the new altmode framework
Use the new altmode framework to receive the connect, disconnect
and attention events.

Change-Id: Ic542525b526e1abd0f153c293bca6e4cdbb6bf0b
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2020-03-13 20:26:39 -07:00
Tatenda Chipeperekwa
37412f5add disp: msm: dp: add support for PLL programming
Add support for PLL programming in the DisplayPort driver.

Change-Id: I4f08a621dcae5d1f54d67bb5c34409249012cc7b
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2020-03-13 20:26:39 -07:00
qctecmdr
b15ed9edec Merge "disp: msm: dsi: fix parsing of display name from boot name" 2020-03-13 13:53:41 -07:00
Tatenda Chipeperekwa
9b75dd6713 disp: hdcp: add driver to handle userspace interactions
Create a new driver to handle sysfs and topology events that are
related to application/userspace layer interactions for HDCP
functionality. In turn, this will create a clear separation from
the HDCP QSEECOM layer that defines the communication mechanism
between the kernel and the TrustZone layers.

This implementation is based on a snapshot of the msm_hdcp
driver as of this commit 10ffbfa2c7e03c09 ("drm/msm/dp: Snapshot
of DP and supporting files") on kernel 4.19 project.

Change-Id: I834620420b8d6a580f1905a2b3250cf4e5b8f293
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2020-03-13 12:21:34 -07:00
qctecmdr
3af9cf96b7 Merge "disp: msm: sde: refactor catalog dspp parsing" 2020-03-12 22:05:29 -07:00
qctecmdr
5d2e2f435f Merge "disp: msm: sde: align timing engine vsync based on panel vsync" 2020-03-12 20:15:59 -07:00
qctecmdr
a27a0cd2c1 Merge "disp: msm: dsi: add check for invalid arguments in DSI clock control" 2020-03-12 18:39:29 -07:00