Commit Graph

1317 Commits

Author SHA1 Message Date
Dhaval Patel
0a6213522e disp: msm: sde: get ctl scheduler status at each vsync
Get controller scheduler status at each vsync to verify
pending frame status.

Change-Id: I01401a57b68828294299977a7be7e796d07c7472
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2019-04-24 13:21:58 -07:00
Dhaval Patel
a702cd897f disp: msm: avoid vsync delay during seamless mode switch
Remove sde rscc vsync wait requirement during seamless
mode switch state transition to reduce the transition
delay. SDE RSCC rev 3.0 only keeps vsync wait requirement
for solver mode disable.

Change-Id: I6119dbb97d47a70eecc9e5d356c648003adfcc29
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2019-04-24 13:17:15 -07:00
Nilaan Gunabalachandran
1dc7985514 disp: msm: sde: Enable lutdma support for QSeed3Lite
By enabling the sspp feature map configuration for qseed3lite,
the existing support for lutdma is used for register writes.
This will reduce the costly AHB based register write.

Change-Id: I49ba374c7317283f867bb737dc7415ea39f17b91
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2019-04-24 15:02:44 -04:00
Veera Sundaram Sankaran
f7110eccc5 disp: msm: set smmu cb domain attached during probe
Set the SMMU context-bank domain_attached flag and
the secure flag appropriately during MDP SMMU
context-bank probe as the mapping/attach is handled
by the SMMU driver during bootup.

Change-Id: I83c7a911d7e0d4986df7cc3e8975b6eb2720cec1
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-04-23 17:43:41 -07:00
Veera Sundaram Sankaran
36bff15d08 disp: msm: sde: update core clk rate during cont-splash
Update the bootloader set core-clk rate to the SDE software
structure when continuous splash is enabled. This will
make sure SDE handles the shift in core-clk rate correctly
when user-mode votes for a different rate with the first
frame.

Change-Id: Ib8e11332578ad154b14793d8ddcfec488be63aef
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-04-23 17:40:36 -07:00
Aravind Venkateswaran
acfd32f1b5 disp: pll: fix flags for DSI and DP PLL clocks
Remove the CLK_GET_RATE_NOCACHE flag from all the DP and DSI
pll clocks. This will eliminate the need to recalculate the
clock rates from HW registers when querying the rates for the
PLL clocks. This will ensure that no unclocked register accesses
are done when these clocks are queried while the display core
is power collapsed.

Change-Id: Ia5e993195cadc2bced32c052bb604e9980ecd4d8
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
2019-04-23 16:54:41 -07:00
Samantha Tran
e2e554bc4d disp: snapshot of offline rotator
This snapshot includes updates to offline rotator and supporting
files. Snapshot was taken from msm-4.14 as of commit 0f8fb25421ff
("cnss2: Add device version to SOC info structure").

Change-Id: I58674ba880de3d8722ed9119bfc2bee34b444917
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2019-04-22 14:04:59 -07:00
Nilaan Gunabalachandran
9b09b9af71 drm/msm/sde: Check for cur_master NULL dereference
Check if cur_master encoder exists before using the variable in
sde encoder. This will avoid possible NULL dereferences.

Change-Id: I003386cba392a0027f7e9e8441fd4671b57b9a03
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2019-04-22 16:35:26 -04:00
Samantha Tran
44d862fb4d disp: msm: sde: set bounds on debugfs core perf input
Previously debugfs nodes for fix_core_ab_vote, fix_core_clk_rate,
and fix_core_ib_vote could be set to any value. This change
will compare fixed values to userspace values and set it to the
maximum of the two to avoid crashes with invalid input.

Change-Id: Iae89279eb1effe3daf8cd0aef5acceb55992ab03
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2019-04-22 13:14:14 -07:00
Satya Rama Aditya Pinapala
bda5e6a968 disp: pll: remove recalculation of vco rate
In continuous splash use cases, the display is enabled in
the boot-loader. During display kernel probe, to enable clocks,
the rate is calculated by reading the hardware registers before 
the corresponding software rate is set. At times when these rates
are nearly equal, the call for set rate never happens. This can
cause abnormal behavior. In this change during hand-off we don't
recalculate the clock rate to ensure the software programs the clock
registers accordingly.

Change-Id: I421c523ffd48a0cb73d7721c6d74c8e68aa6d9a5
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-04-22 10:48:45 -07:00
Steve Cohen
23f392cdc0 disp:msm:sde: ensure HDR properties are updated during HPD
This patch fixes an issue where the HDR connector properties for
external displays were not being updated after a hot-plug event.

Change-Id: I78dbf00a103ab0bd361039eae2bac16ef9372e36
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-04-22 11:39:23 -04:00
Samantha Tran
deb582545e disp: add shmbridge support in sde and rotator
Add support for shmbridge while allocating memory
depending on qtee_shmbridge enabled in sde and
offline rotator.

Change-Id: I6880ce39318e2a880015760c3517f17c4bf23cdd
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2019-04-19 14:45:55 -07:00
Narendra Muppalla
eeaef40ed6 disp: enable display driver code compilation
This change enables display driver compilation from
techpack path and removes stub file from display project.

Change-Id: I766a34d054e09466fddae379813568435327bef6
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2019-04-14 22:23:34 -07:00
Narendra Muppalla
11c9fc4e92 disp: avoid encoder-connector checks with cont-splash
When continuous splash is enabled, connector states
are not properly updated with the encoder associated
with it. This is by design, so avoid all making
such request there by avoiding unnecessary errors
during the bootup. Fix a handful of warnings in
the PLL definition files

Change-Id: I7f08c5ff80ea2a2bfb4b19f2ea13c8f9cbb833e8
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2019-04-14 22:21:13 -07:00
Narendra Muppalla
3709853456 Display drivers kernel project initial snapshot
This change brings msm display driver including sde,
dp, dsi, rotator, dsi pll and dp pll from base 4.19 kernel
project. It is first source code snapshot from base kernel project.

Change-Id: Iec864c064ce5ea04e170f24414c728684002f284
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2019-04-14 22:20:59 -07:00
Narendra Muppalla
da3538d49c Disp: add makefile support for display drivers
This change adds dummy Makefile support to compile
display driver project along with base kernel.

Change-Id: I4fe15e2b358227911d3826e914ccb5eb45bb3d0d
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2019-03-26 17:58:16 -07:00
Git User
3617c157bf Initial empty repository 2019-03-19 02:53:04 -07:00