OSCSET calculation was not correct in case of 44.1KHz
sampling rate.
With small adjustment both 48 and 44.1 KHz calculation
now gives the correct value.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
In repeated playback the FIFOFLUSH bit remained set, and
never has been cleared.
Clear it during the setup phase.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The WM2000 is a low power, high quality handset receiver speaker
driver with Wolfson myZone™ Ambient Noise Cancellation (ANC). It
provides enhanced voice communication quality in a noisy environment
if the handset acoustics are designed appropriately.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
The serial interface (TDM/I2S) for the audio block have been
constantly enabled.
Introduce a new DAPM_SUPPLY for handling the AIF_EN bit, so
the interface is only enabled, when there is a need for it.
For example when only the analog loopback is enabled, there
is no need to keep the serial interface active.
I have added the persons who contributed to the Voice path
of twl4030 codec driver, so they might have the ability
to test this patch, and send an update for the Voice path,
if it is necessary
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Enable the bulk regulators at probe time so we can safely disable them
again when going to suspend without confusing the reference counter.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The module unloading path had several problems:
- it freed up the private structure twice
- it freed up the codec structure, which was allocated as part
of the private structure
- it did not freed up the reg_cache
- it did not unregistered the dais and the codec
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The WM8912 is a DAC only device register compatible with the WM8904
CODEC with ADC portions omitted. Support it within the WM8904 driver
based on the configured I2C device name.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Handle the output PGAs as part of the output powerup since they can
never be powered separately and reorder things so that we remove the
output shorts after both line and headphone outputs have been brought
up, minimising the opportunity for any issues.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
As well as disabling the biases of the CODEC the drop into BIAS_OFF will
also disable all the regulators powering the CODEC, allowing even greater
power savings on appropriately configured systems.
Since the regulator API does not currently provide notification when
regulators are disabled we assume that this always happens when we stop
using the regulators. Once 2.6.34 is merged this code can be optimised
to only sync the cache when power was actually removed.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
While the regulators are disabled we cache all register writes.
Currently we assume that the regulator disable actually takes
effect, after the merge with the regulator tree in 2.6.34 the
regulator API will be able to notify us if the power is actually
removed (due to constraints or regulator sharing it may not be).
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
At the minute the regulators are simply enabled for the entire
lifetime of the device.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
The dependency on MFD_WM8994 rather than I2C went awry.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
The WM8994 is a highly integrated ultra-low power hi-fi audio subsystem
designed for smartphones and other portable devices rich in multimedia
features. It provides advanced digital mixing facilities enabling low
power high quality interconnection of CPU, baseband and other audio
sources through flexible digital and analogue routing, and integrates
a class W headphone driver and stereo class D speaker drivers.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Use a two code correction for optimal performance.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Perform DC servo offset calibration using a series update sequence
rather than startup update sequence, tuning the configuration of the
WM8993 DC servo to make best use of this.
Also introduce currently unused data allowing us to correct for
any systematic errors in the DC servo calibration results and an
alternative startup path for the headphone output which performs
better with some chip revisions. The alternative setup sequence is
enabled for WM8993.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
In case, if OPCLK is not used, and PLL is used for driving the codec, the
choice of PLL output frequency could result in a needlessly imprecise
system clock frequency. Use an iterative process to select a precise
configuration.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
wm8974 and wm8978 codec drivers control DAC and ADC oversampling rates in their
.set_clkdiv() methods, which is wrong, because these are simple boolean
switches and not clock dividers. Move these bits to sound controls. Also remove
manual configuration of the MCLK divider in wm8978, since it is configured
automatically.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Tests showed, that bit 6 of the WM8978_POWER_MANAGEMENT_2 register of wm8978
affects codec clocks. Being useless for suspend / resume, it cannot be used in
bias-level control either. Remove this bit handling.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Commit e9ff5eb2 (Fixing infinite loop in resume path) uses wrong AIC23
register in resume function because of which register writes happen
on some non-existing registers.
Signed-off-by: Anuj Aggarwal <anuj.aggarwal@ti.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Also renames a few things to make volumes and switches match up in
alsamixer.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
The version isn't being updated or used, the kernel revision
tracking is enough.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Change the legacy default register configuration, which left some
internal components on.
Now we have either DAPM, or other ways to control these bits,
so there is no need to enable them by default.
The affected parts:
Disable ADCL and ADCR
Disable ARXL2 and ARXR2 analog PGA (playback)
Disable APLL by default
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The WM8978 codec from Wolfson Microelectronics is very similar to
wm8974, but is stereo and also has some differences in pin configuration
and internal signal routing. This driver is based on wm8974 and takes
the differences into account.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Barry Song <Barry.Song@analog.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Barry Song <Barry.Song@analog.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
tests show frequent suspend/resume(frequent poweroff/on ad1836 internal
components) maybe make ad1836 clock mode wrong sometimes after wakeup.
This patch reset/restore ad1836 clock mode while executing PM, then
ad1836 can always resume to right clock status.
Signed-off-by: Barry Song <21cnbao@gmail.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Remember to free the temporary register-cache.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@kernel.org
This provides a small power saving when audio is inactive.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Add possibility to configure the burst mode BCLK divider through platform
data structure.
The BCLK divider changes the actual speed of the serial bus in burst mode,
which is faster than the sampling frequency of the running stream.
In this way platforms can experiment with the optimal burst speed without
the need to modify the codec driver itself.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The BCLK divider was not configured in case of mode7.
This leads to unpredictable behavior when switching between FIFO modes.
Configure the BCLK divider depending on the fifo_mode (FIFO is in use,
or FIFO bypass).
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Set the prefill number of samples as the same as the lower
threshold in mode7.
In this way the codec will read the same amount of data on
startup and during the running playback.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
For setups with variable MCLKs, the current logic of limiting the
available sampling rates at startup time is not sufficient. We need to
be able to change the setting at a later point, and so the codec must
offer all possible rates until the hw_params are given.
This patches allows that by passing 0 as 'freq' argument to
cs4270_set_dai_sysclk().
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Thomas Weber <weber@corscience.de>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The transmitter supports all sample rates up to 192KHz, so the driver
should not give a limit.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The codec structure initialization statements should be
separated by semicolons.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
tpa6140a2 uses different names for the regulators.
Signed-off-by: Ilkka Koskinen <ilkka.koskinen@nokia.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
We need to set the LRCLK inversion bit to select DSP mode.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Cc: stable@kernel.org
Initialize the glue by calling snd_soc_new_ac97_codec() as is done
in other ASoC AC97 codecs. Fixes an oops caused by dereferencing
uninitialized members in snd_soc_new_pcms().
Run-tested on Au1250.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
