Overriding the whole EH code is a per-transport, not per-host thing.
Move ->eh_strategy_handler to the transport class, same as
->eh_timed_out.
Downside is that scsi_host_alloc can't check for the total lack of EH
anymore, but the transition period from old EH where we needed it is
long gone already.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
MAP tables of ich6 and ich6m are wrong. Depending on port usage,
ata_piix may fail to initialize attached devices.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
SCSI midlayer has moved hostt->eh_timed_out to transport template. As
libata doesn't need full-blown transport support yet, implement
minimal transport for libata. No transport class or whatsoever, just
empty transport template with ->eh_timed_out hook.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Rename PIIX_FLAG_IGN_PRESENT to PIIX_FLAG_IGNORE_PCS as Jeff
requested.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Jeff Garzik <jgarzik@pobox.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Reimplement piix_sata_probe() such that it turns on PCS enable bits on
all avaliable ports and check present bits after a while to determine
device presence. This should help broken BIOSes. After device
presence detection is complete, PCS enable bits of unoccupied bits are
turned off unless the controller supports AHCI (ICH6/7 docs mandate
all enables bits are always set on AHCI capable controllers).
Note that PCS present bits are ignored on 6300ESB as described in the
datasheet. This should fix device detection problems reported with
the controller.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Replace combined mode handling via PIIX_COMB/COMB_PATA_P0 with proper
port map. PIIX now prints port configuration during initialization.
ATA_FLAG_SLAVE_POSS is now turned on for SATA ports only when the
slave device is actually avaliable.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Add PIIX_FLAG_IGN_PRESENT and SCR flags. Thi patch doesn't cause any
functional change. To be used by later init/scr updates.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Make port_info finer-grained. This patch doesn't cause any functional
change. Later init reimplementation will make use of it.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
The previous dev->max_sectors patch made sht->max_sectors meaningless.
Kill all initializations of sht->max_sectors.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
In piix_sata_probe(), mask gets assigned unnecessarily at the
beginning of the function. Kill the assignment.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
This is a merger of libata docs + cleanups from
Martin Waitz <tali@admingilde.org> and me.
From: Randy Dunlap <rdunlap@xenotime.net>
From: Martin Waitz <tali@admingilde.org>
Fix libata kernel-doc comments to match code.
Add some function parameters to kernel-doc.
Fix some typos/spellos.
Put comments in <= 80 columns.
Make one DPRINTK string unique.
Fix sparse cast warnings.
Signed-off-by: Randy Dunlap <rdunlap@xenotime.net>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Unlike their older siblings, ICH6 and 7 use different scheme for MAP
VALUE. This patch makes ata_piix interpret MV properly on ICH6/7.
Pre-ICH6/7
The value of these bits indicate the address range the SATA port
responds to, and whether or not the SATA and IDE functions are
combined.
000 = Non-combined. P0 is primary master. P1 is secondary master.
001 = Non-combined. P0 is secondary master. P1 is primary master.
100 = Combined. P0 is primary master. P1 is primary slave. P-ATA is
2:0 Map Value secondary.
101 = Combined. P0 is primary slave. P1 is primary master. P-ATA is
secondary.
110 = Combined. P-ATA is primary. P0 is secondary master. P1 is
secondary slave.
111 = Combined. P-ATA is primary. P0 is secondary slave. P1 is
secondary master.
ICH6/7
Map Value - R/W. Map Value (MV): The value in the bits below indicate
the address range the SATA ports responds to, and whether or not the
PATA and SATA functions are combined. When in combined mode, the AHCI
memory space is not available and AHCI may not be used.
00 = Non-combined. P0 is primary master, P2 is the primary slave. P1
is secondary master, P3 is the 1:0 secondary slave (desktop
only). P0 is primary master, P2 is the primary slave (mobile
only).
01 = Combined. IDE is primary. P1 is secondary master, P3 is the
secondary slave. (desktop only)
10 = Combined. P0 is primary master. P2 is primary slave. IDE is secondary
11 = Reserved
Signed-off-by: Tejun Heo <htejun@gmail.com>
--
Jeff, without this patch, ata_piix misdetects my ICH7's combined mode,
ending up not applying bridge limits to PX-710SA and configuring IDE
drive on 40-c cable to UDMA/66.
Thanks.
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
This patch adds suspend patch to libata, and ata_piix in particular. For
most low level drivers, they should just need to add the 4 hooks to
work. As I can only test ata_piix, I didn't enable it for more
though.
Suspend support is the single most important feature on a notebook, and
most new notebooks have sata drives. It's quite embarrassing that we
_still_ do not support this. Right now, it's perfectly possible to
suspend the drive in mid-transfer.
Signed-off-by: Jens Axboe <axboe@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Reflect changes in SCSI midlayer and updated to use new
ordered request implementation
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jens Axboe <axboe@suse.de>
Ok lets start with the 'easy' stuff. This includes my research and
summary of chip errata into the new driver so that people can refer to
it when updating ata_piix.
No code changes
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Simple cleanup to eliminate X copies of the pci_enable_intx() function
in libata. Moved ahci.c's pci_intx() to pci.c and use it throughout
libata and msi.c.
Signed-off-by: Brett Russ <russb@emc.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
ICH6 spec defines the PORT_ bits as:
PORT_ENABLED (R/W):
0 = Disabled. The port is in the off state and cannot detect any
devices.
1 = Enabled. The port can transition between the on, partial, and
slumber states and can detect devices.
PORT_PRESENT (R/O)
The status of this bit may change at any time. This bit is cleared
when the port is disabled via PORT_ENABLED. This bit is not cleared upon
surprise removal of a device.
So from a textual view it is not necessary that PORT_PRESENT _must_ be set,
especially if a device detection has to be done anyway. And, in fact, this
is the view that ACER has been taken with its new Laptops (e.g. Travelmate
4150).
And the definition of PORT_ENABLED / PORT_PRESENT is mixed up, btw.
Signed-off-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Jens Axboe <axboe@suse.de>
Cc: Jeff Garzik <jgarzik@pobox.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
- changes license of all code from OSL+GPL to plain ole GPL
- except for NVIDIA, who hasn't yet responded about sata_nv
- copyright holders were already contacted privately
- adds info in each driver about where hardware/protocol docs may be
obtained
- where I have made major contributions, updated copyright dates
This patch adds functionality to check the PCI sub-class code of an
AHCI capable device before disabling AHCI. It fixes a bug where an
ICH7 sata controller is being setup by the BIOS as sub-class 1 (ide)
and the AHCI control registers weren't being initialized, thus causing
an IO error in piix_disable_ahci().
Signed-off-by: Gregory Felix <greg.felix@gmail.com>
