Commit Graph

3200 Commits

Author SHA1 Message Date
Geoff Levand
ef2ac63aef [POWERPC] PS3: Add os-area database routines
Add support for a simple tagged database in the PS3 flash rom
os-area.  The database allows the flash rom os-area to be shared
between a bootloader and installed operating systems.   The
application ps3-flash-util or the library libps3-utils from the
ps3-utils package can be used for userspace database operations.

The latest ps3-utils package is available here:

  git://git.kernel.org/pub/scm/linux/kernel/git/geoff/ps3-utils.git

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-09 21:01:59 +10:00
Geoff Levand
7db19421a9 [POWERPC] PS3: Save os-area params to device tree
Add the PS3 os-area startup params to the device tree.  This allows
a second stage kernel loaded with kexec to use these values.

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-09 21:01:59 +10:00
Geoff Levand
d7b98e3dd8 [POWERPC] PS3: Add os-area rtc_diff set/get routines
Updates for PS3 os-area rtc_diff set/get routines
o Add a new routine ps3_os_area_set_rtc_diff().
o Rename ps3_os_area_rtc_diff() to ps3_os_area_get_rtc_diff().
o Remove static variable rtc_shift with calls to ps3_os_area_get_rtc_diff().

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-09 21:01:58 +10:00
Geoff Levand
418ef2094e [POWERPC] PS3: os-area workqueue processing
Add a workqueue to the PS3 os-area support.  This is needed to
support writing updates to flash memory and to update the /proc
device tree entries from the timer tick interrupt context.

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-09 21:01:58 +10:00
Geoff Levand
01263e88c3 [POWERPC] PS3: Remove unused os-area params
Updates for PS3 os-area startup params
o Remove some unused PS3 os-area startup params from struct saved_params.
o Rename ps3_os_area_init() to ps3_os_area_save_params().
o Zero mirrored header after saving params.

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-09 21:01:57 +10:00
Geoff Levand
ca94297f0c [POWERPC] PS3: Cleanup of os-area.c
Minor cleanup of the PS3 file os-area.c:
 o Correct file text header.
 o Add type names enum os_area_ldr_format, enum os_area_boot_flag,
   enum os_area_ctrl_button.
 o Change struct os_area_header.magic_num type to u8.
 o Add preprocessor macro SECONDS_FROM_1970_TO_2000.

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-09 21:01:57 +10:00
Benjamin Herrenschmidt
d767efe30f [POWERPC] cell: Add Cell memory controller register defs and expose it
This adds definitions for the Cell memory controller registers (at
least some of them) for use by the EDAC driver for ECC error reporting.

It also expose the said MIC as a platform device that can be used
by the EDAC driver to match on.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-09 21:01:56 +10:00
Benjamin Herrenschmidt
eef686a009 [POWERPC] cell: Move cbe_regs.h to include/asm-powerpc/cell-regs.h
The new Cell EDAC driver needs that file, oprofile also does ugly
path tricks to get to it, it's time to move it to asm-powerpc. While
at it, rename it to be consistent with cell-pmu.h (and dashes look
nicer than underscores anyway).

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-09 21:01:56 +10:00
Grant Likely
105c13dd7a [POWERPC] Enable debug info on boot wrapper
Add '-g' to BOOTCFLAGS if CONFIG_DEBUG_INFO is set.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-09 21:01:55 +10:00
Paul Mackerras
6ee0d9f744 [POWERPC] Remove unused old code from powermac setup code
Since bootdevice never gets initialized, it's always NULL, and hence a
whole pile of code in arch/powerpc/platforms/setup.c never gets used.
(This was the code that originally was there so that the automatic
root partition selection mechanism would prefer a rootish-looking
partition on the device that OF loaded the kernel from over a similar
partition on other devices.)

This removes the unused code.

Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2007-10-09 21:01:54 +10:00
Stephen Rothwell
d7418031cf [POWERPC] Remove some more section mismatch warnings
WARNING: vmlinux.o(.text+0x2ff5c): Section mismatch: reference to .init.text:.pmac_find_ide_boot (between '.note_bootable_part' and '.note_scsi_host')

>From holly_defconfig:
WARNING: vmlinux.o(.text+0x164fe): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu')
WARNING: vmlinux.o(.text+0x16506): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu')

>From linkstation_defconfig:
WARNING: vmlinux.o(.text+0x158fe): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu')
WARNING: vmlinux.o(.text+0x15906): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu')

>From mpc7448_hpc2_defconfig:
WARNING: vmlinux.o(.text+0x1583e): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu')
WARNING: vmlinux.o(.text+0x15846): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu')

>From pmac32_defconfig:
WARNING: vmlinux.o(.text+0x154ca): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'note_scsi_host')
WARNING: vmlinux.o(.text+0x154d2): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'note_scsi_host')
WARNING: vmlinux.o(.text+0x1553c): Section mismatch: reference to .init.text:pmac_find_ide_boot (between 'note_bootable_part' and 'note_scsi_host')

>From ppc64_defconfig:
WARNING: vmlinux.o(.text+0x3acdc): Section mismatch: reference to .init.text:.pmac_find_ide_boot (between '.note_bootable_part' and '.note_scsi_host')

>From prpmc2800_defconfig:
WARNING: vmlinux.o(.text+0x1611e): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu')
WARNING: vmlinux.o(.text+0x16126): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu')

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-09 21:00:48 +10:00
Paul Mackerras
84fdde5af1 [POWERPC] Use cache-inhibited large page bit from firmware
Discussions with firmware architects have confirmed that the bit in
the ibm,pa-features property that indicates support for
cache-inhibited large (>= 64kB) page mappings does in fact mean that
the hypervisor allows 64kB mappings to I/O devices.

Thus we can now enable the code that tests that bit and sets our
CPU_FTR_CI_LARGE_PAGE feature bit.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-09 21:00:48 +10:00
Stephen Rothwell
cd6eed3718 [POWERPC] Prepare to remove of_platform_driver name
The name field of of_platform_driver is just copied into the included
device_driver.  By not overriding an already initialised device_driver
name, we can convert the drivers over time to stop using the
of_platform_driver name.

Also we were not copying the owner field from of_platform_driver, so do
the same with it.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-09 21:00:48 +10:00
Stephen Rothwell
7d6524f035 [POWERPC] iSeries: Correct missing newline in printk
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-09 21:00:47 +10:00
Grant Likely
dcccb37e98 [POWERPC] Lite5200: Use comma delimiter format for lists in device tree
DTC now supports "foo","bar" format for lists of strings; use the new
format on the lite5200 device trees.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 13:31:41 -05:00
Peter Korsgaard
082ea86fce [POWERPC] spi: Support non-QE processors
On non-QE processors (mpc831x/mpc834x) the SPI clock is the SoC clock.

Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 09:05:30 -05:00
Anton Vorontsov
803dedb608 [POWERPC] 85xx: mpc85xx_mds - reset UCC ethernet properly
Apart from that the current code doesn't compile it's also
meaningless with regard to the MPC8568E-MDS' BCSR.

This patch used to reset UCCs properly.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:39:07 -05:00
Anton Vorontsov
af6521ea8a [POWERPC] 85xx: mpc8568mds - update dts to be able to use UCCs
1. UCC1's RX_DV pin is 16, not 15;
2. UCC1's phy is at 0x7, not 0x1. Schematics says 0x7, and recent
   u-boot also using 0x7.
3. Use gianfar's (eTSEC) mdio bus. This is hardware default setup.
4. tx-clock should be CLK16 (GE125, PB31);
5. phy-connection-type is RGMII-ID;

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:39:04 -05:00
Anton Vorontsov
321872dcc0 [POWERPC] QE: pario - support for MPC85xx layout
8 bytes padding required to match MPC85xx registers layout.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Reviewed-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:39:01 -05:00
Anton Vorontsov
cccd21027c [POWERPC] QEIC: Implement pluggable handlers, fix MPIC cascading
set_irq_chained_handler overwrites MPIC's handle_irq function
(handle_fasteoi_irq) thus MPIC never gets eoi event from the
cascaded IRQ. This situation hangs MPIC on MPC8568E.

To solve this problem efficiently, QEIC needs pluggable handlers,
specific to the underlaying interrupt controller.

Patch extends qe_ic_init() function to accept low and high interrupt
handlers. To avoid #ifdefs, stack of interrupt handlers specified in
the header file and functions are marked 'static inline', thus
handlers are compiled-in only if actually used (in the board file).
Another option would be to lookup for parent controller and
automatically detect handlers (will waste text size because of
never used handlers, so this option abolished).

qe_ic_init() also changed in regard to support multiplexed high/low
lines as found in MPC8568E-MDS, plus qe_ic_cascade_muxed_mpic()
handler implemented appropriately.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:38:57 -05:00
Anton Vorontsov
55f9ed0f6a [POWERPC] mpc85xx_mds: select QUICC_ENGINE
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:38:54 -05:00
Kumar Gala
e1c1575f83 [POWERPC] 85xx/86xx: refactor RSTCR reset code
On the majority of 85xx & 86xx we have a register that's ability to
assert HRESET_REQ to reset the board.  We refactored that code so it
can be shared between both platforms into fsl_soc.c and removed all
the duplication in each platform directory.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:38:47 -05:00
Kumar Gala
c9438affcb [POWERPC] Use for_each_ matching routinues for pci PHBs
On the Freescale embedded (83xx, 85xx, 86xx) and a few of the discrete
bridges (mpc10x, tsi108) use the new for_each_compatible_node() or
for_each_node_by_type() to provide more exact matching when looking for
PHBs in the device tree.

With the previous code it was possible to match on pci bridges since
we were only matching on device_type.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:38:40 -05:00
Kumar Gala
2fce1225af [POWERPC] FSL: Access PCIe LTSSM register with correct size
The LTSSM register is actual 32-bits wide so we should be doing a
dword access.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:38:37 -05:00
Dale Farnsworth
873553b3d6 [POWERPC] 85xx: Failure with odd memory sizes and CONFIG_HIGHMEM
The CONFIG_FSL_BOOKE mmu setup code fails when CONFIG_HIGHMEM=y
and the 3 fixed TLB entries cannot exactly map the lowmem size.
Each TLB entry can map 4MB, 16MB, 64MB or 256MB, so the failure
is observed when the kernel lowmem size is not equal to the
sum of up to 3 of those values.

Normally, memory is sized in nice numbers, but I observed this
problem while testing a crash dump kernel.  The failure can
also be observed by artificially reducing the kernel's main
memory via the mem= kernel command line parameter.

This commit fixes the problem by setting __initial_memory_limit
in adjust_total_lowmem().

Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:38:34 -05:00
Xianghua Xiao
0e65bfe34c [POWERPC] Add initial MPC8610 HPCD Platform files.
Add basic board support for the MPC8610 HPCD.  This does
not include any support the SoC Display or Audio controllers.

Signed-off-by: Xianghua Xiao <x.xiao@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loelier <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:38:31 -05:00
Jason Jin
61c5d3cde1 [POWERPC] Treat 8610 PCIe host bridge as transparent
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:38:26 -05:00
Xianghua Xiao
53f3945a16 [POWERPC] Add initial MPC8610 HPCD Device Tree Source file.
Signed-off-by: Xianghua Xiao <x.xiao@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:38:23 -05:00
Peter Korsgaard
33799e3379 [POWERPC] spi: Use fsl_spi instead of mpc83xx_spi
According to booting-without-of.txt, compatible should be "fsl_spi" and
mode "cpu" or "qe" for the fsl SPI controllers.

Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:38:17 -05:00
Timur Tabi
6b0b594bb8 [POWERPC] qe: miscellaneous code improvements and fixes to the QE library
This patch makes numerous miscellaneous code improvements to the QE library.

1. Remove struct ucc_common and merge ucc_init_guemr() into ucc_set_type()
   (every caller of ucc_init_guemr() also calls ucc_set_type()).  Modify all
   callers of ucc_set_type() accordingly.

2. Remove the unused enum ucc_pram_initial_offset.

3. Refactor qe_setbrg(), also implement work-around for errata QE_General4.

4. Several printk() calls were missing the terminating \n.

5. Add __iomem where needed, and change u16 to __be16 and u32 to __be32 where
   appropriate.

6. In ucc_slow_init() the RBASE and TBASE registers in the PRAM were programmed
   with the wrong value.

7. Add the protocol type to struct us_info and updated ucc_slow_init() to
   use it, instead of always programming QE_CR_PROTOCOL_UNSPECIFIED.

8. Rename ucc_slow_restart_x() to ucc_slow_restart_tx()

9. Add several macros in qe.h (mostly for slow UCC support, but also to
   standardize some naming convention) and remove several unused macros.

10. Update ucc_geth.c to use the new macros.

11. Add ucc_slow_info.protocol to specify which QE_CR_PROTOCOL_xxx protcol
    to use when initializing the UCC in ucc_slow_init().

12. Rename ucc_slow_pram.rfcr to rbmr and ucc_slow_pram.tfcr to tbmr, since
    these are the real names of the registers.

13. Use the setbits, clrbits, and clrsetbits where appropriate.

14. Refactor ucc_set_qe_mux_rxtx().

15. Remove all instances of 'volatile'.

16. Simplify get_cmxucr_reg();

17. Replace qe_mux.cmxucrX with qe_mux.cmxucr[].

18. Updated struct ucc_geth because struct ucc_fast is not padded any more.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:38:15 -05:00
Kumar Gala
6039680705 [POWERPC] Update .gitignore for new vdso generated files
We now generate vdso[32,64].so.dbg as part of the build so
add them to .gitignore

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:38:12 -05:00
Kumar Gala
86a04d9c85 [POWERPC] Fixup MPC8568 dts
The PCI nodes on the MPC8568 dts didn't get moved up to be sibilings of the
SOC node when we did that clean up for some reason.  Fix that up and some
minor whitespace and adjusting the size of the soc reg property.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:37:58 -05:00
Thomas Renninger
8122c6cea0 [CPUFREQ] move policy's governor initialisation out of low-level drivers into cpufreq core
Signed-off-by: Thomas Renninger <trenn@suse.de>
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Bryan Wu <bryan.wu@analog.com>
Cc: Andi Kleen <ak@suse.de>
Cc: "Luck, Tony" <tony.luck@intel.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: "David S. Miller" <davem@davemloft.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-10-04 18:40:57 -04:00
Anton Vorontsov
6b9c67681b [POWERPC] mpc8568mds.dts: fix PCIe I/O address space location and size
According to u-boot/board/mpc8568mds/init.S:

LAW(Local Access Window) configuration:
2)   0xa000_0000   0xbfff_ffff     PCIe MEM                512MB
4)   0xe280_0000   0xe2ff_ffff     PCIe I/O                8M

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 15:47:28 -05:00
Anton Vorontsov
c0e4eb2d8a [POWERPC] MPC8568E-MDS: add support for ds1374 rtc
MPC8568E-MDS have DS1374 chip on the I2C bus, thus let's use it.
This patch also adds #address-cells and #size-cells to the I2C
controllers nodes.

p.s. DS1374 rtc class driver is in the -mm tree, its name is
rtc-rtc-class-driver-for-the-ds1374.patch.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 15:47:25 -05:00
Anton Vorontsov
da1bb3a0e1 [POWERPC] fsl_soc: fix uninitialized i2c_board_info structure
i2c_board_info used semi-initialized, causing garbage in the
info->flags, and that, in turn, causes various symptoms of i2c
malfunctioning, like PEC mismatches.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 15:47:23 -05:00
Scott Wood
15f8c604a7 [POWERPC] cpm: Describe multi-user ram in its own device node.
The way the current CPM binding describes available multi-user (a.k.a.
dual-ported) RAM doesn't work well when there are multiple free regions,
and it doesn't work at all if the region doesn't begin at the start of
the muram area (as the hardware needs to be programmed with offsets into
this area).  The latter situation can happen with SMC UARTs on CPM2, as its
parameter RAM is relocatable, u-boot puts it at zero, and the kernel doesn't
support moving it.

It is now described with a muram node, similar to QE.  The current CPM
binding is sufficiently recent (i.e. never appeared in an official release)
that compatibility with existing device trees is not an issue.

The code supporting the new binding is shared between cpm1 and cpm2, rather
than remain separated.  QE should be able to use this code as well, once
minor fixes are made to its device trees.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 15:47:05 -05:00
Kumar Gala
3c5df5c26e [POWERPC] Cleaned up whitespace in head_fsl_booke.S
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 11:03:06 -05:00
Peter Korsgaard
0438c28fa4 [POWERPC] fsl_soc: rtc-ds1307 support
Add support for the I2C devices handled by the rtc-ds1307 driver to
of_register_i2c_devices.

Cc: G. Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 11:03:00 -05:00
Peter Korsgaard
210805e219 [POWERPC] fsl_soc: Fix trivial printk typo.
Fix a trivial printk typo in fsl_soc.

Cc: G. Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 11:02:57 -05:00
Scott Wood
5dd57a1308 [POWERPC] 8xx: Move softemu8xx.c from arch/ppc
Previously, Soft_emulate_8xx was called with no implementation, resulting in
build failures whenever building 8xx without math emulation.  The
implementation is copied from arch/ppc to resolve this issue.

However, this sort of minimal emulation is not a very good idea other than
for compatibility with existing userspaces, as it's less efficient than
soft-float and can mislead users into believing they have soft-float.  Thus,
it is made a configurable option, off by default.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 11:02:54 -05:00
Roy Zang
c4e05bc57d [POWERPC] bootwrapper: adds cuboot for MPC7448HPC2 platform
This patch adds cuboot support for MPC7448HPC2 platform.
The cuImage can be used with legacy u-boot without FDT support.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 11:02:50 -05:00
Scott Wood
3611f2ad42 [POWERPC] mpc82xx: Add pq2fads board support.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 11:02:47 -05:00
Scott Wood
e00c5498a2 [POWERPC] mpc82xx: Update mpc8272ads, and factor out PCI and reset.
1. PCI and reset are factored out into pq2.c.  I renamed them from m82xx
to pq2 because they won't work on the Integrated Host Processor line of
82xx chips (i.e. 8240, 8245, and such).

2. The PCI PIC, which is nominally board-specific, is used on multiple
boards, and thus is used into pq2ads-pci-pic.c.

3. The new CPM binding is used.

4. General cleanup.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 11:02:44 -05:00
Scott Wood
11c146cc19 [POWERPC] 8xx/wrapper: Embedded Planet EP88xC support
This board is also resold by Freescale under the names
"QUICCStart MPC885 Evaluation System" and "CWH-PPC-885XN-VE".

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 11:02:40 -05:00
Scott Wood
20906ecea2 [POWERPC] 8xx: mpc885ads cleanup
It now uses the new CPM binding and the generic pin/clock functions, and
has assorted fixes and cleanup.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 11:02:38 -05:00
Scott Wood
96fca1dea8 [POWERPC] Document local bus nodes in the device tree, and update cuboot-pq2.
The localbus node is used to describe devices that are connected via a chip
select or similar mechanism.  The advantages over placing the devices under
the root node are that it can be probed without probing other random things
under the root, and that the description of which chip select a given device
uses can be used to set up mappings if the firmware failed to do so in a
useful manner.

cuboot-pq2 is updated to match the binding; previously, it called itself
chipselect rather than localbus, and used phandle linkage between the
actual bus node and the control node (the current agreement is to simply use
the fully-qualified address of the control registers, and ignore the overlap
with the IMMR node).

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 11:02:34 -05:00
Scott Wood
2d2294ae12 [POWERPC] mpc8272ads: Change references from 82xx_ADS to 8272_ADS.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 11:02:31 -05:00
Scott Wood
d1df447197 [POWERPC] mpc82xx: Rename mpc82xx_ads to mpc8272_ads.
This is just a rename patch; internal references to mpc82xx_ads will be
changed in the next one.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 11:02:27 -05:00
Scott Wood
4ff62e1c7f [POWERPC] mpc82xx: Remove a bunch of cruft that duplicates generic functionality.
m82xx_calibrate_decr(), mpc82xx_ads_show_cpuinfo(), and mpc82xx_halt() do
anything useful beyond what the generic code does.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 11:02:24 -05:00
Scott Wood
7f21f52940 [POWERPC] cpm2: Add cpm2_set_pin().
This provides a generic way for board code to set up CPM pins, rather
than directly poking magic values into registers.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 11:02:18 -05:00
Scott Wood
2652d4ec4a [POWERPC] cpm2: Add SCCs to cpm2_clk_setup(), and cpm2_smc_clk_setup().
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 11:02:14 -05:00
Scott Wood
449012daa9 [POWERPC] cpm2: Infrastructure code cleanup.
Mostly sparse fixes (__iomem annotations, etc); also, cpm2_immr
is used rather than creating many temporary mappings.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-04 11:02:04 -05:00
John Traill
544cdabe64 [POWERPC] 8xx: Set initial memory limit.
The 8xx can only support a max of 8M during early boot (it seems a lot of
8xx boards only have 8M so the bug was never triggered), but the early
allocator isn't aware of this.  The following change makes it able to run
with larger memory.

Signed-off-by: John Traill <john.traill@freescale.com>
Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-03 20:36:36 -05:00
Scott Wood
7401685242 [POWERPC] 8xx: Work around CPU15 erratum.
The CPU15 erratum on MPC8xx chips can cause incorrect code execution
under certain circumstances, where there is a conditional or indirect
branch in the last word of a page, with a target in the last cache line
of the next page.  This patch implements one of the suggested
workarounds, by forcing a TLB miss whenever execution crosses a page
boundary.  This is done by invalidating the pages before and after the
one being loaded into the TLB in the ITLB miss handler.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-03 20:36:36 -05:00
Scott Wood
663edbd264 [POWERPC] 8xx: Add pin and clock setting functions.
These let board code set up pins and clocks without having to
put magic numbers directly into the registers.

The clock function is mostly duplicated from the cpm2 version;
hopefully this stuff can be merged at some point.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-03 20:36:36 -05:00
Scott Wood
fb533d0c5a [POWERPC] 8xx: Infrastructure code cleanup.
1. Keep a global mpc8xx_immr mapping, rather than constantly
creating temporary mappings.
2. Look for new fsl,cpm1 and fsl,cpm1-pic names.
3. Always reset the CPM when not using the udbg console;
this is required in case the firmware initialized a device
that is incompatible with one that the kernel is about to
use.
4. Remove some superfluous casts and header includes.
5. Change a usage of IMAP_ADDR to get_immrbase().
6. Use phys_addr_t, not uint, for dpram_pbase.
7. Various sparse-related fixes, such as __iomem annotations.
8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything
useful beyond the generic cpuinfo handler.
9. Move prototypes for 8xx support functions from board files
to sysdev/commproc.h.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-03 20:36:35 -05:00
Scott Wood
ccf0d68e83 [POWERPC] 8xx: Fix CONFIG_PIN_TLB.
1. Move CONSISTENT_START on 8xx so that it doesn't overlap the IMMR mapping.
2. The wrong register was being loaded into SPRN_MD_RPN.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-03 20:36:35 -05:00
Scott Wood
a94b89a481 [POWERPC] bootwrapper: Use fsl_get_immr() in cuboot-pq2.c.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-03 20:36:35 -05:00
Scott Wood
bbc6fac387 [POWERPC] bootwrapper: Add fsl_get_immr() and 8xx/pq2 clock functions.
fsl_get_immr() uses /soc/ranges to determine the immr.

mpc885_get_clock() transforms a crystal frequency into a system frequency
according to the PLL register settings.

pq2_get_clocks() does the same as the above for the PowerQUICC II,
except that it produces several different clocks.

The mpc8xx/pq2 set_clocks() functions modify common properties in
the device tree based on the given clock data.

The mpc885/pq2 fixup_clocks() functions call get_clocks(), and
pass the results to set_clocks().

Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-03 20:36:35 -05:00
Scott Wood
568091512d [POWERPC] bootwrapper: Support all-in-one PCI nodes in cuboot-pq2.
Consensus was reached to put PCI nodes at the root of the tree (and not
under /soc), but the phandle to a control node was rejected in favor of
simply not worrying about /pci/reg overlapping /soc/ranges.

This updates cuboot-82xx to not look for the phandle.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-03 20:35:43 -05:00
Scott Wood
c374e00e17 [POWERPC] Add early debug console for CPM serial ports.
This code assumes that the ports have been previously set up, with
buffers in DPRAM.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-03 20:35:43 -05:00
Scott Wood
e631ae3b16 [POWERPC] Introduce new CPM device bindings.
This introduces a new device binding for the CPM and other devices on
these boards.  Some of the changes include:

1. Proper namespace scoping for Freescale compatibles and properties.

2. Use compatible rather than things like device_type and model
to determine which particular variant of a device is present.

3. Give the drivers the relevant CPM command word directly, rather than
requiring it to have a lookup table based on device-id, SCC v. SMC, and
CPM version.

4. Specify the CPCR and the usable DPRAM region in the CPM's reg property.

Boards that do not require the legacy bindings should select
CONFIG_PPC_CPM_NEW_BINDING to enable the of_platform CPM devices. Once
all existing boards are converted and tested, the config option can
become default y to prevent new boards from using the old model.  Once
arch/ppc is gone, the config option can be removed altogether.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-03 20:35:43 -05:00
Scott Wood
6d817aa71f [POWERPC] CPM: Change from fsl,brg-frequency to brg/clock-frequency
As suggested by David Gibson, now that we have a separate node
for the baud rate generators, it's better to use the standard
clock-frequency property than a cpm-node-level fsl,brg-frequency
property.

This patch updates existing places where fsl,brg-frequency is
used.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-03 20:35:43 -05:00
Paul Mackerras
26f571d7c9 [PPC] Use cpu setup routines from cpu_setup_44x.S for ARCH=ppc
Commit 8112753bb2 made 44x in
ARCH=powerpc builds use cpu setup routines in cpu_setup_44x.S,
but didn't make a similar change for ARCH=ppc, and consequently
the ARCH=ppc builds fail with undefined symbols (since both use
the same cputable.c).

This fixes it by including cpu_setup_44x.S in the ARCH=ppc builds,
and by taking out the now-redundant FPU initialization in
arch/ppc/kernel/head_44x.S.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-04 11:02:09 +10:00
Grant Likely
be1b4d34e3 [POWERPC] Uartlite: Add macros for register names
Add macros to define register names to improve readability.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-10-03 07:37:03 -05:00
Josh Boyer
267b49a96e [POWERPC] Add treeImage to .gitignore
Tell git to ignore the generated treeImage.* files in arch/powerpc/boot

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-10-03 07:23:16 -05:00
Grant Likely
486ba7e641 [POWERPC] Virtex: Add generic Xilinx Virtex board support
Adds support for generic Xilinx Virtex boards.  Any board which specifies
"xilinx,virtex" in the compatible property will make use of this board
support.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-10-03 07:23:14 -05:00
Grant Likely
4dc9783ea9 [POWERPC] Virtex: add xilinx interrupt controller driver
Adds support for the Xilinx opb-intc interrupt controller

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-10-03 07:23:14 -05:00
Grant Likely
36660cef73 [POWERPC] Virtex: Add Kconfig macros for Xilinx Virtex board support
Add the needed kconfig macros to enable Xilinx Virtex board support

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-10-03 07:23:14 -05:00
Grant Likely
7ddc5f978b [POWERPC] Virtex: Add uartlite bootwrapper driver
Allows the bootwrapper to use the uartlite device for console output.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-10-03 07:23:13 -05:00
Valentine Barshak
340ffd267c [POWERPC] 4xx: 440EPx/GRx incorrect write to DDR SDRAM errata workaround
Add a workaround for PowerPC 440EPx/GRx incorrect write to
DDR SDRAM errata. Data can be written to wrong address
in SDRAM when write pipelining enabled on plb0. We disable
it in the cpu_setup for these processors at early init.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-10-03 07:20:18 -05:00
Valentine Barshak
8112753bb2 [POWERPC] 4xx: Move 440EP(x) FPU setup from head_44x to cpu_setup_4xx
The PowerPC 440EP(x) FPU init is currently done in head_44x
under ifdefs. Since we should support more then one board
in the same kernel, we move FPU initialization code from head_44x
to cpu_setup_44x and add cpu_setup callbacks for 440EP(x).

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-10-03 07:20:17 -05:00
Valentine Barshak
84e3ad5b91 [POWERPC] 4xx: Introduce cpu_setup functionality to 44x platform
This adds cpu_setup functionality for ppc44x platform.
Low level cpu-spefic initialization routines should be
placed in cpu_setup_44x.S and a callback should be
added to cputable. The cpu_setup is invoked
by identify_cpu() function at early init.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-10-03 07:20:17 -05:00
Josh Boyer
2e71cc0d51 [POWERPC] 4xx: Fix Walnut wrapper compile errors
Pass the appropriate -mcpu flag to the treeboot-walnut.o object to prevent
some toolchains from erroring out with unknown opcodes

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-10-03 07:10:55 -05:00
Tony Breeds
1ad749980a [POWERPC] Enable tickless idle and high res timers for powerpc
Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 15:44:34 +10:00
Tony Breeds
d831d0b83f [POWERPC] Implement clockevents driver for powerpc
This registers a clock event structure for the decrementer and turns
on CONFIG_GENERIC_CLOCKEVENTS, which means that we now don't need
most of timer_interrupt(), since the work is done in generic code.
For secondary CPUs, their decrementer clockevent is registered when
the CPU comes up (the generic code automatically removes the
clockevent when the CPU goes down).

Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 15:44:34 +10:00
Paul Mackerras
70f227d884 Merge branch 'linux-2.6' into for-2.6.24 2007-10-03 15:33:17 +10:00
Tony Breeds
a0c7ce9c87 [POWERPC] Fix panic in RTAS code
Some older pSeries machines were panicking in pSeries_log_error
because it was getting called before it was ready.  This is a result
of commit "[POWERPC] pseries: Fix jumbled no_logging flag."
(79c0108d1b).

This fixes it by explicitly enabling RTAS error logging when it has
been initialized, and also makes the code clearer by renaming the
"no_more_logging" variable to "logging_enabled".

Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 15:31:37 +10:00
Linas Vepstas
2d5f565964 [POWERPC] Use alloc_maybe_bootmem() in pcibios_alloc_controller
Use alloc_maybe_bootmem() which wraps the if (mem_init_done)
malloc clause.

Signed-off-by: Linas Vepstas <linas@austin.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 15:31:35 +10:00
Ishizaki Kou
da0bd34e03 [POWERPC] Celleb: update for PCI
This adds support for the PCI bus on Celleb with new "I/O routines
for PowerPC."  External PCI on Celleb must do explicit synchronization
with devices (Bus has no automatic synchronization feature).

Signed-off-by: Kou Ishizaki <Kou.Ishizaki@toshiba.co.jp>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 13:25:28 +10:00
Ishizaki Kou
86de9f5f5e [POWERPC] Celleb: Serial I/O update
This is an update for Serial I/O on Celleb.
  - Detection algorithm has been changed

Signed-off-by: Kou Ishizaki <Kou.Ishizaki@toshiba.co.jp>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 13:25:28 +10:00
Ishizaki Kou
7f2c85777d [POWERPC] Celleb: New HTAB Guest OS Interface on Beat
This changes the Celleb code to work with new Guest OS Interface
to tweak HTAB on Beat. It detects old and new Guest OS Interfaces
automatically.

Signed-off-by: Kou Ishizaki <Kou.Ishizaki@toshiba.co.jp>
Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 13:25:28 +10:00
Ishizaki Kou
b41848031a [POWERPC] Celleb: Support for Power/Reset buttons
This supports Power/Reset buttons on Beat on Celleb.

On Beat, we have an event from Beat if Power button or Reset button
is pressed. This patch catches the event and convert it to a signal
to INIT process by calling ctrl_alt_del() function.

/sbin/inittab have no entry to turn the machine power off so we have
to detect if power button is pressed or not internally in our driver.
This idea is taken from PS3's event handling subsystem.

Signed-off-by: Kou Ishizaki <Kou.Ishizaki@toshiba.co.jp>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 13:25:28 +10:00
Ishizaki Kou
80755b4144 [POWERPC] Celleb: Move pause, kexec_cpu_down to beat.c
This is an update for "Beat on Celleb"
  - Move beat_pause(), beat_kexec_cpu_down() from setup.c to beat.c

Signed-off-by: <Kou.Ishizaki@toshiba.co.jp>
Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 13:25:28 +10:00
Joachim Fenkes
74c9b99d4d [POWERPC] ibmebus: More descriptive error return code in ibmebus_store_probe()
Signed-off-by: Joachim Fenkes <fenkes@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 13:25:28 +10:00
Michael Ellerman
4acb889627 [POWERPC] Update axon_msi to use dcr_host_t.base
Now that dcr_host_t contains the base address, we can use that in the
axon_msi code, rather than storing it separately.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 13:25:28 +10:00
Michael Ellerman
0411a5e233 [POWERPC] Update mpic to use dcr_host_t.base
Now that dcr_host_t contains the base address, we can use that in the mpic
code, rather than storing it separately.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 13:25:27 +10:00
Michael Ellerman
0b94a1eeee [POWERPC] Store the base address in dcr_host_t
In its current form, dcr_map() doesn't remember the base address you passed
it, which means you need to store it somewhere else.  Rather than adding the
base to another struct it seems simpler to store it in the dcr_host_t.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 13:25:27 +10:00
Adrian Bunk
ca786f83a9 [POWERPC] Select proper defconfig for crosscompiles
The trick for finding the right defconfig is neat, but you forgot to
provide an i686_defconfig.  ;-)

More seriously, cross compiling the defconfig is often useful, e.g. for
testing the compilation of patches that touch multiple architectures,
and this patch therefore chooses g5_defconfig if $(CROSS_COMPILE) is
non-empty.

Signed-off-by: Adrian Bunk <bunk@kernel.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Olof Johansson <olof@lixom.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 12:02:44 +10:00
Roland McGrath
8150caad02 [POWERPC] powerpc vDSO: install unstripped copies on disk
This keeps an unstripped copy of the vDSO images built before they are
stripped and embedded in the kernel.  The unstripped copies get installed in
$(MODLIB)/vdso/ by "make install".  These files can be useful when they
contain source-level debugging information.

Signed-off-by: Roland McGrath <roland@redhat.com>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 12:02:43 +10:00
Hugh Dickins
048c8bc90e [POWERPC] ppc64: support CONFIG_DEBUG_PREEMPT
Add CONFIG_DEBUG_PREEMPT support to ppc64: it was useful for testing
get_paca() preemption.  Cheat a little, just use debug_smp_processor_id()
in the debug version of get_paca(): it contains all the right checks and
reporting, though get_paca() doesn't really use smp_processor_id().

Use local_paca for what might have been called __raw_get_paca().
Silence harmless warnings from io.h and lparcfg.c with local_paca -
it is okay for iseries_lparcfg_data to be referencing shared_proc
with preemption enabled: all cpus should show the same value for
shared_proc.

Why do other architectures need TRACE_IRQFLAGS_SUPPORT for DEBUG_PREEMPT?
I don't know, ppc64 appears to get along fine without it.

Signed-off-by: Hugh Dickins <hugh@veritas.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 11:48:44 +10:00
Stephen Rothwell
5669c3cf19 [POWERPC] Limit range of __init_ref_ok somewhat
This patch introduces zalloc_maybe_bootmem and uses it so that we don't
have to mark a whole (largish) routine as __init_ref_ok.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 11:48:44 +10:00
Scott Wood
0de2d82006 [POWERPC] Make instruction dumping work in real mode
On non-book-E, exceptions execute in real mode.  If a fault happens
that leads to a register dump, the kernel currently prints XXXXXXXX
because it doesn't realize that PC is a physical address.

This patch checks whether instruction address translation is turned
on, and if not converts PC into a virtual address.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 11:48:44 +10:00
Arnd Bergmann
3eb523b939 [POWERPC] Fix pci domain detection
The /proc/bus/pci/* files list PCI domain numbers only for
devices that claim to be on a multi-domain system. The check
for this is broken on powerpc, because the buid value is
truncated to 32 bits.

There is at least one machine (IBM QS21) that only uses
the high-order bits of the buid, so the return value
of pci_proc_domain() ends up being always zero, which
makes /proc/bus/pci useless.

Change the logic to always return '1' for a nonzero
buid value.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 11:48:44 +10:00
Roland McGrath
fabca2c0a4 [POWERPC] Add CHECK_FULL_REGS in several places in ptrace code
This restores the CHECK_FULL_REGS sanity check to every place that can
access the nonvolatile GPRs for ptrace.  This is already done for
native-bitwidth PTRACE_PEEKUSR, but was omitted for many other cases
(32-bit ptrace, PTRACE_GETREGS, etc.); I think there may have been more
uniform checks before that were lost in the recent cleanup of GETREGS et al.

Signed-off-by: Roland McGrath <roland@redhat.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 11:48:43 +10:00
Scott Wood
fec6047047 [POWERPC] bootwrapper: Add PlanetCore firmware support
This is a library that board code can use to extract information from the
PlanetCore configuration keys.  PlanetCore is used on various boards from
Embedded Planet.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 11:48:43 +10:00
Scott Wood
27ff35d902 [POWERPC] bootwrapper: Factor out dt_set_mac_address()
This allows callers to set addresses one at a time when that would be more
convenient.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 11:48:43 +10:00
Milton Miller
51a505d73b [POWERPC] boot: Simplify gunzip_finish
Call gunzip_partial to calculate the remaining length and copy the
data to the user buffer.  This makes it shorter and reduces
duplication.

Signed-off-by: Milton Miller <miltonm@bga.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 11:48:43 +10:00
Milton Miller
e47654d016 [POWERPC] boot: Record header bytes in gunzip_start
Record the number of header bytes skipped in the total bytes read field.

This is needed for the initramfs parsing code to find the end of the zip file.

Signed-off-by: Milton Miller <miltonm@bga.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-10-03 11:48:43 +10:00