Commit Graph

1356 Commits

Author SHA1 Message Date
Thomas Bogendoerfer
9815778ae0 [MIPS] RM: Use only phyiscal address for 82596 and 53c710
Use physical address for 82596 and 53c710 base address

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-12 17:41:08 +01:00
Ralf Baechle
0adc327bda [MIPS] Hydrogen3: Remove remaining bits of code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-12 17:41:08 +01:00
Ralf Baechle
3bd3966448 [MIPS] Fix resume for 64K page size on R4000 class processors.
Problem reported by Peter Watkins <pwatkins@sicortex.com> but this is
a different fix.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-12 17:41:05 +01:00
Robert P. J. Day
105b1bca4d [MIPS] PNX8550: Cleanup proc code.
Here's a slightly cleaner way of creating the /proc structure for the
pnx8850.  mostly, it creates a directory with default mode 555, since the
one you're creating is mode 444, which is somewhat unusual for a directory
under /proc.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:07 +01:00
Ralf Baechle
569fb7536e [MIPS] WRPPMC: Fix build.
Using another systems defines is a safe way to get your code broken by
accident when that system is removed.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:06 +01:00
Ralf Baechle
44659f29a0 [MIPS] Yosemite: Fix modpost warnings.
MODPOST vmlinux
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x974): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x980): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x978): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x984): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x98c): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x990): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:06 +01:00
Ralf Baechle
62b396358e [MIPS] SB1: Fix modpost warning.
MODPOST vmlinux
WARNING: arch/mips/mm/built-in.o(.text+0x1978): Section mismatch: reference to .init.text:except_vec2_sb1 (between 'sb1_cache_init' and 'sb1_flush_cache_sigtramp')
WARNING: arch/mips/mm/built-in.o(.text+0x1988): Section mismatch: reference to .init.text:except_vec2_sb1 (between 'sb1_cache_init' and 'sb1_flush_cache_sigtramp')

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:05 +01:00
Ralf Baechle
f2c4b47f26 [MIPS] PNX: Fix modpost warnings.
MODPOST vmlinux
WARNING: arch/mips/philips/pnx8550/common/built-in.o(.text+0xd40): Section mismatch: reference to .init.data: (after 'pnx8550_platform_init')
WARNING: arch/mips/philips/pnx8550/common/built-in.o(.text+0xd44): Section mismatch: reference to .init.data: (after 'pnx8550_platform_init')

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:05 +01:00
Ralf Baechle
070c7b8611 [MIPS] Alchemy: Fix modpost warnings.
MODPOST vmlinux
WARNING: arch/mips/au1000/common/built-in.o(.text+0x1750): Section mismatch: reference to .init.data: (between 'au1xxx_platform_init' and '__fixup_bigphys_addr')
WARNING: arch/mips/au1000/common/built-in.o(.text+0x1754): Section mismatch: reference to .init.data: (between 'au1xxx_platform_init' and '__fixup_bigphys_addr')

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:05 +01:00
Ralf Baechle
46cc84bf41 [MIPS] MIPSsim: Enable MIPSsim virtual network driver.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:05 +01:00
Ralf Baechle
688b3d7208 [MIPS] Delete Ocelot 3 support.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:05 +01:00
Yoichi Yuasa
c99cabf034 [MIPS] remove LASAT Networks platforms support
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:04 +01:00
Atsushi Nemoto
83fd38cabc [MIPS] Add debugfs files to show fpuemu statistics
Export contents of struct mips_fpu_emulator_stats via debugfs.

There is no way to read these statistics for now but they (at least
the "emulated" count) might be sometimes useful for performance tuning
on FPU-less CPUs.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:04 +01:00
Atsushi Nemoto
6312e0ee45 [MIPS] Add some debugfs files to debug unaligned accesses
Currently a number of unaligned instructions is counted but not used.
Add /debug/mips/unaligned_instructions file to show the value.

And add /debug/mips/unaligned_action to control behavior upon an
unaligned access.  Possible actions are:

0: silently fixup the unaligned access.
1: send SIGBUS.
2: dump registers, process name, etc. and fixup.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:04 +01:00
Atsushi Nemoto
2db30150fe [MIPS] rbtx4938: Fix secondary PCIC and glue internal NICs
* Fix pci ops for secondary PCIC
* Do not reserve 1MB for PCI MEM region (leave PCIBIOS_MIN_MEM zero)
* Use platform_device to provide ethernet addresses for internal NICs.
  (background: TX49XX SoCs include PCI NIC (TC35815 compatible)
  connected via its internal PCI bus, but the NIC's PROM interface is
  not connected to SEEPROM.  So we must provide its ethernet address
  by another way.)
* Check return value of early_read_config_word()

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:04 +01:00
Ralf Baechle
295cbf6d63 [MIPS] Move FPU affinity code into separate file.
Gets rid of some of the CONFIG_MIPS_MT_FPAFF #ifdefery.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:04 +01:00
Atsushi Nemoto
5ddcb3c35b [MIPS] Make ioremap() work on TX39/49 special unmapped segment
TX39XX and TX49XX have "reserved" segment in CKSEG3 area.
0xff000000-0xff3fffff on TX49XX and 0xff000000-0xfffeffff on TX39XX
are reserved (unmapped, uncached).  Controllers on these SoCs are
placed in this segment.

This patch add plat_ioremap() and plat_iounmap() to override default
behavior and implement these hooks for TX39/TX49.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:03 +01:00
Atsushi Nemoto
bb33b19ff9 [MIPS] rbtx4938: Update and minimize defconfig
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:03 +01:00
Atsushi Nemoto
f74cf6ff99 [MIPS] rbtx4938: Convert SPI codes to use generic SPI drivers
Use rtc-rs5c348 and at25 spi protocol driver and spi_txx9 spi
controller driver instead of platform dependent codes.

This patch also removes dependencies to old RTC interfaces such as
rtc_mips_get_time, etc.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:03 +01:00
Atsushi Nemoto
3896b05418 [MIPS] rbtx4938: Add generic GPIO support
GPIO 0..15 are for TX4938 PIO pins, GPIO 16..18 are for FPGA-driven
chipselect signals for SPI devices.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:03 +01:00
Thomas Bogendoerfer
06cf5583fd [MIPS] SNI RM updates
- use RTC_CLASS instead of GEN_RTC
- get rid of ds1216 in favour of a RTC_CLASS driver
- use correct console device for older RM400
- use physical addresses for 82596 device
- use 128 byte L1 cache line size (this is needed because most of the
  SNI caches are using 128 L2 cache lines)

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:03 +01:00
Marc St-Jean
68bc00e311 [MIPS] PMC MSP71xx default configuration
Patch to add default configuration for the PMC-Sierra
MSP71xx devices.

Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:03 +01:00
Marc St-Jean
6f95e60acf [MIPS] PMC MSP71xx PCI support
Patch to add PCI support for the PMC-Sierra MSP71xx devices.

Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:03 +01:00
Marc St-Jean
9267a30d1d [MIPS] PMC MSP71xx mips common
Patch to add mips common support for the PMC-Sierra MSP71xx devices.

Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:03 +01:00
Marc St-Jean
35832e26f9 [MIPS] PMC MSP71xx core platform
Patch to add core platform support for the PMC-Sierra MSP71xx devices.

Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:02 +01:00
Songmao Tian
42d226c724 [MIPS] New files for lemote fulong mini-PC support
Signed-off-by: Fuxin Zhang <zhangfx@lemote.com>
Signed-off-by: Songmao Tian <tiansm@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:02 +01:00
Fuxin Zhang
2a21c7300b [MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2
Signed-off-by: Fuxin Zhang <zhangfx@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:02 +01:00
Ralf Baechle
a36920200c [MIPS] Enable support for the userlocal hardware register
Which will cut down the cost of RDHWR $29 which is used to obtain the
TLS pointer and so far being emulated in software down to a single cycle
operation.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:02 +01:00
Ralf Baechle
d223a86154 [MIPS] FP affinity: Coding style cleanups
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:02 +01:00
Ralf Baechle
e7c4782f92 [MIPS] Put an end to <asm/serial.h>'s long and annyoing existence
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:01 +01:00
Franck Bui-Huu
192cca6ef2 [MIPS] Remove Momenco Ocelot C support
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 delete mode 100644 arch/mips/configs/ocelot_c_defconfig
 delete mode 100644 arch/mips/momentum/ocelot_c/Makefile
 delete mode 100644 arch/mips/momentum/ocelot_c/cpci-irq.c
 delete mode 100644 arch/mips/momentum/ocelot_c/dbg_io.c
 delete mode 100644 arch/mips/momentum/ocelot_c/irq.c
 delete mode 100644 arch/mips/momentum/ocelot_c/ocelot_c_fpga.h
 delete mode 100644 arch/mips/momentum/ocelot_c/platform.c
 delete mode 100644 arch/mips/momentum/ocelot_c/prom.c
 delete mode 100644 arch/mips/momentum/ocelot_c/reset.c
 delete mode 100644 arch/mips/momentum/ocelot_c/setup.c
 delete mode 100644 arch/mips/momentum/ocelot_c/uart-irq.c
 delete mode 100644 arch/mips/pci/fixup-ocelot-c.c
 delete mode 100644 arch/mips/pci/pci-ocelot-c.c
2007-07-10 17:33:01 +01:00
Ralf Baechle
cfd2afc0f6 [MIPS] IP32: Remove experimental tag from kconfig.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:00 +01:00
Ralf Baechle
19df0d1169 [MIPS] PCI: Make dev pointer argument of pcibios_map_irq const.
This is to break the code of people who think they are supposed to scribble
into the pci device structure - it's off limits.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:00 +01:00
Yoichi Yuasa
6b5bf50931 [MIPS] EV64120: Remove support
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:00 +01:00
Maciej W. Rozycki
36de48de85 [MIPS] DECstation: Optimised early printk()
This is an optimised implementation of early printk() for the DECstation.  
After the recent conversion to a MIPS-specific generic routine using a 
character-by-character output the performance dropped significantly.  
This change reverts to the previous speed -- even at 9600 bps of the 
serial console the difference is visible with a naked eye; I presume for a 
framebuffer it is even worse (it may depend on exactly which one is used 
though).

 Additionally the change includes a fix for a problem that the old 
implementation had -- the format used would not actually limit the length 
of the string output.  This new implementation uses a local buffer to deal 
with it -- even with this additional copying it is much faster than the 
generic function.

 Plus this driver is registered much earlier than the generic one, 
allowing one to see critical messages, such as one about an incorrect CPU 
setting used, that are produced beforehand. :-)

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:00 +01:00
Maciej W. Rozycki
d388d6853f [MIPS] No I/O ports on the DECstation
There are no I/O ports on the DECstation whatsoever in any configuration 
as neither the CPU nor the peripheral buses used have a concept of such.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:00 +01:00
Atsushi Nemoto
b63e804459 [MIPS] Remove unused watchpoint support and arch/mips/lib-{32,64}
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:59 +01:00
Yoichi Yuasa
c66df567e5 [MIPS] update cobalt_defconfig
Enable Cobalt button support and change ATA driver from BLK_DEV_VIA82CXXX
to PATA_VIA..

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:59 +01:00
Atsushi Nemoto
69ed25b895 [MIPS] Remove unused dump_tlb functions
Remove unused dump_tlb functions and cleanup some includes.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:57 +01:00
Atsushi Nemoto
4becef1d85 [MIPS] Unify dump_tlb
Unify lib-{32,64}/dump_tlb.c into lib/dump_tlb.c and move
lib-32/r3k_dump_tlb.c to lib directory.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:56 +01:00
Ralf Baechle
f6e2373ad6 [MIPS] MIPSsim: Move code away from the other MIPS Inc. BSP code.
It shares no code at all.  While at it also fix up the beginning bitrot.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:56 +01:00
Ralf Baechle
24e9d0b96d [MIPS] Hook for platforms to define cachability of /dev/mem regions
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:56 +01:00
Robert P. J. Day
b3f6df9f21 [MIPS] Transform old-style macros to newer "__noreturn"
Convert old/obsolete NORET_TYPE and ATTRIB_NORET macros to use the
newer standard of "__noreturn" as defined in compiler-gcc.h.

Signed-off-by: Robert P. J. Day <rpjday@mindspring.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:56 +01:00
Ralf Baechle
8f8771a057 [MIPS] SMTC: Use current_cpu_data instead of cpu_data[smp_processor_id]
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:56 +01:00
Florian Fainelli
4ead16819b [MIPS] Add generic GPIO to Au1x00
This patch adds support for the generic GPIO API to Au1x00 boards. It requires
the generic GPIO patch for MIPS boards by Yoichi Yuasa. Now there is a MIPS
target using it, can you queue these patchset for 2.6.22 ? Thank you very
much in advance.

Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:56 +01:00
Yoichi Yuasa
096633358c [MIPS] Add generic GPIO support
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:55 +01:00
Atsushi Nemoto
e48ce6b8df [MIPS] Simplify missing-syscalls for N32 and O32
Use standard missing-syscalls with EXTRA_CFLAGS instead of duplicating
the command.  And move the archprepare rule before the archclean rule.
Suggested by Franck Bui-Huu.  Also add "echo" to show the target ABI.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:55 +01:00
Yoichi Yuasa
d7eb079fc8 [MIPS] Remove unused config entries
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:32:55 +01:00
Ingo Molnar
0437e109e1 sched: zap the migration init / cache-hot balancing code
the SMP load-balancer uses the boot-time migration-cost estimation
code to attempt to improve the quality of balancing. The reason for
this code is that the discrete priority queues do not preserve
the order of scheduling accurately, so the load-balancer skips
tasks that were running on a CPU 'recently'.

this code is fundamental fragile: the boot-time migration cost detector
doesnt really work on systems that had large L3 caches, it caused boot
delays on large systems and the whole cache-hot concept made the
balancing code pretty undeterministic as well.

(and hey, i wrote most of it, so i can say it out loud that it sucks ;-)

under CFS the same purpose of cache affinity can be achieved without
any special cache-hot special-case: tasks are sorted in the 'timeline'
tree and the SMP balancer picks tasks from the left side of the
tree, thus the most cache-cold task is balanced automatically.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2007-07-09 18:51:57 +02:00
Ralf Baechle
4b3e975e4a [MIPS] Fix scheduling latency issue on 24K, 34K and 74K cores
The idle loop goes to sleep using the WAIT instruction if !need_resched().
This has is suffering from from a race condition that if if just after
need_resched has returned 0 an interrupt might set TIF_NEED_RESCHED but
we've just completed the test so go to sleep anyway.  This would be
trivial to fix by just disabling interrupts during that sequence as in:

        local_irq_disable();
        if (!need_resched())
                __asm__("wait");
        local_irq_enable();

but the processor architecture leaves it undefined if a processor calling
WAIT with interrupts disabled will ever restart its pipeline and indeed
some processors have made use of the freedom provided by the architecture
definition.  This has been resolved and the Config7.WII bit indicates that
the use of WAIT is safe on 24K, 24KE and 34K cores.  It also is safe on
74K starting revision 2.1.0 so enable the use of WAIT with interrupts
disabled for 74K based on a c0_prid of at least that.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-06 16:17:11 +01:00