Commit Graph

27 Commits

Author SHA1 Message Date
Mike Frysinger
1ee76d7e16 Blackfin: initial support for ftrace grapher
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-13 07:20:16 -04:00
Mike Frysinger
70f12567ac Blackfin: add support for GENERIC_BUG
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-13 07:20:07 -04:00
Robin Getz
b8d0c778e6 Blackfin: allow scheduler functions to be placed into L1
Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2009-06-12 06:03:44 -04:00
Mike Frysinger
4636b3019a Blackfin arch: add link-time asserts to make sure on-chip regions dont overflow
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2009-03-29 00:47:31 +08:00
Bernd Schmidt
6f985294f7 Blackfin arch: fix bugs in linker script when using upstream binutils
Fix a few problems I discovered when building a kernel with upstream CVS
binutils.

We have to add the NOTES macro to our linker script, since a kernel
built with --build-id is otherwise unable to boot.  Last time NOTES was
added, it broke things, but the definition of the macro has changed not
to rely on parts of the linker script that aren't present on Blackfin.

I also noticed that _l2_lma_start does not point into the kernel image,
but rather somewhere in L1/L2 space, which seems unintended.  Also, when
the L2 section was added to the linker script, the part following it which
computes then length of the init section was not updated.

Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2009-01-07 23:14:39 +08:00
Mike Frysinger
b60705765a Blackfin arch: move out irq related functions
move irq related functions into asm/irq.h and out of the mondo asm/system.h

Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-11-18 17:48:22 +08:00
Graf Yang
46fa5eecec Blackfin arch: SMP supporting patchset: some other misc code
Blackfin dual core BF561 processor can support SMP like features.
https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like

In this patch, we provide SMP extend to some other misc code

Singed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2009-01-07 23:14:39 +08:00
Mike Frysinger
07aa7be570 Blackfin arch: convert L2 defines to be the same as the L1 defines
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-08-13 16:16:11 +08:00
Mike Frysinger
1375204611 Blackfin arch: make sure the BSS and kernel load address are 4 byte aligned
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-08-06 17:10:57 +08:00
Sonic Zhang
262c3825a9 Blackfin arch: Extend sram malloc to handle L2 SRAM.
Extend system call to alloc L2 SRAM in application.
Automatically move following sections to L2 SRAM:
1. kernel built-in l2 attribute section
2. kernel module l2 attribute section
3. elf-fdpic application l2 attribute section

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-07-19 15:42:41 +08:00
Mike Frysinger
bc6e0fa159 [Blackfin] arch: use the same style for missing L1 sections
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-04-24 06:21:25 +08:00
Sonic Zhang
b85b82d980 [Blackfin] arch: fix bug - Section data_l1_cacheline_aligned should be defined in link script of kernel
http://blackfin.uclinux.org/gf/project/uclinux-dist/tracker/?action=TrackerItemEdit&tracker_item_id=3978

Section data_l1_cacheline_aligned should be defined in
link script of kernel, when L1 data sram bank A is not available.

In bf536 with all data cache is enabled, there is no L1 data sram.
Current link script won't define section data_l1.cacheline_aligned in
this case. But, if user select put cacheline_aligned data into l1 sram
in kernel menuconfig, these data will be dropped and access to these
data will trigger data CPLB exception.

Do panic in l1 relocation code as well.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-04-24 06:13:37 +08:00
Bernd Schmidt
9df7a8f622 [Blackfin] arch: remove NOTES from linker script
Since
  r3658 | vapier | 2007-09-12 16:26:11 +0200 (Wed, 12 Sep 2007) | 1 line

  add more common defines for output sections

we've had a new line, NOTES, in our linker script, which causes upstream
binutils to complain about "missing phdr".  Currently the only other arch
that uses NOTES is i386, and the patch which added it also added
PHDRS {
	text PT_LOAD FLAGS(5);	/* R_E */
	data PT_LOAD FLAGS(7);	/* RWE */
	note PT_NOTE FLAGS(0);	/* ___ */
}
and a few other modifications to use ":text" and ":data" to the linker
script.

It seems that we don't need NOTES at all, so just remove it.

Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-03-26 06:39:15 +08:00
Mike Frysinger
8b07a2a1e5 [Blackfin] arch: handle the most common L1 shrinkage case (L1 does not exist for a part) so that any parts labeled for L1 instead get placed into external memory sections
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-02-29 11:57:35 +08:00
Mike Frysinger
b7627acc43 [Blackfin] arch: move the init sections to the end of memory
Move the init sections to the end of memory so that after they
are free, run time memory is all continugous - this should help decrease
memory fragementation.

When doing this, we also pack some of the other sections a little closer
together, to make sure we don't waste memory. To make this happen,
we need to rename the .data.init_task section to .init_task.data, so
it doesn't get picked up by the linker script glob.

Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2008-02-02 15:53:17 +08:00
Sam Ravnborg
01ba2bdc6b all archs: consolidate init and exit sections in vmlinux.lds.h
This patch consolidate all definitions of .init.text, .init.data
and .exit.text, .exit.data section definitions in
the generic vmlinux.lds.h.

This is a preparational patch - alone it does not buy
us much good.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2008-01-28 23:21:17 +01:00
Mike Frysinger
36208059c1 Blackfin arch: reclaim a few bytes from the end of our init section
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-30 12:00:02 +08:00
Mike Frysinger
c11b5776bf Blackfin arch: add more common defines for output sections
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-10-11 00:12:41 +08:00
Mike Frysinger
27d875f2c1 Blackfin arch: vmlinux.lds.S, break up our .init into separate sections
Break up our .init into separate section like all other ports do and
so that we dont mix text and data (causes disassembly headaches as
pointed out by Robin)

Cc: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-08-27 16:08:53 +08:00
Mike Frysinger
fbeb7370b6 Blackfin arch: parse input sections properly when using -ffunction-sections/-fdata-sections
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-08-27 15:02:20 +08:00
Bernd Schmidt
0fa63ad7d1 Blackfin arch: fix bug which unaligns the init thread's stack and causes the current macro to fail.
switch to using proper defines this time (THREAD_SIZE and PAGE_SIZE)
instead of just PAGE_SIZE everywhere

Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-25 10:19:59 +08:00
Mike Frysinger
520473b077 Blackfin arch: use PAGE_SIZE when doing aligns rather than hardcoded values
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-07-12 12:20:20 +08:00
Mike Frysinger
de6a9520d4 Blackfin arch: redo our linker script a bit
- we can start taking advantages of defines in asm-generic/vmlinux.lds.h
 - move our L1 relocated sections into init so it gets freed after relocation

Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-06-11 17:27:05 +08:00
Robin Getz
5716e514ed Blackfin arch: all symbols were offset by 4k, since we didn't have the __text label.
Bug tracker: http://blackfin.uclinux.org/gf/project/uclinux-dist/tracker/?action=TrackerItemEdit&tracker_item_id=3231

Singed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
2007-06-11 15:31:30 +08:00
Sam Ravnborg
ca967258b6 all-archs: consolidate .data section definition in asm-generic
With this consolidation we can now modify the .data
section definition in one spot for all archs.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2007-05-19 09:11:57 +02:00
Sam Ravnborg
7664709b44 all-archs: consolidate .text section definition in asm-generic
Move definition of .text section to asm-generic.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2007-05-19 09:11:57 +02:00
Bryan Wu
1394f03221 blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix!  Tinyboards.

The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc.  (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000.  Since then ADI has put this core into its Blackfin
processor family of devices.  The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set.  It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.

The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf

The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc

This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/

We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel

[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 12:12:58 -07:00