Commit Graph

53 Commits

Author SHA1 Message Date
qctecmdr
3ab9638e45 Merge "disp: msm: add resource caps structure and api changes" 2019-07-12 02:20:32 -07:00
Tatenda Chipeperekwa
c36e7e01be disp: msm: dp: update the connected state during clean up
Update the connected state to false during display clean up. This
will allow subsequent connections to be processed correctly in
the face of disconnect failures due to unresponsive user mode
clients.

Change-Id: If30f5d722bf742060c9d4d2dec2207d7baf27fc2
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2019-07-09 17:42:42 -07:00
Tatenda Chipeperekwa
d532f14537 disp: msm: dp: add timeout state for simulated AUX transfers
Add a new state to indicate timeout failures in simulation mode.
This can be used by test scripts to trigger a retry of the
session.

Change-Id: I9e250ba7d42fcb318698d8456b3acc5b55081abc
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2019-07-09 17:42:42 -07:00
Tatenda Chipeperekwa
d2c24e44e2 disp: msm: dp: disable audio during display clean up
Disable audio for every active panel during display clean
up use cases when the driver times out waiting for the
video path to tear down. This ensures that the audio
subsystem is notified before the clean up shuts down the
timing engine, and also ensures that the audio module
state is correctly updated to indicate that the session
has ended. This change will reduce the likelihood of the
audio subsystem attempting to program DP audio, and also
ensure that the state checks will correctly prevent any
attempts to program audio after the session has ended.

Change-Id: I937f894e80b55164f9700f021d852863aeb18959
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2019-07-09 17:37:52 -07:00
qctecmdr
84fc2163e1 Merge "disp: msm: dp: Improvements to dp mst simulator mode" 2019-07-08 16:05:02 -07:00
Nilaan Gunabalachandran
d92000cdd4 disp: msm: add resource caps structure and api changes
Create a data structure to maintain available hardware resources
and track capabilities. This data structure is used to send
the current available resources and caps information to
connector ops get_mode_info, get_modes and validate_mode to
process the display mode.

Change-Id: If38fc628ee5ab4729821f88c0050ab45375187b8
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2019-07-02 17:34:49 -04:00
qctecmdr
84f87add48 Merge "disp: msm: dp: skip audio notify wait for completion" 2019-06-30 01:14:19 -07:00
qctecmdr
fc92a6d9f6 Merge "disp: msm: dp: Implement dsc slice selection logic based on sink caps" 2019-06-27 09:50:51 -07:00
Zube Molokwu
e23e3e27bf disp: msm: dp: skip audio notify wait for completion
Skip the wait on audio subsystem response in case of external display
connect event.

Change-Id: Id7a0ac48f540f025293717e60c28967b83ad46ee
Signed-off-by: Zube Molokwu <zmolokwu@codeaurora.org>
2019-06-25 18:26:22 -07:00
qctecmdr
6a9e397c73 Merge "disp: msm: dp: add session check for audio register programming" 2019-06-25 18:13:35 -07:00
qctecmdr
3c4d5f3557 Merge "disp: msm: dp: Ensure peak pxl rate does not exceed maximum supported by sink" 2019-06-19 05:21:38 -07:00
qctecmdr
f49f2c2153 Merge "disp: msm: dp: fix the dsc line buf bit depth selection for dp dsc" 2019-06-19 03:51:13 -07:00
qctecmdr
d50b6d456c Merge "disp: msm: dp: fix dsc parameters for 10bpp compression" 2019-06-19 02:21:30 -07:00
Tatenda Chipeperekwa
68f8b1a047 disp: msm: dp: add session check for audio register programming
Add a check to ensure that audio registers are programmed only
when the DP timing engine (audio session) is enabled. This will
reduce the likelihood of un-clocked register access for audio
related operations.

Change-Id: I6fe59cf53dc721b5470ad4cf7d84e8606800a246
CRs-Fixed: 2465406
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2019-06-17 17:06:50 -07:00
Fuad Hossain
33284a9f4c disp: msm: dp: Implement dsc slice selection logic based on sink caps
The dp sink explicitly states the numbers of
slices it can support. When calculating the
number of slices for dsc configuration, ensure
that the sink supports the calculated number of
slices.

If the sink does not support the calculated
number of slices, keep rechecking sink support
for the subsequent slice increment, until we
reach the highest number of slices possible
according to the dp spec. If no compatible
sink slice support is found, do not enable dsc.

CRs-Fixed: 2325207
Change-Id: I485adacd258963cdec9cc52aa041373883ecadc7
Signed-off-by: Fuad Hossain <fhossain@codeaurora.org>
2019-06-17 12:25:44 -04:00
Fuad Hossain
5cb73d66bc disp: msm: dp: fix dsc parameters for 10bpp compression
Add configuration data to handle 10bpp 3:1
compression ratio based on hardware recommended
settings.

CRs-Fixed: 2325207
Change-Id: I7086dc235e0063a79c661fa8cee77d4e47e9c826
Signed-off-by: Fuad Hossain <fhossain@codeaurora.org>
2019-06-13 15:51:19 -04:00
Fuad Hossain
a9028ef4cf disp: msm: dp: Ensure peak pxl rate does not exceed maximum supported by sink
Ensure that the dp dsc peak pxl rate does not
exceed the maximum supported by the sink device.
If the mode's peak pxl rate per slice exceeds the
max, mark the mode as invalid.

CRs-Fixed: 2325207
Change-Id: Ic8904c759b8621c3aff258206599e1994f70e26e
Signed-off-by: Fuad Hossain <fhossain@codeaurora.org>
2019-06-13 15:19:26 -04:00
Fuad Hossain
b706052927 disp: msm: dp: fix the dsc line buf bit depth selection for dp dsc
The line buffer bit depth is used as part of dp
dsc calculations. Read the max supported line buf
bit depth supported by sink, and use that
restriction as part of the dsc calculations.

CRs-Fixed: 2325207
Change-Id: I4c995acad5f484edd1b438bdbf6c145b2d35ee41
Signed-off-by: Fuad Hossain <fhossain@codeaurora.org>
2019-06-13 13:37:44 -04:00
qctecmdr
c396d0bbc1 Merge "disp: msm: dp: force disconnect at simulation mode off" 2019-06-13 00:19:10 -07:00
Tatenda Chipeperekwa
d1fb3ace28 disp: msm: dp: force disconnect at simulation mode off
Force a disconnect if the simulation client disables simulation
before disconnecting from the simulated sink. This ensures that
the driver will not erroneously attempt AUX transactions in
subsequent interactions after simulation is disabled.

Change-Id: Ibc581deafe46753c514bccc70ba5c953c8d49bd8
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2019-06-11 11:36:49 -07:00
Steve Cohen
e8e0c91207 disp: msm: dp: report HDR10+ parameters with other HDR properties
Report the HDR10+ sink capability and payload data when user-space
reads the "hdr" debugfs node. Also add support for reporting HDR
properties for MST sessions via the new "hdr_mst" debugfs node.
Write support for this node was removed since it updated the
connector state in an inconsistent way, therefore HDR updates must
come from the atomic commit.

Change-Id: I58af4042c1b3198eb78fe413728104071cf50caf
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-06-10 12:08:01 -04:00
Fuad Hossain
15bbd57eff disp: msm: dp: Improvements to dp mst simulator mode
Improve dp mst simulator mode by adding support
for up to 8 connectors, the ability to add and
remove ports dynamically, and allowing for
different EDIDs for each connector.

CRs-Fixed: 2459530
Change-Id: I945e3292a7e5150ab7a6bbe0addc4f4f46d58e82
Signed-off-by: Fuad Hossain <fhossain@codeaurora.org>
2019-06-07 15:03:05 -04:00
Ajay Singh Parmar
aa11061eed disp: msm: dp: add 1.4a cts support for link training
Add support for new requirements in 1.4a CTS which need
to try link training 1 on different lane counts and link
rates.

CRs-Fixed: 2458753
Change-Id: I2039822f420a73232df7293afcddd7bee263c7b4
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
2019-06-02 19:02:18 -07:00
Ajay Singh Parmar
91b9fb1222 disp: msm: dp: link training enhancements
Update the link training process along with the AUX
communications during link training as per hardware
recommendations.

Update the pre-emphasis and swing values for active
lanes only instead of all lanes.

During link training, update pre-emphasis and swing
values in hardware first and then update sink.

CRs-Fixed: 2458753
Change-Id: Ie05c9d6508b0c564b194032ae4ebb1bc5550e7b8
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
2019-06-02 19:01:21 -07:00
qctecmdr
2eeed8c7ff Merge "disp: msm: dp: update swing and pre-emp with new hardware settings" 2019-06-01 03:51:15 -07:00
qctecmdr
f0d4d74c9e Merge "disp: msm: dp: add support for lane count reduction" 2019-05-31 13:21:07 -07:00
qctecmdr
9c05197ef9 Merge "disp: msm: sde: use wr_ptr interrupt instead of ctl_start" 2019-05-24 09:38:19 -07:00
Ajay Singh Parmar
de5f4d652e disp: msm: dp: add support for lane count reduction
Add support for lane count reduction as per the new requirements
for DP 1.4a during link training 2.

CRs-Fixed: 2458753
Change-Id: I58c9b6101338e8a1d1b4e3dec80f8fdf2a25ae5b
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
2019-05-23 14:30:37 -07:00
Ajay Singh Parmar
9a54f87c18 disp: msm: dp: update swing and pre-emp with new hardware settings
Update the DP controller and PHY programming according to
the new hardware recommendations.

CRs-Fixed: 2458753
Change-Id: I1bce5915ba6ebbb250cc5c4aac907b0b287eece7
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
2019-05-23 12:54:14 -07:00
Samantha Tran
3be27eafcc disp: msm: snapshot of msm and sde driver
This snapshot ports changes from 4.14 to 4.19 into
the msm and sde layer. Snapshot was taken as of
commit 0f8fb25421ff ("cnss2: Add device version to
SOC info structure").

Change-Id: I59b799a78319c2db6930a2a10bc38976f8c09898
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2019-05-22 13:08:31 -07:00
qctecmdr
1adffe8c6e Merge "disp: msm: dp: use extended DPCD fields to configure dp link rate" 2019-05-21 10:03:56 -07:00
Fuad Hossain
ac1149d273 disp: msm: dp: perform mst phy operations during suspend resume
Perform mst phy operations during suspend/resume
to allow sinks to be in a correct state. A usbpd
api must also be called before and after the phy
operations to allow the system to go into deep
suspend and resume in a timely manner.

CRs-Fixed: 2363921
Change-Id: Ie21ef9b1caf2044e598466373a6059d2a1e5e58c
Signed-off-by: Fuad Hossain <fhossain@codeaurora.org>
2019-05-15 14:39:37 -04:00
qctecmdr
74f328561e Merge "drm/msm/dp: add extra 100ms sleep when MSTM_CTRL is not cleared" 2019-05-11 00:27:58 -07:00
qctecmdr
e8a6afa265 Merge "disp: msm: dp: add operation to free the mst port object" 2019-05-10 22:35:57 -07:00
Xiaowen Wu
162fff1195 drm/msm/dp: add extra 100ms sleep when MSTM_CTRL is not cleared
Add extra sleep between SST and MST mode if MSTM_CTRL is not cleared
at hpd to make sure dongle exit from previous MST state.

CRs-Fixed: 2411911
Change-Id: I5b1785c71a91df95167bf5083e9d752a275872a8
Signed-off-by: Xiaowen Wu <wxiaowen@codeaurora.org>
Signed-off-by: Fuad Hossain <fhossain@codeaurora.org>
2019-05-09 13:26:08 -04:00
Ajay Singh Parmar
76837da1a9 disp: msm: dp: use extended DPCD fields to configure dp link rate
Use the EXTENDED_RECEIVER_CAPABILITY DPCD register fields,
if present, for enabling HBR3 link rate on supported targets.

CRs-Fixed: 2438457
Change-Id: I505d998f31f79162dc290fc47fd9fbba51527982
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
2019-05-08 22:05:27 -07:00
Samantha Tran
d76c3a72ec disp: msm: dp: add operation to free the mst port object
Add a release operation to free the mst port object when
the object refcount becomes zero.

Change-Id: If628e6da7ccf90d334574ed0f627788fb0a1fa2f
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2019-05-08 08:47:44 -07:00
qctecmdr
e683dcbce3 Merge "disp: msm: Ensure clean slate when starting and stopping HDCP" 2019-05-06 21:06:29 -07:00
Christopher Braga
7e9b80092b disp: msm: Ensure clean slate when starting and stopping HDCP
The DP HDCP layer fails to wait on and clear its internal thread
upon an HDCP stop or failure. This can result in use after free
failures if a read or write over aux channel operation is already
queued.

Update the DP HDCP layer to stop and wait on kthread completion
upon HDCP failures, and clear the kthread command queue before
resuming kthread execution. Additionally, ensure the SDE HDCP
worker thread correctly starts and stops execution upon HDCP
enablement and disablement respectively.

Change-Id: I4218d7935f89416b5e5d74afd8f5d22e031b9a38
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2019-05-06 14:56:26 -04:00
qctecmdr
8c8fad0d91 Merge "disp: msm: dp: Update sink sync check to be disabled by default" 2019-05-03 11:36:05 -07:00
qctecmdr
f8090586ac Merge "disp: msm: dp: Avoid double authentication if first is still in progress" 2019-05-03 09:51:06 -07:00
qctecmdr
c0035372e5 Merge "disp: msm: dp: Prevent disconnect from stopping HDCP" 2019-05-03 02:04:49 -07:00
qctecmdr
366772ec9e Merge "disp: msm: dp: fix potential delay to start authentication" 2019-04-29 12:47:57 -07:00
qctecmdr
ea09882191 Merge "disp: msm: hdcp: force encryption for HDCP 1.3 compliance" 2019-04-29 12:20:16 -07:00
Tatenda Chipeperekwa
d113b3292e disp: msm: dp: fix potential delay to start authentication
Start authentication as soon as the stream is successfully powered
on and before the audio notification is sent. This will avoid a
potential delay in starting authentication if the audio subsystem
does not respond to the audio notification.

Change-Id: I83e5746ff521cfe8641f6e2bffd1bed953329a69
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2019-04-25 19:43:31 -07:00
Tatenda Chipeperekwa
bd8fff4f9f disp: msm: hdcp: force encryption for HDCP 1.3 compliance
Force encryption for HDCP 1.3 compliance or HDMI use cases only
since DisplayPort supports dynamic encryption enable.

Change-Id: Ice0f462188e4cc96597a4779a6daca7877e36b6c
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2019-04-25 19:43:31 -07:00
Christopher Braga
78439dfaf7 disp: msm: dp: Update sink sync check to be disabled by default
The DP standard leaves ambiguity to if sink synchronization
will be set before auxiliary protocols such as HDCP are to begin.
Update the dp_display HDCP worker  to check sink sync only if
explicitly instructed to via the new debugfs node 'hdcp_wait_sink_sync'

Change-Id: I4f4d0b14096aa3dc498e47de557de14092d37a58
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2019-04-24 17:42:15 -04:00
Christopher Braga
c24090b2c5 disp: msm: dp: Avoid double authentication if first is still in progress
In scenarios where two streams become active in a short time period, HDCP
authentication may incorrectly be kicked off twice. This occurs due to the
HDCP state machine not indicating when authentication is already in
progress.

Update the dp_dispay HDCP state machine to only transfer to the
authenticating state once authentication has begun.

Change-Id: I38211203afe5127b80353c02072032a56e518900
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2019-04-24 17:42:14 -04:00
Christopher Braga
9b4453096a disp: msm: dp: Prevent disconnect from stopping HDCP
If a DP stream is disconnected when HDCP is not fully authenticated,
authentication may not continue for remaining streams. This occurs
due to the worker thread rescheduling itself on auth fail while
disconnect cancels any pending work.

Update disconnect logic to wait for HDCP authentication to complete
before stream de-registration, and reschedule the HDCP worker if HDCP
did not fully authenticate prior to disconnect.

Change-Id: I0f8934e4f34e4f5a8015587e852131795a3dad21
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2019-04-24 17:42:13 -04:00
Christopher Braga
c828b764c8 disp: msm: dp: Avoid HDCP cleanup during system suspend
Calls to QSEECOM are disallowed when the system is heading
into a suspend to RAM state. Delay all HDCP cleanup until
after resume to ensure HDCP is properly handled.

Change-Id: I7ebf567e50c28d39fc3c99dcb5d571a5d1e8dd93
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2019-04-24 17:42:09 -04:00