Partial update will be disabled while panel operating
mode switch from command to video.
Display validation will be failed once CRTC and connector
ROI state are not the same.
So add this change to get connector roi state even partial
update is disabled.
Change-Id: Iebb1d001c1c11b659141ce301400704c16390ee6
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
When LTM hist disable and LTM queue buffer are both queued to driver
in the same commit, if LTM hist disable call is handled by driver first,
all the LTM hist buffers will be moved to buffer_free list. When LTM
queue buffer call is handled, it will try to add the same buffer
to the buffer_free list again, and cause a list double add error.
This change checks if the buffer is already in the buffer_free list
before adding.
Change-Id: I74debdede551ceacfa2735fdb327a37654ad70f7
Signed-off-by: Ping Li <pingli@codeaurora.org>
This change saves the previous state before moving into the transitional
smmu state, during secure-display/secure-camera usecases. Upon failure
to complete the transition, set smmu state to the previous state.
Previously, smmu state was staying in transitional state.
Change-Id: I1a78ddcf6ac1c7ea66c8c2095cd1a6d6160647a1
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
The DP link layer CTS tests issue continuous DP plug/unplug.
When that happens, sometimes the DP sw state machine is going
into a bad state causing DP blankout. This is happening when
the post_enable call fails and the hpd handling logic in the DP
driver skips sending the disconnect and next subsequent connect
notifications. This change will fix the conditions to correctly
notify the userspace about the DP connection status.
Change-Id: I41310c8c465901eb5e5bd8fdec2038fe3c01e50a
Signed-off-by: Sankeerth Billakanti <sbillaka@codeaurora.org>
ESD check is disabled while switching panel operating mode.
This change enables ESD check after panel operating
mode switch is done.
Change-Id: I421d70d9be4c14107a7b51470801157d28874ffb
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Remove session lock for power state update to improve functionality
for fast hotplug use cases. This allows the controller and aux modules
to be updated asynchronously based on hotplug state. For example,
in disconnected state all aux transactions will be aborted.
Updates to the power state can be done without the session lock
since this path is only exercised during compliance testing.
Change-Id: Ibe175624ef56d9f7b953b9b54928682f1cac906a
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
Clear the scrambler bypass bit while programming test pattern 4
for electrical compliance. This bit is only used for debugging
purposes and must be unset in order to get the correct test pattern
output from the controller.
Change-Id: If54ba17dc5bdd096899cf57cc4f276aab1837308
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
Update dynamic dsi clock sequence for 7nm pll, change the register
which is used to store pre-cal code.
Change-Id: I0cd700f65a1dca965372adbda83416dfbbddd60f
Signed-off-by: Bruce Hoo <bingchua@codeaurora.org>
There is an audio turn off timeout error whenever DP handles
the link state toggling requests from sink during audio
playback session. The audio hw is waiting for DMA write done
interrupts before issuing a audio session tear down. As the
DP controller is put into reset before link training, the
DMA write done is not sent by the DP controller hence causing
audio timeout errors. These changes turn off audio before the
DP controller is put into reset so that the audio session
tear down takes place within the stipulated time.
Change-Id: I7b88d0385a84f308d8537c2766e6fbc25a2ddc3b
Signed-off-by: RAJAT GUPTA <rajatgu@codeaurora.org>
Add check for length of debugfs_ctrl value before
copying to user buffer invoked during read operation.
Change-Id: I199110992921d0ae3791129fa0bf1e51dcca9107
Signed-off-by: Prashant Singh <prasin@codeaurora.org>
Add reg bus vote separate for RSC on top of the SDE
driver vote during the pm_runtime suspend/resume
events to avoid register access issues.
Change-Id: Ifbaead747b7b10db107696c8cce8e1ecfae5e0f8
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2 Frames transfer pending is possible with posted start.
One ongoing frame and another triggered frame. Current SW
waits for pp_done interrupt if pending frame count is greater
than 1. It is possible that interrupt may be missed for ongoing
frame. In that case, SW should run pp_done wait for one by one
frame instead of two frames together. It allows encoder to
check the ctl scheduler status and trigger the frame done
event on time.
Change-Id: I4817842292d96747890ee70da8a5bdf9b56816ed
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Use one level lower test pattern in case the current
test pattern fails to train link. This helps with few
monitors which sometimes fail with a selected test
pattern. Instead of failing the link, try with a lower
test pattern.
CRs-Fixed: 2507729
Change-Id: I394253398f49b03084dc547dacaededa49a9c527
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
This change will acquire the proper lock before calling
put_iova and release the lock on return.
Change-Id: I04334597018a6041eab0107660b2d441f8e3cc92
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Add check for max controller count while iterating through
display ctrl structure to avoid out of bounds access.
Change-Id: If4d32c648e7d34591726286226600a92a357479a
Signed-off-by: Vishnuvardhan Prodduturi <vproddut@codeaurora.org>
Attempts by virtual planes to set IGC and 3D LUT values are unsupported
and will result in LUTDMA hangs. Update virtual DRM planes capabilities
to disallow these features and make any attempts to set them a NOP.
Change-Id: I50eee7e981208ba53dfae833ab53b8fd0e5cda4e
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
Currently LUTDMA kickoff is immediately followed by CTL flush,
immaterial of the LUTDMA DONE status in command mode. If LUTDMA
kickoff happens too close to the read_ptr in auto-refresh case, it might
cause a race condition between LUTDMA & CTL flush, due to a HW issue.
Serialize LUTDMA & CTL flush by making the LUTDMA kickoff as blocking
to avoid the race condition in auto-refresh case similar to video mode.
Change-Id: I4f4ae90a2c4f1bc8a0686d8fd4f8aa439123c531
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
Correct the splash resource allocation counter for getting ctl
ids as passed from uefi for dual-display usecase for successful
splash-handoff.
Change-Id: Iffb6649073443e3c319077318e009b910ea53416
Signed-off-by: Prashant Singh <prasin@codeaurora.org>
Handle release fence/frame-done error signalling for
error case like esd failure, pp_done timeout, interrupt
disable on cpu, etc. It fixes the race condition for
pending_frame count update and also triggers correct
wait function for wr_ptr wait failure.
Change-Id: Iad08f20592c97221a1626bb40e607c398a9812b6
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Minimum threshold time is sum of panel jitter time, prefill lines time
and buffer time of 100usec. For panels with high jitter, we can cross the
default threshold time. Update the calculation to accommodate high jitter
panels in calculating dsi clocks.
Change-Id: I93163a07c7d0b51eb3704609b4efed6c1e277761
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Initialization of DSI external bridge must be done within
the initialization of DSI displays. The current method
has the drm_ext_bridge_init being called outside the
loop of DSI displays, and it will fail as the display,
encoder and connector handle are not present.
This fixes the regresion caused by
commit edef6ae040 ("disp: msm: dsi: snapshot of dsi from
4.14 to 4.19").
Change-Id: I50d0a303c2c8f4323e46cf14df1b071ebae80ceb
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
DP debug module is run by external script for automation testing.
DP aux and debug modules operate on shared buffers. In some race
conditions, aux and debug module can go out of sync resulting in
automation failures. Lock the buffers to make sure there are no
race conditions.
Change-Id: If0ae370c22cf035f3177666bd714221d6b3cd56e
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Currently, for every DP hardware register read/write, there
is a string comparison to determine the execution mode. This
adds up an extra delay while powering up/down which does a
large number of register reads and writes. During stress
testing and automation, this can cause an issue resulting
in failures. Remove the unnecessary delays by using common
APIs for register reads and writes. Switch these APIs only
in case of execution mode change.
Change-Id: I9403873a29b3466c606297b2aa386d0885bb2dc7
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Change HBR and RBR voltage swing level for 600mV-3.6db
settings on lito/kona as per hardware specification in
dp phy hpg.
Change-Id: If86bf158fb8b538d7ea31364a757584201d5f1c3
Signed-off-by: RAJAT GUPTA <rajatgu@codeaurora.org>
Fix the default value of post PPS command delay to zero, if
it is not specified as a panel device tree property.
Change-Id: I9aa972839d8be0620036595ac2514290cc6cf697
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
