This is the minimal patch to fix endian mismatches. These are
probably bugs on big-endian arches, noops on little endian.
jme_rxsum_ok could be improved to directly take a __le16 and
change all of the masks/sets to be in little-endian, but
has not been done here to keep the patch small.
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2.6.27-git2 kernel build fails with allyesconfig on powerpc with
build error
<introduced by commit 01f2e4ead2c51226ed1283ef6a8388ca6f4cff8f>
CC drivers/net/enic/enic_main.o
drivers/net/enic/enic_main.c: In function âenic_queue_wq_skb_tsoâ:
drivers/net/enic/enic_main.c:576: error: implicit declaration of function âcsum_ipv6_magicâ
make[3]: *** [drivers/net/enic/enic_main.o] Error 1
<introduced by commit c4e84bde1d595d857d3c74b49b9c45cc770df792>
drivers/net/qlge/qlge_main.c: In function âql_tsoâ:
drivers/net/qlge/qlge_main.c:1862: error: implicit declaration of function âcsum_ipv6_magicâ
make[3]: *** [drivers/net/qlge/qlge_main.o] Error 1
<introduced by commit 95252236e73e789dd186ce796a2abc60b3a61ebe>
drivers/net/jme.c: In function âjme_tx_tsoâ:
drivers/net/jme.c:1784: error: implicit declaration of function âcsum_ipv6_magicâ
make[2]: *** [drivers/net/jme.o] Error 1
Signed-off-by: Kamalesh Babulal <kamalesh@linux.vnet.ibm.com>
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The file(s) below do not use LINUX_VERSION_CODE nor KERNEL_VERSION.
drivers/net/jme.c
This patch removes the said #include <version.h>.
Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/jme.c:1598: warning: ‘jme_set_100m_half’ defined but not used
drivers/net/jme.c:1618: warning: ‘jme_wait_link’ defined but not used
Signed-off-by: David S. Miller <davem@davemloft.net>
Fix IRQ handle bug when interrupt mode.
The driver was incorrectly handled and returned IRQ_HANDLED
while the device is not generating the interrupt.
It happened due to faulty determination of interrupt status register.
Found by: "Ethan" <ethanhsiao@jmicron.com>
Fixed by: "akeemting" <akeem@jmicron.com>
Signed-off-by: Guo-Fu Tseng <cooldavid@cooldavid.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
1. Set bit 5 of GPREG1 to 1 to enable hardware workaround for half-duplex
mode. Which the MAC processor generates CRS/COL by itself instead of
receive it from PHY processor.
2. Set bit 6 of GPREG1 to 1 to enable hardware workaround that masks the
MAC processor working right while calculating IPv6 RSS in 10/100
mode.
3. Group the workaround codes all together.
Signed-off-by: Guo-Fu Tseng <cooldavid@cooldavid.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
