Commit Graph

5 Commits

Author SHA1 Message Date
Ingo Molnar
10cd5a1e54 x86: clean up cpu capabilities accesses, transmeta.c
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17 17:40:51 +02:00
Paolo Ciarrocchi
f975182719 x86: coding style fixes to arch/x86/kernel/cpu/transmeta.c
Before:
   total: 13 errors, 3 warnings, 105 lines checked
After:
   total: 0 errors, 3 warnings, 107 lines checked

No code changed:

arch/x86/kernel/cpu/transmeta.o:

   text	   data	    bss	    dec	    hex	filename
    713	    324	      0	   1037	    40d	transmeta.o.before
    713	    324	      0	   1037	    40d	transmeta.o.after

md5:
   19abe2cafac617e1e2aadc4aa4e9923b  transmeta.o.before.asm
   19abe2cafac617e1e2aadc4aa4e9923b  transmeta.o.after.asm

Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17 17:40:50 +02:00
Thomas Petazzoni
03ae5768b6 x86: use ELF section to list CPU vendor specific code
Replace the hardcoded list of initialization functions for each CPU
vendor by a list in an ELF section, which is read at initialization in
arch/x86/kernel/cpu/cpu.c to fill the cpu_devs[] array. The ELF
section, named .x86cpuvendor.init, is reclaimed after boot, and
contains entries of type "struct cpu_vendor_dev" which associates a
vendor number with a pointer to a "struct cpu_dev" structure.

This first modification allows to remove all the VENDOR_init_cpu()
functions.

This patch also removes the hardcoded calls to early_init_amd() and
early_init_intel(). Instead, we add a "c_early_init" member to the
cpu_dev structure, which is then called if not NULL by the generic CPU
initialization code. Unfortunately, in early_cpu_detect(), this_cpu is
not yet set, so we have to use the cpu_devs[] array directly.

This patch is part of the Linux Tiny project, and is needed for
further patch that will allow to disable compilation of unused CPU
support code.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-04-17 17:40:47 +02:00
H. Peter Anvin
a7ef94e688 x86: do not promote TM3x00/TM5x00 to i686-class
We have been promoting Transmeta TM3x00/TM5x00 chips to i686-class
based on the notion that they contain all the user-space visible
features of an i686-class chip.  However, this is not actually true:
they lack the EA-taking long NOPs (0F 1F /0).  Since this is a
userspace-visible incompatibility, downgrade these CPUs to the
manufacturer-defined i586 level.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-02-26 12:55:50 +01:00
Thomas Gleixner
f7627e2513 i386: move kernel/cpu
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2007-10-11 11:16:58 +02:00