Commit Graph

27 Commits

Author SHA1 Message Date
Satya Rama Aditya Pinapala
edef6ae040 disp: msm: dsi: snapshot of dsi from 4.14 to 4.19
This change is a snapshot of dsi files taken of 4.14
as of commit 764f7c2 (Merge remote-tracking branch
'quic/dev/msm-4.14-display' into msm-4.14)

Change-Id: I8361a844c35a4450f7800964a8da2741676fd6c7
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-07-11 12:29:10 -07:00
qctecmdr
e5aaaf8785 Merge "disp: msm: dsi: fix the DMS mode flag setting" 2019-07-06 14:05:03 -07:00
qctecmdr
21af73b82c Merge "drm/msm/dsi-staging: update frame transfer time calculations" 2019-07-06 04:53:51 -07:00
Ray Zhang
dc36ec057b disp: msm: dsi: fix the DMS mode flag setting
DFPS validation doesn't update DSI_MODE_FLAG_DMS when there is
only refresh rate change but not resolution change. This is not
expected. DMS should be able to support this use case if DFPS
is not enabled.

Change-Id: I738bce68b1dc098338281ac95156a483769608c4
Signed-off-by: Ray Zhang <rayz@codeaurora.org>
2019-07-05 11:02:02 +08:00
Vara Reddy
98ac941a1b drm/msm/dsi-staging: update frame transfer time calculations
Change updates frame transfer time calculations. Frame threshold
is provided as input to decide on the final transfer time.
Panel dsi clock node followed by mdp transfer time node
will take priority in selecting final transfer time than frame
threshold time.

Change-Id: I40c3abfc635cd9b338b705535612ac32e047ce6e
Signed-off-by: Vara Reddy <varar@codeaurora.org>
2019-07-02 12:48:34 -07:00
qctecmdr
acf755573d Merge "disp: msm: dsi: DSI PHY V4 support of dynamic clock switch" 2019-06-27 03:34:31 -07:00
qctecmdr
5411cf5dee Merge "disp: msm: dsi: add check for buffer length before copy" 2019-06-19 10:26:17 -07:00
qctecmdr
7082075b68 Merge "disp: msm: dsi: remove scratch register logic for cont-splash" 2019-06-19 00:50:11 -07:00
Satya Rama Aditya Pinapala
aed315f32b disp: msm: dsi: add check for buffer length before copy
The change adds a check to make sure the length of bytes being
copied don't exceed the size of the destination buffer
causing an overflow.

Change-Id: Ib3ca3705e4179ccda1af11279e96e167baee6a3b
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-06-13 14:18:20 -07:00
qctecmdr
48b38ad05d Merge "disp: msm: allow DMS before cont-splash handoff" 2019-06-08 17:49:59 -07:00
Veera Sundaram Sankaran
2e3e990101 disp: msm: dsi: remove scratch register logic for cont-splash
Continuous splash enabled displays are identified by reading
the MDP ctl registers. DSI cont-splash init settings are
called based on this. Additionally, DSI reads the DSI-CTL
scratch register set by bootloader  to detect cont-splash.
This change removes the redundant mechanism in DSI to
detect cont-splash.

Change-Id: Ic58be1e62eda239fcea5e82d9d356905dc552a73
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-06-06 17:32:08 -07:00
Yujun Zhang
39bc44163c disp: msm: dsi: unify dynamic clk support for command mode
Currently the dynamic bit clock switch trigger for command mode
is supported via sysfs node. This might lead to unnecessary
race conditions, when dsi driver is enabling the dsi bit clock
as part of commit and at the same time if bit rate change via
sysfs happens. So make the trigger happens via kernel mode set
call as done for video mode.

Change-Id: I17acb408d2b6dbd6fa41994e56262e31e43d088b
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Yujun Zhang <yujunzhang@codeaurora.org>
2019-06-05 16:06:36 +08:00
Yujun Zhang
b0f2e2222e disp: msm: dsi: add support for dsi dynamic clock switch
This change adds support for dynamic switching of dsi clocks
to avoid RF interference issues. Also with dynamic dsi clock
switch feature coming into picture, now populate the supported
refresh rate as list instead of providing a range. Modify the
logic to enumerate all the modes in dsi driver, taking dynamic
bit clocks, resolutions and refresh rates into account.

Change-Id: I5b6e62bc935cf2234bdd96fcb3c7537b4e735fff
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Yujun Zhang <yujunzhang@codeaurora.org>
2019-06-05 16:06:27 +08:00
qctecmdr
9d87e36a77 Merge "disp: msm: add changes missing during snapshots" 2019-06-04 23:42:23 -07:00
Samantha Tran
1ab07a4d7c disp: msm: add changes missing during snapshots
This change ports the missing changes from 4.14 to 4.19
that were missed. It includes changes up until
commit 0f8fb25421ff ("cnss2: Add device version to
SOC info structure").

Change-Id: Idfdfe891f146e389e3c65cc3fc4c98d93220e789
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2019-06-03 09:07:38 -07:00
Veera Sundaram Sankaran
bce30d62b7 disp: msm: allow DMS before cont-splash handoff
Currently dynamic mode-switch is allowed only after
the cont-splash handoff is handled during the first
frame. Remove this restriction for cmd-mode alone as
it can handle the use-case.

Change-Id: I5f9dc758f50a91fec0b9f710c74f2ea78c4e75eb
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-05-30 15:26:44 -07:00
Nilaan Gunabalachandran
52855c704a disp: msm: sde: dynamic lm reservation for secondary disp
Primary and secondary displays should have first priority
when reserving lms. Static reservation can potentially block
higher resolutions for the required displays. This patch gets
the layer mixer requirement for primary or secondary display
if available. It reserves those layer mixers dynamically
for the respective display when connector is registered.

Change-Id: Id69dac4c72d6b20008049f4aeb71c0f97d0a426b
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2019-05-24 06:35:07 -07:00
qctecmdr
06f8bcc142 Merge "disp: msm: dsi: add debug support to configure clock gating" 2019-05-23 21:54:20 -07:00
qctecmdr
30b14e8caf Merge "disp: msm: dsi: block TE signal check for ESD on video mode panels" 2019-05-23 19:36:19 -07:00
qctecmdr
d37cbd374b Merge "drm/msm/dsi-staging: update dsi clock calculations" 2019-05-23 16:40:53 -07:00
Aravind Venkateswaran
dc65566994 disp: msm: dsi: add debug support to configure clock gating
Add support to selectively enable clock gating for supported
DSI clocks using a new debugfs node - config_clk_gating. This
new node would be created for every display node. See below
for usage examples:

To enable clock gating only for BYTE clock:
echo 1 > /sys/kernel/debug/<display_name>/config_clock_gating

To enable clock gating only for PIXEL clock:
echo 2 > /sys/kernel/debug/<display_name>/config_clock_gating

To enable clock gating only for PHY clock:
echo 4 > /sys/kernel/debug/<display_name>/config_clock_gating

To enable clock gating only for all clock:
echo 7 > /sys/kernel/debug/<display_name>/config_clock_gating

To disable clock gating for all clocks:
echo 8 > /sys/kernel/debug/<display_name>/config_clock_gating

To go back to default setting:
echo 0 > /sys/kernel/debug/<display_name>/config_clock_gating

Change-Id: I83713d86eb1b9675d40d51fc20de81cca0aeb1c0
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
2019-05-23 12:08:22 -07:00
Satya Rama Aditya Pinapala
8e1a796595 disp: msm: dsi: block TE signal check for ESD on video mode panels
If we set esd check mode as TE signal check for video mode panels
the panel will be continuously reset. This change doesn't allow
TE signal check as ESD check mode.

Change-Id: I42a09d605b259d9f06c67cb126d3684ed4489699
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-05-22 14:38:59 -07:00
Satya Rama Aditya Pinapala
684e070ab1 disp: msm: dsi: fix out of bounds access errors
This change fixes the invalid memory access. It allocates
enough memory so that out of bounds access is avoided.

Change-Id: I0749eac54cfa91891a4377b99fbd7f24dd3bd02a
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-05-22 14:38:16 -07:00
Vara Reddy
f28b596aac drm/msm/dsi-staging: update dsi clock calculations
Change updates dsi clock calculations for command mode
as per recommendation. Now dsi clocks are tied to
frame transer time. Propagate correct frame transfer
time to hal to update mdp clocks and bandwidth needed
accordingly.

Change-Id: I46f9038622ddd47cc53c5f3d54229f69a7008c8a
Signed-off-by: Vara Reddy <varar@codeaurora.org>
2019-05-15 13:06:43 -07:00
Lei Chen
21edecd3b1 disp: msm: Add support for seamless panel operating mode switch
DSI display may support video mode and command mode both and it may
support transition between these two modes.
This change adds seamless transition between these two modes for DSI
display by avoiding crtc enable/disable and panel power on/off
during modeset.

Change-Id: Id7ddaef7d1f0f7cc7d52283755bad53a246adec6
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2019-05-06 18:45:44 -07:00
Dhaval Patel
a74d2cf7fa disp: msm: add runtime_pm ops support in drm driver
Add runtime_pm ops support in drm driver instead
of direct sde_power_resource_enable/disable call.
It allows drm driver to use runtime pm refcount logic
to track the resources instead of custom implementation.
The change also removes the NRT_CLIENT support from
sde_power_handle code to simplify it further.

Change-Id: Ib14692dca5876703d0a230da2512d731b69b8ebb
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2019-04-24 13:27:48 -07:00
Narendra Muppalla
3709853456 Display drivers kernel project initial snapshot
This change brings msm display driver including sde,
dp, dsi, rotator, dsi pll and dp pll from base 4.19 kernel
project. It is first source code snapshot from base kernel project.

Change-Id: Iec864c064ce5ea04e170f24414c728684002f284
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2019-04-14 22:20:59 -07:00