When running Linux in non-secure mode (on ARM1176 for example),
depending on the CP15 secure configuration register, the CPSR.F bit
(6) might only be modified from the secure mode. However, the
valid_user_regs() function checks for this bit being cleared. With
commit a6c61e9d, a SIGSEGV is forced in handle_signal() if the user
registers are not considered valid.
The patch also ensures that the CPSR.A bit is cleared and the USR mode
is set if the CPU does not support the 26bit user mode.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The patch moves the HWCAP definitions and the extern elf_hwcap
declaration to the hwcap.h header file.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This allows individual CPU support to determine which platform
devices should be registered. Also fix a copy-n-paste bug in
the I2C power platform device entry.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The RTC library code contains everything necessary to set the
system time from the RTC; for similar reasons as the previous
commit, it's far better to let the RTC library code sort this
out rather than implement something which might not be
appropriate for everyone.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove the RTC management over a suspend/resume cycle. Firstly,
we may not be using the internal RTC for time keeping; some
platforms have an external RTC for this inspite of the PXA having
an internal RTC. Secondly, the RTC library code handles updating
system time on resume.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since the number of dma channels varies between pxa25x and pxa27x, it
introduces some specific code in dma.c. This patch moves the specific
code to pxa25x.c and pxa27x.c and makes dma.c more generic.
1. add pxa_init_dma() for dma initialization, the number of channels
are passed in by the argument
2. add a "prio" field to the "struct pxa_dma_channel" for the channel
priority, and is initialized in pxa_init_dma()
3. use a general priority comparison with the channels "prio" field so
to remove the processor specific pxa_for_each_dma_prio macro, this
is not lightning fast as the original one, but it is acceptable as
it happens when requesting dma, which is usually not so performance
critical
Signed-off-by: eric miao <eric.miao@marvell.com>
Acked-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
/* should be ok this time, I aligned this patch to your arm:pxa2.mbox */
1. move pxa25x specific IRQ initialization code to pxa25x_init_irq()
and pxa27x code to pxa27x_init_irq(), remove pxa_init_irq()
2. replace all pxa_init_irq() with their PXA25x or PXA27x specific
functions
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ICIP2 is not examined during IRQ entrance, this patch add the
checking if the processor is PXA27x or later, with CoreG bits
in CPUID (Core Generation) > 1
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
1. use GPIO_IRQ_mask[] to select those bits of interest, actually
only those "unmasked" GPIO IRQs with their corresponding bits
in GPIO_IRQ_mask[] set to "1" should be checked
2. remove #ifdef PXA_LAST_GPIO > 96 .. #endif, GPIO_IRQ_mask[]
is used to mask out the irrelevant bits, so that even though
the GEDR3 on PXA25x is reserved, it will be masked, and the
following code will never run. Another point is that GPIO85-
GPIO95 bits within GEDR2 will also be masked out on PXA25x
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
move the GPIO IRQ initialization code to pxa_init_irq_gpio()
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
1. move low IRQ initialization code to pxa_init_irq_low()
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
1. define PXA_GPIO_IRQ_BASE to be right after the internal IRQs,
and define PXA_GPIO_IRQ_NUM to be 128 for all PXA2xx variants
2. make the code specific to the high IRQ numbers (32..64) to be
PXA27x specific
3. add a function pxa_init_irq_high() to initialize the internal
high IRQ chip, the invoke of this function could be moved to
PXA27x specific initialization code
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
1. PXA_IRQ_SKIP is defined to be 7 on PXA25x so that the first IRQ
starts from zero. This makes IRQ numbering inconsistent between
PXA25x and PXA27x. Remove this macro so that the same IRQ_XXXXX
definition has the same value on both PXA25x and PXA27x.
2. make IRQ_SSP3..IRQ_PWRI2C valid only if PXA27x is defined, this
avoids unintentional use of these macros on PXA25x
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
pxa_pm_prepare() tried to validate the suspend method type. As
noted in previous commits:
eb9289eb209c372d06cee8c9c50269
the checking of the suspend type in the 'prepare' method is the
wrong place to do this; use the 'valid' method instead. This
means that pxa_pm_prepare() can be entirely removed.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Move the pm_ops structure into the PXA25x and PXA27x support
files. Remove the old pxa_pm_prepare() function, and rename
the both pxa_cpu_pm_prepare() functions as pxa_pm_prepare().
We'll fix that later.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
pxamci.h redefines the MMC registers differently so they can be used
with ioremap. Remove the incompatible definitions from pxa-regs.h.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
pxa_pm_finish() does nothing but return zero. The core code
does nothing with this return value, and will not try to call
the finish method in the pm_ops structure if it is NULL.
Therefore, we can remove this useless function.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This driver has been broken forever. It depends on i2c-algo-8xx which
has never been in the mainline kernel.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Work around a problem reported on:
http://ozlabs.org/pipermail/linuxppc-embedded/2005-July/019038.html
Without this patch I2C on mpc5200 becomes unusable after a while.
Tested on mpc5200 boards by Matthias Fechner and me.
Signed-off-by: Domen Puncer <domen.puncer@telargo.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Add TWI driver for the PMC-Sierra MSP71xx devices.
[JD: Drop the probe hack, don't set algo_data as we never use it, return
the right error code if the driver registration fails.]
Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
There's some redundancy in the tsl2550 initialization sequence. It is
powering up the device twice, and setting the operating mode twice
too. Setting things just once saves SMBus transactions, which aren't
always cheap, speeding up the device initialization.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Cc: Rodolfo Giometti <giometti@linux.it>
This is a new I2C bus driver for the TAOS evaluation modules. Developped
and tested on the TAOS TSL2550 EVM.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Add an ability to utilize the internal SRAM buffer on ICH4
and newer host controllers to speed up execution of block operations.
I've split the code so that it is more clear which block transaction is
performed.
First of all the host controller's type is identified. isich4 is set when
we think that the controller has the internal buffer. Then, before every
block transaction, if isich4 is set, we attempt to enable the E32B bit in
SMBAUXCTL register.
Signed-off-by: Oleg Ryjkov <olegr@google.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
* Use defines instead of raw numbers for register bits
* Fix several wrong indentations and trailing whitespace
* Move hwpec timeout checking to a separate function
Signed-off-by: Oleg Ryjkov <olegr@google.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
i2c_gpio_getsda() and i2c_gpio_getscl() are only used in this file.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Use i2c_bit_add_numbered_bus() so that the i2c-gpio adapter works well
with new-style pre-declared devices.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Update the IOP3xx I2C driver to use i2c_add_numbered_adapter(), so that
later patches can convert boards to using new-style drivers.
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Tested-by: Voipio Riku <Riku.Voipio@movial.fi>
Cc: Dan J Williams <dan.j.williams@intel.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Let the i2c-sis5595 driver release its PCI device after registering.
This is to allow the sis5595 hardware monitoring driver to also
access this PCI device. The same trick is already used in the
i2c-viapro and via686a drivers to let them both load.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
matroxfb_crtc2 has nothing to do with i2c, so there's no reason why
matroxfb_crtc2.h should include i2c header files.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Acked-by: Petr Vandrovec <vandrove@vc.cvut.cz>
Add support for SMBus block read/write transactions to i2c-nforce2
driver, in particular to host controllers MCP51 and MCP55.
Signed-off-by: Oleg Ryjkov <olegr@google.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Move the i2c-mpc driver over to using the new i2c infrastructure.
Specifically, it now uses i2c_add_numbered_adapter so that the bus number
can be determined ahead of time and used to register i2c clients before
the bus is instantiated.
Tested on an MPC5200 based board
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Convert the Marvell mv64xxx I2C driver to use the new i2c infrastructure,
by calling i2c_add_numbered_adapter(). This allows clients to be
registered before the bus is instantiated.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Acked-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
A driver for the Dallas DS1682 elapsed time recorder chip.
Tested on a MPC5200 based board using the integrated i2c adapter.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Let the drivers specify how many bytes they want to read with
i2c_smbus_read_i2c_block_data(). So far, the block count was
hard-coded to I2C_SMBUS_BLOCK_MAX (32), which did not make much sense.
Many driver authors complained about this before, and I believe it's
about time to fix it. Right now, authors have to do technically stupid
things, such as individual byte reads or full-fledged I2C messaging,
to work around the problem. We do not want to encourage that.
I even found that some bus drivers (e.g. i2c-amd8111) already
implemented I2C block read the "right" way, that is, they didn't
follow the old, broken standard. The fact that it was never noticed
before just shows how little i2c_smbus_read_i2c_block_data() was used,
which isn't that surprising given how broken its prototype was so far.
There are some obvious compatiblity considerations:
* This changes the i2c_smbus_read_i2c_block_data() prototype. Users
outside the kernel tree will notice at compilation time, and will
have to update their code.
* User-space has access to i2c_smbus_xfer() directly using i2c-dev, so
the changed expectations would affect tools such as i2cdump. In order
to preserve binary compatibility, we give I2C_SMBUS_I2C_BLOCK_DATA
a new numeric value, and define I2C_SMBUS_I2C_BLOCK_BROKEN with the
old numeric value. When i2c-dev receives a transaction with the
old value, it can convert it to the new format on the fly.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
We have a new RTC subsystem with better drivers.
Legacy driver status:
* ds1337: The DS1337 and DS1339 are now supported by the rtc-ds1307
driver, so it looks to me like we could even delete the ds1337
driver right away.
* ds1374: Will soon be replaced with Scott Wood's rtc-ds1374 driver.
* m41t00: The M41T00 is supported by the rtc-ds1307 driver. For the
M41T81 and M41T85, the rtc-m41t80 driver written by Atsushi Nemoto
should work.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Acked-by: Mark A. Greer <mgreer@mvista.com>
Acked-by: James Chapman <jchapman@katalix.com>
Cc: Randy Vinson <rvinson@mvista.com>
The x1205 driver moved to the RTC subsystem and was significantly
modified since then, so just delete the outdated documentation.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Cc: Alessandro Zummo <alessandro.zummo@towertech.it>
The scx200_acb driver use a semaphore as mutex. Use the mutex API
instead of the (binary) semaphore.
Signed-off-by: Matthias Kaehlcke <matthias.kaehlcke@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Cc: Jordan Crouse <jordan.crouse@amd.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Kill a sparse warning by un-nesting two container_of() calls.
Signed-off-by: Mark M. Hoffman <mhoffman@lightlink.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Generate I2C kerneldoc; fix various glitches and add "context" sections to
that documentation. Most I2C and SMBus functions still have no kerneldoc.
Let me suggest providing kerneldoc for all the i2c_smbus_*() functions as
a small and mostly self-contained project for anyone so inclined. :)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
The ARM show_regs() tombstone only partially decodes which ARM ISA was
executing at the time a fault occurred displaying either "(T)" for the
Thumb case or nothing at all for other cases. This patch therefore
explicitly identifies which state the processor is in at the time of
a fault: ARM, Thumb, Jazelle or JazelleEE.
Signed-off-by: George G. Davis <gdavis@mvista.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Examines the ATAGS pointer (r2) at boot, and interprets
a nonzero value as a reference to an ATAGS structure. A
suitable ATAGS structure replaces the kernel's command line.
Signed-off-by: Bill Gatliff <bgat@billgatliff.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The current arch/arm/boot/compressed/head.S code only supports cores
to ARMv6 with the old CPU Id format. This patch adds support for the
new ARMv6 with the new CPU Id and ARMv7 cores that no longer have the
ARMv4 cache operations.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
