060f38b1df
commit 4cb7df64c732b2b9918424095c11660c2a8c4a33 upstream. The audio_mclk_root_clk was added as a gate with the CCGR121 (0x4790), but according to the reference manual, there is no such gate. Moreover, the consumer driver of the mentioned clock might gate it and leave the ECSPI2 (the true owner of that gate) hanging. So lets use the audio_mclk_post_div, which is the parent. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> [ps: backport to 5.4] Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
94 lines
2.0 KiB
Plaintext
94 lines
2.0 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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//
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// Copyright 2017 NXP
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#include "imx7d-pico.dtsi"
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/ {
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model = "TechNexion PICO-IMX7D Board and PI baseboard";
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compatible = "technexion,imx7d-pico-pi", "fsl,imx7d";
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_leds>;
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led {
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label = "gpio-led";
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gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
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};
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "imx7-sgtl5000";
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simple-audio-card,format = "i2s";
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simple-audio-card,bitclock-master = <&dailink_master>;
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simple-audio-card,frame-master = <&dailink_master>;
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simple-audio-card,cpu {
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sound-dai = <&sai1>;
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};
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dailink_master: simple-audio-card,codec {
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sound-dai = <&sgtl5000>;
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clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
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};
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};
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};
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&i2c1 {
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sgtl5000: codec@a {
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#sound-dai-cells = <0>;
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reg = <0x0a>;
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compatible = "fsl,sgtl5000";
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clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
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VDDA-supply = <®_2p5v>;
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VDDIO-supply = <®_vref_1v8>;
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};
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};
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&i2c4 {
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polytouch: touchscreen@38 {
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compatible = "edt,edt-ft5x06";
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reg = <0x38>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_touchscreen>;
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interrupt-parent = <&gpio2>;
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interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
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reset-gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
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touchscreen-size-x = <800>;
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touchscreen-size-y = <480>;
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};
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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pinctrl_hog: hoggrp {
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fsl,pins = <
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MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x14
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MX7D_PAD_EPDC_DATA01__GPIO2_IO1 0x14
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MX7D_PAD_EPDC_DATA02__GPIO2_IO2 0x14
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MX7D_PAD_EPDC_DATA03__GPIO2_IO3 0x14
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MX7D_PAD_EPDC_DATA05__GPIO2_IO5 0x14
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MX7D_PAD_EPDC_DATA12__GPIO2_IO12 0x14
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MX7D_PAD_EPDC_DATA07__GPIO2_IO7 0x14
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>;
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};
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pinctrl_gpio_leds: gpioledsgrp {
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fsl,pins = <
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MX7D_PAD_EPDC_DATA06__GPIO2_IO6 0x14
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>;
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};
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pinctrl_touchscreen: touchscreengrp {
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fsl,pins = <
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MX7D_PAD_EPDC_DATA04__GPIO2_IO4 0x14
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MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14
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>;
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};
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};
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