378ed6f0e3
We currently have 2 commonly used methods for switching ISA within
assembly code, then restoring the original ISA.
1) Using a pair of .set push & .set pop directives. For example:
.set push
.set mips32r2
<some_insn>
.set pop
2) Using .set mips0 to restore the ISA originally specified on the
command line. For example:
.set mips32r2
<some_insn>
.set mips0
Unfortunately method 2 does not work with nanoMIPS toolchains, where the
assembler rejects the .set mips0 directive like so:
Error: cannot change ISA from nanoMIPS to mips0
In preparation for supporting nanoMIPS builds, switch all instances of
method 2 in generic non-platform-specific code to use push & pop as in
method 1 instead. The .set push & .set pop is arguably cleaner anyway,
and if nothing else it's good to consistently use one method.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/21037/
Cc: linux-mips@linux-mips.org
39 lines
839 B
C
39 lines
839 B
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
#ifndef ASM_EDAC_H
|
|
#define ASM_EDAC_H
|
|
|
|
#include <asm/compiler.h>
|
|
|
|
/* ECC atomic, DMA, SMP and interrupt safe scrub function */
|
|
|
|
static inline void edac_atomic_scrub(void *va, u32 size)
|
|
{
|
|
unsigned long *virt_addr = va;
|
|
unsigned long temp;
|
|
u32 i;
|
|
|
|
for (i = 0; i < size / sizeof(unsigned long); i++) {
|
|
/*
|
|
* Very carefully read and write to memory atomically
|
|
* so we are interrupt, DMA and SMP safe.
|
|
*
|
|
* Intel: asm("lock; addl $0, %0"::"m"(*virt_addr));
|
|
*/
|
|
|
|
__asm__ __volatile__ (
|
|
" .set push \n"
|
|
" .set mips2 \n"
|
|
"1: ll %0, %1 # edac_atomic_scrub \n"
|
|
" addu %0, $0 \n"
|
|
" sc %0, %1 \n"
|
|
" beqz %0, 1b \n"
|
|
" .set pop \n"
|
|
: "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*virt_addr)
|
|
: GCC_OFF_SMALL_ASM() (*virt_addr));
|
|
|
|
virt_addr++;
|
|
}
|
|
}
|
|
|
|
#endif
|