74ba9207e1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 675 mass ave cambridge ma 02139 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 441 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc) Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190520071858.739733335@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
41 lines
1.3 KiB
C
41 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* irq.h: IRQ mappings for PNX833X.
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*
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* Copyright 2008 NXP Semiconductors
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* Chris Steel <chris.steel@nxp.com>
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* Daniel Laird <daniel.j.laird@nxp.com>
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*/
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#ifndef __ASM_MIPS_MACH_PNX833X_IRQ_H
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#define __ASM_MIPS_MACH_PNX833X_IRQ_H
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/*
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* The "IRQ numbers" are completely virtual.
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*
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* In PNX8330/1, we have 48 interrupt lines, numbered from 1 to 48.
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* Let's use numbers 1..48 for PIC interrupts, number 0 for timer interrupt,
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* numbers 49..64 for (virtual) GPIO interrupts.
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*
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* In PNX8335, we have 57 interrupt lines, numbered from 1 to 57,
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* connected to PIC, which uses core hardware interrupt 2, and also
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* a timer interrupt through hardware interrupt 5.
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* Let's use numbers 1..64 for PIC interrupts, number 0 for timer interrupt,
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* numbers 65..80 for (virtual) GPIO interrupts.
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*
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*/
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#if defined(CONFIG_SOC_PNX8335)
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#define PNX833X_PIC_NUM_IRQ 58
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#else
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#define PNX833X_PIC_NUM_IRQ 37
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#endif
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#define MIPS_CPU_NUM_IRQ 8
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#define PNX833X_GPIO_NUM_IRQ 16
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#define MIPS_CPU_IRQ_BASE 0
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#define PNX833X_PIC_IRQ_BASE (MIPS_CPU_IRQ_BASE + MIPS_CPU_NUM_IRQ)
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#define PNX833X_GPIO_IRQ_BASE (PNX833X_PIC_IRQ_BASE + PNX833X_PIC_NUM_IRQ)
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#define NR_IRQS (MIPS_CPU_NUM_IRQ + PNX833X_PIC_NUM_IRQ + PNX833X_GPIO_NUM_IRQ)
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#endif
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